L6585D Combo IC for PFC and ballast control Features ■ Pre-heating and ignition phases independently programmable ■ Ignition voltage control ■ Transition mode PFC with over-current protection SO-20 ■ Programmable and precise End-of-life protection compliant with all ballast configurations Applications ■ Auto-adjusting half-bridge over-current control ■ Automatic re-lamp ■ Electronic ballast ■ 3% oscillator precision ■ 1.2µs dead time ■ PFC over-voltage protection and feedback disconnection ■ Under voltage lock-out Figure 1. Block diagram CCOOMMPP MMUULLTT PPFFCCSS VVcccc 22..55VV EE//AA ++ MMUULLTTIIPPLLIIEERR LLEEBB 11..77VV BBOOOOTT IINNVV __ aanndd TTHHDD 1177VV OOPPTTIIMMIIZZEERR __ ++ PPWWMM ++ __ DDEETTEEUUCCVVTT IIOONN SSYYNNCCHHRROONNOOUUSS DDRRHHIIVVVVGGEERR HHSSDD 11..22VV OOLL CCOOMMPP.. CCHHOOKKEE BBOOOOTTSSTTRRAAPP DDIIOODDEE OOUUTT SSAATT.. DDEEAADD LLEEVVEELL ZZCCDD TTIIMMEE DDRRIIVVIINNGG SSHHIIFFTTEERR VVcccc SS RR SSTTAARRTTEERR QQ 00..77VV LLAATTCCHH LLOOGGIICC LLVVGG DDRRIIVVEERR LLSSDD VVcccc OOVVPP PPFFGG PPFFSSTTOOPP WWIINNDDOOWW PPFFSSTTDDOOIISSPP CCOONNTTRROOLL HHBB SSTTOOPP 11..66VV GGNNDD CCOOMMPPAARRAATTOORR LLOOGGIICC EEOOLL CCTTRR && RREEFF.. OOLL OOVVPP HHBBCCSS 00..99VV 33..44VV 11..99VV TTIIMMIINNGG DDIISS MMAANNAAGGEEMMEENNTT VVcccc 22VV 22VV EEOOLLRR 00..7755VV VVCCOO 4141....6565 RREELLAAMMPP 44..6633VV EEOOLLPP RRFF OOSSCC EEOOII TTcchh May 2007 Rev 5 1/25 www.st.com 25

Contents L6585D Contents 1 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1 Start-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1.1 Pre-heating (time interval A Figure5) . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1.2 Ignition (time interval B Figure5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.3 Run mode (time interval C Figure5) . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 End of life – window comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 Half-bridge current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 CTR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 Re–lamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 11 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25

L6585D Device description 1 Device description Designed in High-voltage BCD Off-line technology, the L6585D embeds a PFC controller, a half-bridge controller, the relevant drivers and the logic necessary to build an electronic ballast. The advanced and precise logic circuitry, combined with the programmability of the End-of- Life windows comparator threshold, makes the L6585D compliant with either "lamp-to- ground" or "block capacitor-to ground" configurations. Another outstanding feature is the possibility of controlling and limiting the lamp voltage during the ignition phase. The pre-heating and ignition durations are independently settable as well as the half-bridge switching frequencies for each operating phases (pre-heating, ignition and normal mode). Other features (half-bridge over-current with frequency increase, PFC over-voltage) allow building a reliable and flexible solution with a reduced part count. The PFC section achieves current mode control operating in Transition Mode; the highly linear multiplier includes a special circuit, able to reduce AC input current distortion, that allows wide-range-mains operation with an extremely low THD, even over a large load range. The PFC output voltage is controlled by means of a voltage-mode error amplifier and a precise internal voltage reference. The driver of the PFC is able to provide 300mA (source) and 600mA (sink) and the drivers of the half-bridge provide 290mA source and 480mA sink. Figure 2. Typical system block diagram LLPPFFCC HHVV BBUUSS RR55 RR77 RR11 RR22 RR44 CCBBUULLKK RR66 CCCCOOMMPP RR88 CCCCppBBhhuuOOaammOOrrTTggppee AACC MMAAIINNSS ZZCCDD IINNVV CCOOMMPP CCTTRR VVcccc BBOOOOTT PPFFGG 1111 1100 99 77 1177 2200 1133 1199 HHSSDD LL CCIINN LL66558855DD 1188 BB 1122 OOUUTT PPFFCCSS MMUULLTT 88 1155 11 22 33 44 55 66 11114646 LLSSDD LLAAMMPP CCRREESS GGNNDD OOSSCC RRFF EEOOII TTcchh EEOOLLPP EEOOLL--RR HHBBCCSS RR33 RRSSNNSSPPFF RRPPRREE CCOOSSCC RRRRUUNN CCIIGGNN RRDD CCDD RRPP RRSSNNSSHHBB CCBBLLOOCCKK 3/25

Pin settings L6585D 2 Pin settings 2.1 Connection Figure 3. Pin sonnection (Top view) OOSSCC BBOOOOTT RRFF HHSSDD EEOOII OOUUTT TTCCHH VVCCCC EEOOLLPP LLSSDD EEOOLL--RR GGNNDD CCTTRR HHBBCCSS MMUULLTT PPFFGG CCOOMMPP PPFFCCSS IINNVV ZZCCDD 4/25

L6585D Pin settings 2.2 Functions T able 1. Pin functions Pin num. Name Function An external capacitor to GND fixes the half-bridge switching frequency with a 1 OSC ±3% precision. Voltage reference able to source up to 240µA; the current sunk from this pin fixes the switching frequency of the half-bridge for each operating state. A resistor (R ) connected to ground sets the half-bridge operating frequency 2 RF RUN combined with the capacitor connected to the pin OSC. A resistor connected to EOI (R ) – in parallel with R – sets the maximum PRE RUN half-bridge switching frequency during pre-heating. Connected to ground by a capacitor that, combined with R , determines the PRE ignition duration 3 EOI Pre-heating: low impedance to set high switching frequency Ignition and run mode: high impedance with controlled current sink in case of HBCS threshold triggering. Pin for setting the pre-heating time and the protection intervention. Connect a RC parallel network (R and C ) to ground D D Pre-heating: the C is charged by an internal current generator. When the pin D voltage reaches 4.63V the generator is disabled and the capacitor discharges because of R ; once the voltage drops below 1.52V, the preheating finishes, the 4 Tch D ignition phase starts and the R C is discharged to ground. D D Run mode: according to the kind of fault (either over-current or EOL) the internal generator charges the RC parallel network and appropriate actions are taken to stop the application. During proper behavior of the IC, this pin is low impedance. Pin to program the EOL comparator. 5 EOLP It is possible to select both the EOL sensing method and the window comparator amplitude by connecting a resistor (R ) to ground. EOLP Input for the window comparator and re-lamp function. It can be used to detect the lamp ageing for either “lamp to ground” and “block capacitor to ground” configurations. According to the EOLP pin setting, it is possible to program: – the window amplitude (V ) W 6 EOL-R – the center of the window (VSET) either fixed or in tracking with the PFC output bus. This function is blanked during the ignition phase. In case of either lamp disconnection or removal, a second threshold (V ) SL-UP crossing latches the IC and drives the chip in “ready-mode” so that when the voltage at EOL-R pin is brought below V (re-lamp) a new pre- SL-DOWN heating/ignition sequence is repeated. Input pin for: – PFC over-voltage detection: the PFC driver is stopped until the voltage returns in the proper operating range 7 CTR – Feedback disconnection detection – reference for End-of-life in case tracking reference; – shut-down: forcing the pin to a voltage lower than 0.75V, the IC shuts down in unlatched condition. Main input to the multiplier. This pin is connected to the rectified mains voltage 8 MULT via a resistor divider and provides the sinusoidal reference to the PFC current loop. 5/25

Pin settings L6585D Table 1. Pin functions (continued) Pin num. Name Function Output of the error amplifier. A compensation network is placed between this pin 9 COMP and INV to achieve stability of the PFC voltage control loop and ensure high power factor and low THD. Inverting input of the error amplifier. The information on the output voltage of the 10 INV PFC pre-regulator is fed into the pin through a resistor divider. Input for the feedback disconnection comparator Boost inductor’s demagnetization sensing input for PFC transition-mode operation. A negative-going edge triggers PFC MOSFET turn-on. 11 ZCD During start-up or when the voltage is not high enough to arm the internal comparator (e.g. AC Mains peak), the PFC driver is triggered by means of an internal starter. Input to the PFC PWM comparator. The current flowing in the PFC mosfet is sensed by a resistor; the resulting voltage is applied to this pin and compared with an internal sinusoidal-shaped reference, generated by the multiplier, to determine the PFC MOSFET’ s turn-off. 12 PFCS A second comparison level detects abnormal currents (e.g. due to boost inductor saturation) and, on this occurrence, shuts down and latches the IC reducing its consumption to the start-up. An internal LEB prevents undesired function triggering. PFC gate driver output. The totem pole output stage is able to drive power 13 PFG MOSFET’S with a peak current of 300mA source and 600mA sink. 2-levels half-bridge current monitor for current control. The current flowing in the HB mosfet is sensed by a resistor; the resulting voltage is applied to this pin. Low threshold (active during run mode): in case of thresholds crossing, the IC reacts with self-adjusting frequency increase in order to limit the half-bridge (lamp) current. 14 HBCS High threshold: – ignition: in case of thresholds crossing during the frequency shift, the IC reacts with self-adjusting frequency increase in order to limit the lamp voltage and preventing operation below resonance. – run mode: in case of thresholds crossing because of current spikes (due e. g. to capacitive mode / cross-conduction), the L6585D latches to avoid MOSFETs damaging, 15 GND Ground. Current return for both the signal part of the IC and the gate driver. Low side driver output: the output stage can deliver 290mA source and 480mA 16 LSD sink (typ. values). Supply Voltage of both the signal part of the IC and the gate driver. 17 VCC Clamped with a Zener inside. High Side Driver Floating Reference. This pin must be connected close to the 18 OUT source of the high side power MOS. High side driver output: the output stage can deliver 290mA source and 480mA 19 HSD (typ. values). Bootstrapped Supply Voltage. Between this pin and V , the bootstrap capacitor CC must be connected. 20 BOOT A patented integrated circuitry replaces the external bootstrap diode, by means of a high voltage DMOS, synchronously driven with the low side power MOSFET. 6/25

L6585D Electrical data 3 Electrical data 3.1 Maximum ratings T able 2. Absolute maximum ratings Symbol Pin Parameter Value Unit V 20 Floating supply voltage -1 to 618 V BOOT V 18 Floating ground voltage -3 to V 18 V OUT BOOT – dV /dt 18 Floating ground max. slew rate 50 V/ns OUT V 17 IC Supply voltage (I = 20mA)(1) Self-limited V CC CC 1, 3, 4, 8, 10, Analog input and outputs -0.3 to 5 V 12 2, 5 -0.3 to 2.7 V 6 Vcc 7 -0.3 to 7 V 14 -5 to 5 9, 11 ZCD clamp (I < 4mA) Self-limited ZCD I 2 Current capability 240 µA RF I 5 Current capability 100 µA EOLP F Maximum operating frequency 250 KHz OSC(MAX) P Power dissipation @T = 70°C 0.83 W TOT A 1. The device has an internal Clamping Zener between GND and the VCC pin, it must not be supplied by a Low Impedance Voltage Source. Note: ESD immunity for pins 18, 19 and 20 is guaranteed up to 900V (Human Body Model) 3.2 Thermal data T able 3. Thermal data Symbol Description Value Unit RthJA Max. thermal resistance junction to ambient 120 °C/W T Junction operating temperature range -40 to 150 °C J T Storage temperature -55 to 150 °C STG 7/25

Electrical characteristics L6585D 4 Electrical characteristics V = 15V, T = 25°C, C = 1nF, C = 470pF, R = 47K, unless otherwise specified CC A L OSC RUN Table 4. E l ectrical characteristics Symbol Pin Parameter Test condition Min Typ Max Unit Supply voltage Vcc V Operating range After turn-on 11 16 V CC V V Turn-on threshold (1) 13.6 14.3 15 V CC(on) CC V V Turn-off threshold (1) 9.6 10.3 11 V CC(OFF) CC VZ V Zener Voltage Icc = 20mA 16.2 17.2 17.7 V CC Supply current I V Start-up current Before turn-on @ 13V 250 370 µA ST-UP CC ICC V Operating supply current 7 mA CC Iq V Residual current IC latched 370 µA CC PFC section – multiplier input IMULT MULT Input bias current V = 0 -1 µA MULT V MULT Linear operation range V = 3V 0 to 3 V MULT COMP ∆VCS MULT Output max. slope VMULT = 0 to 1V, 0.75 V/V ∆VMULT VCOMP = Upper clamp K MULT Gain V = 1V, V = 3V 0.52 1/V M MULT COMP PFC section – error amplifier Voltage feedback input VINV INV 2.45 2.5 2.55 V threshold INV Line regulation V = 10.3V to 16V 50 mV CC IINV INV Input bias current -1 µA Gv INV Voltage gain Open loop (2) 60 80 dB GB INV Gain-bandwidth product (2) 1 MHz ICOMP COMP Source current V = 4V, V = 2.4 V -2.6 mA COMP INV Sink current V = 4V, V = 2.6 V 4 mA COMP INV V COMP Upper clamp voltage I = 0.5 mA 4.2 V COMP SOURCE Lower clamp voltage I = 0.5 mA 2.25 V SINK Open loop detection VDIS INV CTR > 3.4 1.2 V threshold COMP Static OVP threshold 2.1 2.25 2.4 V 8/25

L6585D Electrical characteristics Table 4. Electrical characteristics (continued) Symbol Pin Parameter Test condition Min Typ Max Unit CTR pin Disable threshold Falling edge 0.75 V DIS CTR Hysteresys 120 mV Dynamic PFC Rising edge 3.4 V PFOV CTR overvoltage Hysteresys 140 mV Available range as Lower threshold (falling) 1.7 V tracking reference CTR Hysteresys 0.12 Higher threshold (rising) 3.4 V Hysteresys 0.14 PFC section – current sense comparator ICS PFCS Input bias current V = 0 -1 µA CS tLEB PFCS Leading edge blanking (2) 100 200 300 ns VCSdis PFCS IC disable level 1.65 1.75 1.85 V td(H-L) PFCS Delay to output 120 ns Current sense reference V PFCS V = Upper clamp 1.0 1.08 1.16 V CSclamp clamp COMP PFC section – zero current detector VZCDH ZCD Upper clamp voltage I = 2.5 mA 5 V ZCD VZCDL ZCD Lower clamp voltage I = -2.5 mA -0.3 0 0.3 V ZCD Arming voltage VZCDA ZCD (2) 1.4 V (positive-going edge) Triggering voltage VZCDT ZCD (2) 0.7 V (negative-going edge) IZCDb ZCD Input bias current V = 1 to 4.5 V 1 µA ZCD I ZCD Source current capability -4 mA ZCDsrc I ZCD Sink current capability 4 mA ZCDsnk PFC section – gate driver I = 10mA 0.2 V SINK PFG Output high/low I = 10mA 14.5 V SOURCE tf PFG Fall time 40 90 ns tr PFG Rise time 90 140 ns I PFG Peak sink current 475 600 mA SINK I PFG Peak source current 200 300 mA SOURCE PFG Pull-down resistor 10 kΩ 9/25

Electrical characteristics L6585D Table 4. Electrical characteristics (continued) Symbol Pin Parameter Test condition Min Typ Max Unit Half bridge section – Timing & oscillator I T Charge current V = 2.2V 30 µA CH CH TCH Charge threshold V T 4.63 V CHP CH (positive going-edge) (1) Discharge threshold V T (1) 1.50 V CHN CH (negative going edge) 1.5V < V < 4.5V, T Leakage current TCH 0.1 µA CH falling R T Internal impedance Run mode 150 200 Ω TCH CH EOI Open state current V = 2V 0.15 µA EOI R EOI EOI impedance During pre-heating 150 Ω EOI Tspike = 200ns (3) 20 EOI current generator Tspike = 400ns (3) 100 I EOI during ignition and run µA EOI mode Tspike = 600ns (3) 200 Tspike = 1µs (3) 270 V EOI EOI threshold (1) 1.83 1.9 1.98 V EOI V RF Reference voltage (1) 1.92 2 2.08 V REF IRF RF Max current capability 240 µA OSC Rising threshold (1) 3.7 V OSC Falling threshold (1) 0.9 V D OSC Output duty cycle 48 50 52 % T OSC Dead time 0.96 1.2 1.44 µs DEAD Half-bridge oscillation f OSC 58.4 60.2 62 KHz RUN frequency (run mode) Half-bridge oscillation f OSC R =50K 113.2 116.7 120.2 KHz PRE frequency (pre heating) PRE Half bridge section – End Of Life FUNCTION and re-lamp comparator EOLP Current capability 100 µA EOLP Reference voltage 1.92 2 2.08 V EOL-R Operating range EOLP=27K 0.95 4.15 V 220K = R = 270K or EOLP tracking with CTR Window comparator 22K = REOLP = 27K V EOL-R V S reference R > 620K or EOLP 2.5 75K = R = 91K EOLP 220K = R = 270K or EOLP 220 mV 75K = R = 91K EOLP V Half window amplitude W R > 620K or EOLP 720 mV 22K = R = 27K EOLP 10/25

L6585D Electrical characteristics Table 4. Electrical characteristics (continued) Symbol Pin Parameter Test condition Min Typ Max Unit EOL-R Sink/source capability 2.5 µA EOL-R Relamp comparator 4.63 V hysteresys 160 mV Half bridge section – Half-bridge current sense Frequency increase HBCSH HBCS V < 1.9V (ignition) 1.53 1.6 1.66 V threshold EOI HBCSL HBCS V > 1.9V (run mode) 0.85 0.91 0.97 V EOI HBCS Latched threshold Run mode 1.53 1.6 1.66 V Half bridge section – Low side gate driver LSD Output low voltage I = 10mA 0.3 V SINK LSD Output high voltage I = 10mA 14.5 V SOURCE LSD Peak source current 200 290 mA LSD Peak sink current 400 480 mA T LSD Rise time 120 ns RISE T LSD Fall time 80 ns FALL LSD Pull-down resistor ; 45 KΩ Half bridge section – High side gate driver (voltages referred to OUT) V + HSD Output low voltage I = 10mA OUT V SINK 0.3 V HSD Output high voltage I = 10mA BOOT V SOURCE 0.5 – HSD Peak source current 200 290 mA HSD Peak sink current 400 480 mA T HSD Rise time 120 ns RISE T HSD Fall time 80 ns FALL HSD HSD-OUT pull-down 50 KΩ High-side floating gate-drive supply BOOT Leakage current VBOOT = 600V (2) 5 µA OUT Leakage current VOUT = 600V (2) 5 µA Synchronous bootstrap V = HIGH 250 Ω diode on-resistance LSD 1. Parameter in tracking 2. Specification over the -40°C to 125°C junction temperature range are ensured by design, characterization and statistical correlation 3. A pulse train has been sent to the HBCS pin with f=6KHz; the pulse duration is the one indicated in the notes as "TON" 11/25

Application information L6585D 5 Application information 5.1 Start-up sequence 5.1.1 Pre-heating (time interval A Figure 5) After IC turn-on, unless a lamp absence is detected, the oscillator starts switching at a frequency (f ) set by values of C and R and R Figure4: PRE OSC RUN PRE Equation 1 1.328 f = ------------------------------------------------------------ PRE C ⋅(R ||R ) OSC RUN PRE The pre-heating time is: Equation 2 T = 4.63⋅-C-----D---+R ⋅C ⋅ln4----.--6---3-- PRE I D D 1.52 CH where C and R are shown in Figure4 and I is typically 34 µA. D D CH Figure 4. Oscillator, pre-heating and ignition circuitry II MMAAXX VV RREEFF RRFF RRRRUUNN RRPPRREE CC IIGGNN EEOOII RR DD TTcchh CC DD LLOOGGIICC CC OOSSCC OOSSCC 12/25

L6585D Application information 5.1.2 Ignition (time interval B Figure 5) When the voltage at pin T drops down to 1.50V (typ.), the pin EOI is driven in high CH impedance state and C is exponentially charged according to the time constant τ given IGN by C *R that defines the ignition time and the frequency shift starts. IGN PRE The ignition time is the time necessary to EOI voltage to reach 1.9V, so, by means of simple calculation: Equation 3 T = 3⋅C ⋅R IGN IGN PRE During this phase, the half-bridge current control can limit the maximum voltage applied to the lamp by forcing small frequency increases whenever the half-bridge sense resistor voltage exceeds the HBCSH threshold (see the “Half-Bridge current control” paragraph). Figure5, centre and right, shows the L6585D behavior as the lamp gets older; if it doesn’t ignite for a time longer than the pre-heating one (counted by a cycle charge/discharge of the T pin), the IC is stopped, enters low consumption and waits for either a re-lamp or an CH UVLO. 13/25

Application information L6585D 5.1.3 Run mode (time interval C Figure 5) As the voltage at EOI exceeds 1.9V and the lamp has ignited, the L6585D enters Run mode and remains in this condition unless one of the protections (all enabled in this mode) is trigged. The switching frequency reaches the F value set by R and C : RUN RUN OSC Equation 4 1.328 f = ----------------------------------- RUN R ⋅C RUN OSC Figure 5. O s cillator, pre-heating and ignition sequence VVCCCC((oonn)) VVCCCC((oonn)) VVCCCC((oonn)) VVZZ VV VV VV CCCC CCCC CCCC VVCCCC((ooffff)) VVCCCC((ooffff)) VVCCCC((ooffff)) 44..6633VV ττ== RRDDxx CCDD 44..6633VV 44..6633VV TTcchh 11..55VV TTcchh 11..55VV TTcchh 11..55VV 22VV 22VV 22VV EEOOII EEOOII EEOOII 11..99VV 11..99VV 11..99VV ffPPRREE ffPPRREE ffPPRREE ff ff ff HHBB ffRRUUNN HHBB ffRRUUNN HHBB ffRRUUNN VVHHBBCCSS VVHHBBCCSS VVHHBBCCSS VVLLAAMMPP VVLLAAMMPP VVLLAAMMPP AA BB CC AA BB CC AA BB CC 14/25

L6585D End of life – window comparator 6 End of life – window comparator To detect the ageing of the lamp with particular attention to the effect appearing as asymmetric rectification, a programmable window comparator has been introduced (centered around “V ” with amplitude “V ”) that triggers when the EOL-R voltage is REF W higher than V + V /2 or lower than V V /2. REF W REF – W By means of the resistor connected to the EOLP pin, it is possible to select: 1. the sensing mode: – fixed reference: the centre of the window comparator (V ) is fixed at 2.5V by an REF internal reference; – tracking reference: the centre of the window comparator is the voltage at pin CTR (that is a signal proportional to the PFC output voltage). 2. the half-window amplitude (V /2): 220mV or 720mV. W Figure 6. End-of-life detection circuitry and waveforms RRRPPP222 RRRPPP111 CCCBBBOOOOOOTTT HHHVVV BBBUUUSSS CCCBBBOOOOOOTTT HHHVVV BBBUUUSSS CCCTTTRRR BBBOOOOOOTTT CCCTTTRRR BBBOOOOOOTTT HHHSSSDDD HHHSSSDDD IIINNNTTTEEERRRNNNAAALLL IIINNNTTTEEERRRNNNAAALLL FFFIIIXXXEEEDDD RRREEEFFF... FFFIIIXXXEEEDDD RRREEEFFF... WWWIIINNNDDDOOOWWW OOOUUUTTT WWWIIINNNDDDOOOWWW OOOUUUTTT CCCOOOMMMPPPAAARRRAAATTTOOORRR IIINNNPPPUUUTTT CCCOOOMMMPPPAAARRRAAATTTOOORRR IIINNNPPPUUUTTT CCC AAAMMMPPPLLLIIITTTUUUDDDEEE AAAMMMPPPLLLIIITTTUUUDDDEEE BBBLLLOOOCCCKKK LLLSSSDDD VVVLLLAAAMMMPPP LLLSSSDDD VVVLLLAAAMMMPPP EEEOOOLLLPPP EEEOOOLLLRRR EEEOOOLLLPPP EEEOOOLLLRRR VVV VVV KKK RRREEE111 KKK RRREEE111 RRRFFFLLLooorrr RRRFFFHHH RRR CCCBBBLLLOOOCCCKKK RRRFFFLLLooorrr RRRFFFHHH VVVZZZ222 VVVZZZ111 RRR EEE222 EEE222 HHHVVVBBBUUUSSS (((111000000HHHzzz ooorrr 111222000HHHzzz))) PPPFFFCCC OOOUUUTTT VVV VVV PPPFFFCCCOOOUUUTTT///222 LLLAAAMMMPPP CCCBBB VVV +++ WWW///222 +++ VVV +++ VVV RRREEEFFF ZZZ111 RRR222 CCCTTTRRR VVV KKK VVV –––WWW///222 –––VVV –––VVV RRREEEFFF ZZZ111 RRR222 VVVRRREEEFFF +++ WWW///222 VVVRRREEEFFF +++ WWW///222 VVVEEEOOOLLLRRR VVVRRREEEFFF VVVRRREEEFFF –––WWW///222 VVVRRREEEFFF –––WWW///222 VVV EEEOOOLLLRRR 15/25

End of life – window comparator L6585D The four possible configurations are summarized in the following table, together with the value of resistance to be connected to the EOLP pin in order to obtain the desired setting: Table 5. Configuration of the EOLP pin EOLP resistor Symbol Reference Half–window amplitude R > 620K R Fixed 2.5V ± 720mV EOLP FH 220K = R = 270K R Tracking with CTR ± 220mV EOLP TL 75K = R = 91K R Fixed 2.5V ± 220mV EOLP FL 22K = R = 27K R Tracking with CTR ± 720mV EOLP TL Tracking reference: this setting is suitable for the block capacitor to ground configuration (Figure6, left). In this case the window comparator centre is set by the CTR voltage that is internally transferred to the EOL structure. The effect of rectification appears as shifting of the DC voltage component across the block capacitor, which, under normal conditions, equals one half of the PFC output voltage. A signal proportional to the DC block capacitor voltage is sent to the EOL-R pin by means of a resistive divider (R and R ); the dividers R and R and R and R must be E1 E2 E1 E2 P1 P2 designed to set the EOL-R voltage equal to CTR under nominal condition. Fixed reference: this setting is suitable for the lamp to ground configuration (Figure6, right). The effect of rectification appears as shifting of the DC lamp voltage. A resistive divider (R and R ) senses the voltage across the lamp under normal E1 E2 condition, that is an AC signal with zero average value whereas in case of asymmetric rectification the DC value can shift either in positive or negative direction. Two Zener diodes can be connected back-to-back between the EOL-R pin and the centre of the resistive divider. The Zener voltages should differ by an amount as close as possible to the double of the internal reference to have a symmetrical detection, as it can easily obtained from the following equations: ● V = V + W/2 + V + V UP REF Z1 R2 ● V = V – W/2 – V – V DOWN REF Z2 R1 where V and V are the V values (equal in absolute value) that trigger the window UP DOWN K comparator. To avoid an immediate intervention of the EOL protection, a filtering is introduced; as long as the fault condition persists, the Tch internal generator charges the C up to 4.63V and then D it opens. If this fault condition is still present when the Tch voltage decreases down to 1.5V, then the half bridge is stopped, otherwise (if the fault disappears) the counting is stopped and reset. 16/25

L6585D Half-bridge current control 7 Half-bridge current control The information about the lamp current can be obtained by reading the voltage across a sense resistor placed in series to the source of the half-bridge low side MOS. This circuitry is enabled at the end of the pre-heating phase and it enriches the L6585D with two features: ● Controlled lamp voltage/current during ignition (Figure5): by properly setting the sense resistor (such that the V level is crossed in correspondence of a lamp HBCS voltage higher than the ignition voltage) it is possible to limit the maximum lamp voltage during ignition. In case of this occurrence, then the L6585D would react with a small frequency increase that allows limiting the lamp voltage (V ). This also prevents the +IGN risk of crossing the resonance frequency of the L -C circuit. If the lamp BALLAST RES ignites before T reaches 1.50V (Figure5 left) that is EOI has exceeded 1.9V, then: CH – EOI internal switch opens and its voltage moves asymptotically to 2V – The switching frequency reaches the operating one; – When T reaches 1.52, it will be discharged CH If instead that the lamp hasn’t ignited after a time equal to the pre-heat time (Figure5 right) the oscillator stops, the chip enters low consumption mode and this condition is latched until the mains supply voltage is removed or a re-lamp is detected. ● Over-current protection during run mode: if the HBCSL threshold is crossed, the T CH internal generator is turned on as well as the one at pin EOI causing a frequency increase: this implements a current control structure. During run mode another protection is active: a second comparator (HBCSH) on the pin HBCS detects anomalous current flow through the sense resistor such as the spikes generated by the capacitive mode; the crossing of this second threshold latches the IC. 17/25

CTR L6585D 8 CTR This is a multi-function pin, connected to a resistive divider to the PFC output bus: ● PFC over-voltage: in case of PFC output overshoot (e.g. at start-up) that causes a threshold crossing, the PFC section stops switching until the pin voltage falls below 3.26V (typ.); this is helpful because the bandwidth of the PFC error amplifier is narrow so the control loop is not fast enough to properly reacts ● Feedback disconnection: The OVP function above described (together with the static one embedded in the PFC error amplifier) is able to handle “normal” over-voltage conditions, i.e. those resulting from an abrupt load/line change or occurring at start-up. In case of over-voltage generated when the upper resistor of the feedback output divider fails open, the control loop can no longer read the information on the output voltage and will force the PFC pre-regulator to work at maximum ON time; if this occurs (i.e. the pin INV falls below 1.2V, typ.) and the CTR detects an OVP, the gate drivers activity is immediately stopped, the device enters low consumption and the condition is latched as long as the IC supply voltage is above the UVLO threshold; ● Reference for EOL in case of tracking reading. ● Disable: by forcing the pin below 0.75V an immediate unlatched shut-down is activated; it can be also used as re-lamp in fact after the pin voltage is above 0.8V a pre- heating/ignition sequence is repeated. 18/25

L6585D Re–lamp 9 Re–lamp A second comparator has been introduced on the pin EOL-R; a voltage higher than the internal threshold is read as lamp absence so the chip suddenly stops switching, enters idle mode (low consumption) and is ready for a new pre-heating/ignition sequence as soon as a new lamp is inserted. In this idle mode the consumption of the chip is reduced so that the current flowing through the resistors (connected to the high voltage bus for the start-up) is enough to keep the V CC voltage above the UVLO threshold. After a re-lamp cycle (that is the EOL-R voltage is brought above 4.63V and then released below), a new pre-heating/ignition sequence starts. Table 6. IC configuration Pre-heating Ignition Run mode EOI charge from 0 to Time duration TCH cycle(1); 1.9V (typ.); Until a fault appears or It depends on R and C It depends on R and the AC Mains is removed D D D C D The frequency shifts Half-bridge switching 1.328 1.328 f = ------------------------------------------------------------ from f to f with f = ----------------------------------- frequency PRE C ⋅(R ||R ) PRE RUN RUN R ⋅C OSC RUN PRE exponential trend RUN OSC RELAMP comparator ENABLED ENABLED ENABLED CTR: PFC ENABLED ENABLED ENABLED overvoltage CTR: disable function ENABLED ENABLED ENABLED ENABLED ENABLED Half-bridge current – low threshold ⇒ – low threshold ⇒ DISABLED disabled F increase sense SW – high threshold ⇒ – high threshold ⇒ F increase latch SW EOL: window DISABLED DISABLED ENABLED comparator PFC choke saturation ENABLED ENABLED ENABLED 1. T cycle: charge of the T voltage up to 4.63V and discharge down to 1.50V following the R C time constant CH CH D D 19/25

Re–lamp L6585D Table 7. Fault conditions Fault Condition IC behavior Action required At turn-on: EOL-R – The TCH charge doesn’t start (no ignition) voltage higher than – Drivers stopped Lamp absence 4.63V – IC low consumption (V clamped) Lamp replacement cc (re-lamp comparator) (EOL-R below 4.63V) Run mode: EOL-R – All drivers stopped voltage higher than – IC low consumption (V clamped) 4.63V cc – T cycle (1) (reset if the fault CH EOL-R voltage outside disappears) End of life the limits of window – drivers stopped at the end of T Re-lamp cycle (2) CH comparator cycle – IC low consumption (V clamped) CC – T cycle (1) with lamp voltage CH control Ignition: – In case of HBCS at the end of the Re-lamp cycle (2) HBCS threshold TCH cycle, drivers stopped – IC low consumption (V clamped) cc Half-bridge current – TCH cycle (1) with lamp voltage control (frequency increase) sense Run mode: – In case of HBCS at the end of the Re-lamp cycle (2) HBCSL threshold TCH cycle, drivers stopped – IC low consumption (V clamped) cc Run mode: – Drivers stopped Re-lamp cycle (2) HBCSH threshold – IC low consumption (Vcc clamped) When the CTR voltage CTR voltage lower than – Drivers stopped returns above 0.8V, the Shut-down 0.8V – IC low consumption (V clamped) IC driver restart with a cc pre-heating sequence Choke saturation PFCS voltage higher – Drivers stopped Re-lamp cycle (2)(3) than 1.6V – IC low consumption (V clamped) cc When the CTR voltage Over-voltage of PFC CTR voltage higher than returns below – PFC driver stopped output 3.4V 3.26V (Typ.), the PFC driver restarts PFC open loop CTR voltage higher than (feedback 3.4V AND INV voltage – Drivers stopped Re-lamp cycle (2)(3) – IC low consumption (V clamped) disconnection) lower than 1.2 cc 1. T cycle: charge of the T voltage up to 4.63V and discharge down to 1.50V following the R C time constant; CH CH D D 2. Re-lamp cycle: the voltage at EOL-R pin must be first pulled above 4.63V and then released below it; this typically happens in case of lamp replacement. After a re-lamp cycle, a new pre-heating sequence will be repeated. 3. This fault actually is a "board" fault so a lamp replacement is not effective to restart the ballast 20/25

L6585D Package mechanical data 10 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 21/25

Package mechanical data L6585D Table 8. SO-20 mechanical data Dimensions mm. inch Ref. Min. Typ. Max. Min. Typ. Max. A 2.65 0.104 a1 0.1 0.2 0.004 0.008 a2 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.012 C 0.5 0.020 c1 45° (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.300 L 0.50 1.27 0.020 0.050 M 0.75 0.029 S 8° (max.) Figure 7. Package dimensions 22/25

L6585D Order codes 11 Order codes Table 9. Order codes Part Number Package Packaging L6585D SO-20 Tube L6585DTR SO-20 Tape and Reel 23/25

Revision history L6585D 12 Revision history T able 10. Revision history Date Revision Changes 12-Jan-2006 1 Initial release 25-Oct-2006 2 Final datasheet Updated f value on Table4: Electrical characteristics on 21-Dec-2006 3 RUN page8 12-Apr-2007 4 Updated electrical values on Table4 23-May-2007 5 Updated Figure1: Block diagram on page1 and Eq.1 and 4 24/25

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