L4979D, L4979MD Automotive low dropout voltage regulator Datasheet - production data very low output current mode and enabled regulator. The devices drop to 6 µA with not enabled regulators. On chip trimming results in high output voltage accuracy (+/-2%). Accuracy is kept over wide temperature range, line and load variation. (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:20)(cid:22) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:20)(cid:28)(cid:28) The maximum input voltage is 40 V. The max SO-8 SO-20 output current is internally limited. Internal temperature protection disables the voltage regulator output. Features  AEC-Q100 qualified  Operating DC supply voltage range 5.6 V to 31 V  Low quiescent current (6 µA typ. @ 25 °C with enable low)  High precision output voltage (+/-2%)  Low dropout voltage less than 0.5 V  Reset circuit sensing the output voltage down to 1 V Table 1. Device summary  Programmable reset pulse delay with external Order codes capacitor Package  Watchdog Tube Tape and reel  Programmable watchdog timer with external SO-8 L4979D L4979D013TR capacitor SO-20 L4979MD L4979MD013TR  Thermal shutdown and short circuit protection  Automotive temperature range (T = -40 °C to j 150 °C)  Enable input for enabling/disabling the voltage regulator output Description L4979D and L4979MD are low dropout linear regulators with microprocessor control functions such as low voltage reset, watchdog, on/off control. Typical quiescent current is 100 µA in September 2018 DS3717 Rev 11 1/22 This is information on a product in full production. www.st.com

Contents L4979D, L4979MD Contents 1 Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.2 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.3 Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 SO-20 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.3 SO-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 DS3717 Rev 11

L4979D, L4979MD List of tables List of tables Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 8. Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 9. Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10. Reset time diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 11. SO-8 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 12. SO-20 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 13. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 14. SO-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 15. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DS3717 Rev 11 3/22 3

List of figures L4979D, L4979MD List of figures Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Pins connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Behavior of output current versus regulated voltage V . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 o Figure 4. Watchdog time diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. SO-8 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Thermal fitting model of V in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 reg Figure 9. SO-20 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 10. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. SO-20 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12. Thermal fitting model of V in SO-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 reg Figure 13. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 14. SO-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4/22 DS3717 Rev 11

L4979D, L4979MD Block diagram and pin descriptions 1 Block diagram and pin descriptions Figure 1. Block diagram (cid:24)(cid:24)(cid:57)(cid:57)(cid:15)(cid:15)(cid:3)(cid:3)(cid:20)(cid:20)(cid:24)(cid:24)(cid:19)(cid:19)(cid:3)(cid:3)(cid:80)(cid:80)(cid:36)(cid:36) (cid:57)(cid:57)(cid:76)(cid:76) (cid:57)(cid:57)(cid:86)(cid:86) (cid:57)(cid:57)(cid:82)(cid:82) (cid:38)(cid:38)(cid:82)(cid:82) (cid:57)(cid:57)(cid:70)(cid:70)(cid:90)(cid:90) (cid:74)(cid:74)(cid:81)(cid:81)(cid:71)(cid:71) (cid:90)(cid:90)(cid:68)(cid:68)(cid:87)(cid:87)(cid:70)(cid:70)(cid:75)(cid:75)(cid:71)(cid:71)(cid:82)(cid:82)(cid:74)(cid:74) (cid:38)(cid:38)(cid:87)(cid:87)(cid:90)(cid:90) (cid:58)(cid:58)(cid:76)(cid:76) (cid:57)(cid:57)(cid:82)(cid:82)(cid:79)(cid:79)(cid:87)(cid:87)(cid:68)(cid:68)(cid:74)(cid:74)(cid:72)(cid:72)(cid:3)(cid:3)(cid:85)(cid:85)(cid:72)(cid:72)(cid:73)(cid:73)(cid:72)(cid:72)(cid:85)(cid:85)(cid:72)(cid:72)(cid:81)(cid:81)(cid:70)(cid:70)(cid:72)(cid:72) (cid:40)(cid:40)(cid:81)(cid:81) (cid:53)(cid:53)(cid:72)(cid:72)(cid:86)(cid:86) (cid:57)(cid:57)(cid:70)(cid:70)(cid:85)(cid:85) (cid:85)(cid:85)(cid:72)(cid:72)(cid:86)(cid:86)(cid:72)(cid:72)(cid:87)(cid:87) (cid:38)(cid:38)(cid:87)(cid:87)(cid:85)(cid:85) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:19) Table 2. Pin function SO8 SO20 Pin name Function pin number pin number Enable input If high, regulator, watchdog and reset are 1 1 En operating. If low, regulator, watchdog and reset are shut down. 2 4 gnd Ground reference Ground. These pins are to be connected to a heat 5,6,15,16 gnd spreader electrically grounded Reset output. It is pulled down when output voltage 3 7 Res drops below V or frequency at W is too low. o_th i Reset timing adjust a capacitor between Vcr pin and 4 10 Vcr gnd sets the reset delay time (t ) rd Watchdog timer adjust a capacitor between V pin and 5 11 Vcw cw gnd sets the time response of the watchdog monitor. Watchdog input. If the frequency at this input pin is too 6 14 Wi low, the Reset output is activated. Voltage regulator output Output capacitor >100 nF is 7 17 Vo needed for regulator stability DS3717 Rev 11 5/22 21

Block diagram and pin descriptions L4979D, L4979MD Table 2. Pin function (continued) SO8 SO20 Pin name Function pin number pin number Supply voltage Supply capacitor (e.g. 200 nF) is needed 8 20 Vs for regulator stability. 2, 3, 8, 9, 12, 13, 18, N. C. Not connected 19 Figure 2. Pins connection (top view) (cid:40)(cid:49) (cid:20) (cid:21)(cid:19) (cid:57)(cid:54) (cid:49)(cid:17)(cid:38)(cid:17) (cid:21) (cid:20)(cid:28) (cid:49)(cid:17)(cid:38)(cid:17) (cid:49)(cid:17)(cid:38)(cid:17) (cid:22) (cid:20)(cid:27) (cid:49)(cid:17)(cid:38)(cid:17) (cid:40)(cid:49) (cid:20) (cid:27) (cid:57) (cid:54) (cid:42)(cid:49)(cid:39) (cid:23) (cid:20)(cid:26) (cid:57)(cid:50) (cid:42)(cid:49)(cid:39) (cid:21) (cid:26) (cid:57) (cid:50) (cid:42)(cid:49)(cid:39) (cid:24) (cid:20)(cid:25) (cid:42)(cid:49)(cid:39) (cid:53)(cid:40)(cid:54) (cid:22) (cid:54)(cid:50)(cid:27) (cid:25) (cid:58)(cid:44) (cid:42)(cid:49)(cid:39) (cid:25) (cid:54)(cid:50)(cid:21)(cid:19) (cid:20)(cid:24) (cid:42)(cid:49)(cid:39) (cid:57)(cid:38)(cid:53) (cid:23) (cid:24) (cid:57)(cid:38)(cid:58) (cid:53)(cid:40)(cid:54) (cid:26) (cid:20)(cid:23) (cid:58)(cid:44) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:20) (cid:49)(cid:17)(cid:38)(cid:17) (cid:27) (cid:20)(cid:22) (cid:49)(cid:17)(cid:38)(cid:17) (cid:49)(cid:17)(cid:38)(cid:17) (cid:28) (cid:20)(cid:21) (cid:49)(cid:17)(cid:38)(cid:17) (cid:57)(cid:38)(cid:53) (cid:20)(cid:19) (cid:20)(cid:20) (cid:58)(cid:38)(cid:58) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:21) 6/22 DS3717 Rev 11

L4979D, L4979MD Electrical specifications 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the ratings listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions reported in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality documents. Table 3. Absolute maximum ratings Symbol Parameter Value Unit V DC supply voltage -0.3 to 40 V vsdc I Input current Internally limited vsdc V DC output voltage -0.3 to 6 (1) V vo I DC output current Internally limited vo V Watchdog input voltage -0.3 to V +0.3 V wi vo V Open drain output voltage (RES) -0.3 to V +0.3 V od vo I Open drain output current (RES) Internally limited od V Reset delay voltage -0.3 to V +0.3 V cr vo V Watchdog delay voltage -0.3 to V +0.3 V cw vo V Enable input voltage -0.3 to 40 V en T Junction temperature -40 to 150 °C j V ESD voltage level (HBM-MIL STD 883C) ±2 kV ESD 1. Using the typical application schematic with Cout= 10 µF and Iout=0 A, when the regulator is switched-on, an overshoot exceeding 6 V could occur.This behavior does not impact the reliability of the regulator. Table 4. Thermal data Symbol Parameter SO8 SO16+2+2 Unit R Thermal resistance junction to ambient 130 to 180 50 to 80 °C/W th j-amb DS3717 Rev 11 7/22 21

Electrical specifications L4979D, L4979MD 2.2 Electrical characteristics V = 5.6 V to 31 V; T = -40 °C to 150 °C, unless otherwise specified. s j Table 5. General Pin Symbol Parameter Test condition Min. Typ. Max. Unit V = 13.5 V, I = 150 mA, s o V , V I Quiescent current enable high all 1.5 3 mA s o q I/O currents = 0 V = 13.5 V, I = 0 mA, s o V , V I Quiescent current enable high all 100 200 µA s o q I/O currents = 0 V = 13.5 V, I = 0 mA, s o V , V I Quiescent current enable low all 6 20 µA s o q I/O currents = 0 Thermal protection T 150 190 °C w temperature Thermal protection T temperature 10 °C w_hy hysteresis Table 6. Voltage regulator Pin Symbol Parameter Test condition Min. Typ. Max. Unit V = 5.6 to 31 V; V V Output voltage s 4.90 5.00 5.10 V o o_ref I = 1 to 150 mA o Output short circuit V I V = 13.5 V 150 280 400 mA o short current(1) s Output current V I V = 13.5 V 150 320 500 mA o lim limitation(1) s V = 5.6 to 31 V V , V V Line regulation voltage s 25 mV s o line I = 1 to 150 mA o V V Load regulation voltage I = 1 to 150 mA 25 mV o load o V , V V Drop voltage I = 150 mA 200 400 mV s o dp o V , V SVR Ripple rejection(2) f = 100 Hz 55 dB s o r 1. See Figure 3: Behavior of output current versus regulated voltage Vo. 2. Guaranteed by design. Table 7. Reset Pin Symbol Parameter Test condition Min. Typ. Max. Unit Reset output low R = 5 k to V ; R V ext o 0.4 V es res_l voltage V > 1 V o Reset output high R I V = 5 V 1 µA es res_h leakage current res 8/22 DS3717 Rev 11

L4979D, L4979MD Electrical specifications Table 7. Reset (continued) Pin Symbol Parameter Test condition Min. Typ. Max. Unit Internal pull-up R R With respect to V 12 25 50 k es _p_u resistance o 6% 8% 10% V = 5.6 to 31 V R V Reset threshold voltage s below below below es o_th I = 1 to 150 mA o V V V o_ref o_ref o_ref Reset timing high 44% 47% 50% V V V = 13.5 V cr rhth threshold s V V V o_ref o_ref o_ref Reset timing low 10% 13% 16% V V V = 13.5 V cr rlth threshold s V V V o_ref o_ref o_ref V I Charge current V = 13.5 V 8 17 30 µA cr cr s V I Discharge current V = 13.5 V 8 17 30 µA cr dr s R t Reset delay time(1) V = V - 100 mV 100 250 700 µs es rr_2 o o_th R t Reset pulse delay V = 13.5 V; C = 1 nF 65 150 ms es rd s tr 1. When V becomes lower than 4 V, the reset reaction time decreases down to 2 µs assuring a faster reset o condition in this particular case. Table 8. Watchdog Pin Symbol Parameter Test condition Min. Typ. Max. Unit W V Input high voltage V = 13.5 V 3.5 V i ih s W V Input low voltage V = 13.5 V 1.5 V i il s W V Input hysteresis V = 13.5 V 300 mV i ih s W I Pull down current V = 13.5 V 10 20 µA i i s V V High threshold V = 13.5 V 2.20 2.35 2.50 V cw whth s V V Low threshold V = 13.5 V 0.50 0.65 0.80 V cw wlth s V I Charge current V = 13.5 V; V = 0.1 V 4 7.5 14 µA cw cwc s cw V I Discharge current V = 13.5 V; V = 2.5 V 1.0 2.4 4.5 µA cw cwd s cw V = 13.5 V; V T Watchdog period s 25 50 90 ms cw wop C = 47 nF tw Watchdog output low V = 13.5 V; R t s 6 10 22 ms es wol time C = 47 nF tw DS3717 Rev 11 9/22 21

Electrical specifications L4979D, L4979MD Table 9. Enable Pin Symbol Parameter Test condition Min. Typ. Max. Unit Enable input low E V 1 V n en_l voltage Enable input high E V 3 V n en_h voltage E V Enable input hysteresis 700 1000 1100 mV n en_hy E I Pull down current E = 5 V 2 10 20 µA n _leak n 10/22 DS3717 Rev 11

L4979D, L4979MD Application information 3 Application information 3.1 Voltage regulator The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure a low dropout voltage at current up to 150 mA is achieved. The output voltage is regulated up to transient input supply voltage of 40 V. No functional interruption due to over- voltage pulses is generated. The high precision of the output voltage is obtained with a pre- trimmed reference voltage. A short circuit protection to GND is provided. Figure 3. Behavior of output current versus regulated voltage V o (cid:57)(cid:57)(cid:82)(cid:82) (cid:57)(cid:57)(cid:82)(cid:82)(cid:66)(cid:66)(cid:85)(cid:85)(cid:72)(cid:72)(cid:73)(cid:73) (cid:44)(cid:44)(cid:86)(cid:86)(cid:75)(cid:75)(cid:82)(cid:82)(cid:85)(cid:85)(cid:87)(cid:87) (cid:44)(cid:44)(cid:79)(cid:79)(cid:76)(cid:76)(cid:80)(cid:80) (cid:44)(cid:44)(cid:82)(cid:82)(cid:88)(cid:88)(cid:87)(cid:87) (cid:40)(cid:34)(cid:49)(cid:40)(cid:36)(cid:39)(cid:53)(cid:17)(cid:17)(cid:19)(cid:17)(cid:20) 3.2 Reset The reset circuit monitors the output voltage V . If the output voltage drops below V then o o_th R becomes low with a delay time t . Real t value changes as a non-linear function of es rr rr delta (V - V ). The reset low signal is guaranteed for an output voltage V greater than o-th o o 1 V. When the output voltage becomes higher than V then R goes high with a delay t . This o_th es rd delay is obtained by 512 periods of an oscillator (see fig. 5). The oscillator period is given by: V – V   C  V – V   C  rhth rlth tr rhth rlth tr T = ------------------------------------------------------ + ------------------------------------------------------ OSC I I cr dr and reset pulse delay t is given by: rd t = 512  T rd OSC DS3717 Rev 11 11/22 21

Application information L4979D, L4979MD Table 10. Reset time diagram (cid:58)(cid:76) (cid:57)(cid:82)(cid:88)(cid:87)(cid:66)(cid:87)(cid:75) (cid:57)(cid:82) (cid:31)(cid:3)(cid:87)(cid:85)(cid:85) (cid:55)(cid:82)(cid:86)(cid:70) (cid:87)(cid:85)(cid:85) (cid:57)(cid:85)(cid:75)(cid:87)(cid:75) (cid:57)(cid:70)(cid:85) (cid:57)(cid:85)(cid:79)(cid:87)(cid:75) (cid:87)(cid:85)(cid:71)(cid:3)(cid:32)(cid:3)(cid:24)(cid:20)(cid:21)(cid:3)(cid:55)(cid:82)(cid:86)(cid:70) (cid:53)(cid:72)(cid:86) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:23) 3.3 Watchdog The watchdog input W monitors a connected microcontroller. If pulses are missing, the i reset output R is set to low. The pulse sequence time can be set within a wide range es through the external capacitor C . The watchdog circuit discharges the capacitor C with tw tw the constant current I . If the lower threshold V is reached, a watchdog reset is cwd wlth generated. To prevent this reset, the microcontroller must generate a positive edge during the discharge of the capacitor before the voltage has reached the threshold V . In order to wlth calculate the minimum time T during which the microcontroller must generate the positive dis edge, the following equation can be used: V – V   C = I  T whth wlth tw cwd dis Each W positive edge switches the current source from discharging to charging; the same i happens when the lower V threshold is reached. When the voltage reaches the upper wlth threshold V the current switches from charging to discharging. The result is a saw tooth whth voltage at the watchdog timer capacitor C . tw Figure 4. Watchdog time diagram (cid:3) (cid:58)(cid:76)(cid:3) (cid:55)(cid:90)(cid:82)(cid:83) (cid:57)(cid:90)(cid:75)(cid:87)(cid:75) (cid:57)(cid:70)(cid:90)(cid:3) (cid:57)(cid:90)(cid:79)(cid:87)(cid:75) (cid:55)(cid:71)(cid:76)(cid:86) (cid:87)(cid:90)(cid:82)(cid:79) (cid:53)(cid:72)(cid:86)(cid:3) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:24) 12/22 DS3717 Rev 11

L4979D, L4979MD Package and PCB thermal data 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 5. SO-8 PC board (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:20)(cid:24)(cid:27) 1. Layout condition of R and Z measurements (PCB: FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 mmth, Copptehr areas: from minimum pad lay-out to 2cm2). Figure 6. R vs PCB copper area in open box free air condition thj-amb (cid:53)(cid:55)(cid:43)(cid:77)(cid:66)(cid:68)(cid:80)(cid:69)(cid:3)(cid:89)(cid:86)(cid:3)(cid:38)(cid:88)(cid:3)(cid:75)(cid:72)(cid:68)(cid:87)(cid:86)(cid:76)(cid:81)(cid:78)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68) (cid:20)(cid:26)(cid:19) (cid:20)(cid:25)(cid:19) (cid:53)(cid:55)(cid:43)(cid:77)(cid:68)(cid:80)(cid:69) (cid:12) (cid:58) (cid:20)(cid:24)(cid:19) (cid:38)(cid:18) (cid:131) (cid:11) (cid:69) (cid:80) (cid:20)(cid:23)(cid:19) (cid:68) (cid:66) (cid:43)(cid:77) (cid:55) (cid:20)(cid:22)(cid:19) (cid:53) (cid:20)(cid:21)(cid:19) (cid:20)(cid:20)(cid:19) (cid:19) (cid:19)(cid:17)(cid:24) (cid:20) (cid:20)(cid:17)(cid:24) (cid:21) (cid:21)(cid:17)(cid:24) (cid:51)(cid:38)(cid:37)(cid:3)(cid:38)(cid:88)(cid:3)(cid:75)(cid:72)(cid:68)(cid:87)(cid:86)(cid:76)(cid:81)(cid:78)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68)(cid:3)(cid:11)(cid:70)(cid:80)(cid:65)(cid:21)(cid:12) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:27) DS3717 Rev 11 13/22 21

Package and PCB thermal data L4979D, L4979MD Figure 7. SO-8 thermal impedance junction ambient single pulse (cid:61)(cid:55)(cid:43)(cid:3)(cid:11)(cid:131)(cid:38)(cid:18)(cid:58)(cid:12) (cid:20)(cid:19)(cid:19)(cid:19) (cid:38)(cid:88)(cid:32)(cid:21)(cid:3)(cid:70)(cid:80)(cid:21) (cid:38)(cid:88)(cid:32)(cid:73)(cid:82)(cid:82)(cid:87)(cid:3)(cid:83)(cid:85)(cid:76)(cid:81)(cid:87) (cid:20)(cid:19)(cid:19) (cid:20)(cid:19) (cid:20) (cid:19)(cid:17)(cid:20) (cid:19)(cid:17)(cid:19)(cid:19)(cid:19)(cid:20) (cid:19)(cid:17)(cid:19)(cid:19)(cid:20) (cid:19)(cid:17)(cid:19)(cid:20) (cid:19)(cid:17)(cid:20) (cid:20) (cid:20)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:19)(cid:19)(cid:19) (cid:55)(cid:76)(cid:80)(cid:72)(cid:3)(cid:11)(cid:86)(cid:12) (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:28) Equation 1: pulse calculation formula Z = R +Z 1– TH TH THtp where  = t /T P Figure 8. Thermal fitting model of V in SO-8 reg (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:20)(cid:25)(cid:20) 14/22 DS3717 Rev 11

L4979D, L4979MD Package and PCB thermal data Table 11. SO-8 thermal parameter Area (cm2) Footprint 2 R1 (°C/W) 4 R2 (°C/W) 2 R3 (°C/W) 2 R4 (°C/W) 41 R5 (°C/W) 40 R6 (°C/W) 58 40 C1 (W.s/°C) 0.0003 C2 (W.s/°C) 0.0025 C3 (W.s/°C) 0.03 C4 (W.s/°C) 0.04 C5 (W.s/°C) 0.1 C6 (W.s/°C) 1.05 2 4.2 SO-20 thermal data Figure 9. SO-20 PC board (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:20)(cid:19) 1. Layout condition of R and Z measurements (PCB: FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 mmth, Copptehr areas: from minimum pad lay-out to 6cm2). DS3717 Rev 11 15/22 21

Package and PCB thermal data L4979D, L4979MD Figure 10. R vs PCB copper area in open box free air condition thj-amb (cid:53)(cid:55)(cid:43)(cid:77)(cid:66)(cid:68)(cid:80)(cid:69)(cid:3)(cid:89)(cid:86)(cid:3)(cid:38)(cid:88)(cid:3)(cid:75)(cid:72)(cid:68)(cid:87)(cid:86)(cid:76)(cid:81)(cid:78)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68) (cid:26)(cid:19) (cid:25)(cid:27) (cid:25)(cid:25) (cid:53)(cid:55)(cid:43)(cid:77)(cid:68)(cid:80)(cid:69) (cid:12) (cid:25)(cid:23) (cid:58) (cid:18) (cid:38) (cid:25)(cid:21) (cid:131) (cid:11) (cid:69) (cid:80) (cid:25)(cid:19) (cid:68) (cid:66) (cid:43)(cid:77) (cid:24)(cid:27) (cid:55) (cid:53) (cid:24)(cid:25) (cid:24)(cid:23) (cid:24)(cid:21) (cid:24)(cid:19) (cid:19) (cid:20) (cid:21) (cid:22) (cid:23) (cid:24) (cid:25) (cid:26) (cid:51)(cid:38)(cid:37)(cid:3)(cid:38)(cid:88)(cid:3)(cid:75)(cid:72)(cid:68)(cid:87)(cid:86)(cid:76)(cid:81)(cid:78)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68)(cid:3)(cid:11)(cid:70)(cid:80)(cid:65)(cid:21)(cid:12) (cid:40)(cid:34)(cid:49)(cid:40)(cid:36)(cid:39)(cid:53)(cid:17)(cid:17)(cid:19)(cid:18)(cid:18) Figure 11. SO-20 thermal impedance junction ambient single pulse (cid:61)(cid:55)(cid:43)(cid:3)(cid:11)(cid:131)(cid:38)(cid:18)(cid:58)(cid:12) (cid:20)(cid:19)(cid:19) (cid:38)(cid:88)(cid:32)(cid:25)(cid:3)(cid:70)(cid:80)(cid:21) (cid:38)(cid:88)(cid:32)(cid:73)(cid:82)(cid:82)(cid:87)(cid:3)(cid:83)(cid:85)(cid:76)(cid:81)(cid:87) (cid:20)(cid:19) (cid:20) (cid:19)(cid:17)(cid:19)(cid:19)(cid:19)(cid:20) (cid:19)(cid:17)(cid:19)(cid:19)(cid:20) (cid:19)(cid:17)(cid:19)(cid:20) (cid:19)(cid:17)(cid:20) (cid:20) (cid:20)(cid:19) (cid:20)(cid:19)(cid:19) (cid:55)(cid:76)(cid:80)(cid:72)(cid:3)(cid:11)(cid:86)(cid:12) (cid:40)(cid:34)(cid:49)(cid:40)(cid:36)(cid:39)(cid:53)(cid:17)(cid:17)(cid:19)(cid:18)(cid:19) 16/22 DS3717 Rev 11

L4979D, L4979MD Package and PCB thermal data Equation 2: pulse calculation formula Z = R +Z 1– TH TH THtp where  = t /T P Figure 12. Thermal fitting model of V in SO-20 reg (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:20)(cid:25)(cid:20) Table 12. SO-20 thermal parameter Area (cm2) Footprint 2 R1 (°C/W) 4 R2 (°C/W) 2 R3 (°C/W) 2.2 R4 (°C/W) 10 R5 (°C/W) 15 R6 (°C/W) 35 18 C1 (W.s/°C) 0.0003 C2 (W.s/°C) 0.0025 C3 (W.s/°C) 0.015 C4 (W.s/°C) 0.15 C5 (W.s/°C) 1.5 C6 (W.s/°C) 4 7 DS3717 Rev 11 17/22 21

Package information L4979D, L4979MD 5 Package information ® 5.1 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 SO-8 package information Figure 13. SO-8 package dimensions (cid:42)(cid:36)(cid:51)(cid:42)(cid:38)(cid:41)(cid:55)(cid:19)(cid:19)(cid:21)(cid:19)(cid:25) 18/22 DS3717 Rev 11

L4979D, L4979MD Package information Table 13. SO-8 mechanical data mm inch Symbol Min. Typ. Max. Min. Typ. Max. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D(1) 4.80 5.00 0.189 0.197 E 3.80 4.00 0.15 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k 0° 8° 0° 8° ddd 0.10 0.004 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm (0.006 inch) in total (both side). DS3717 Rev 11 19/22 21

Package information L4979D, L4979MD 5.3 SO-20 package information Figure 14. SO-20 package dimensions (cid:40)(cid:34)(cid:49)(cid:40)(cid:36)(cid:39)(cid:53)(cid:17)(cid:17)(cid:19)(cid:17)(cid:24) Table 14. SO-20 mechanical data mm inch Dim. Min. Typ. Max. Min. Typ. Max. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.200 C 0.23 0.32 0.009 0.013 D(1) 12.60 13.00 0.496 0.512 E 7.40 7.60 0.291 0.299 e 1.27 0.050 H 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.40 1.27 0.016 0.050 k 0° (min.), 8° (max.) ddd 0.10 0.004 1. “D” dimension does not include mold flash, protusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side. 20/22 DS3717 Rev 11

L4979D, L4979MD Revision history 6 Revision history Table 15. Document revision history Date Revision Changes 01-Jun-2004 3 Changed the values of the parameter “Reset timing high/low threshold. Pin Connection SO-20 changed. Changed some textes in the Features 01-Jul-2004 4 and table 2. Changed some values in the tables 3, 4 and 5. Changed some textes in the sections 2, 3 and 4. 01-Oct-2004 5 Changed from Product Preview to final datasheet. 01-Feb-2006 6 Modified the orderable part numbers for Tape & Reel. Changed document template. 04-Apr-2011 7 Added Chapter 4: Package and PCB thermal data 27-Mar-2012 8 Update Table 3: Absolute maximum ratings 19-Sep-2013 9 Updated Disclaimer. Updated template. Removed the tube version on the SO-8 package on 23-Feb-2018 10 the Table 1: Device summary. Updated Section 2.1: Absolute maximum ratings Added the feature “AEC-Q100 qualified” in cover page with the logo 20-Sep-2018 11 automotive. DS3717 Rev 11 21/22 21

L4979D, L4979MD IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved 22/22 DS3717 Rev 11

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