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ICGOO电子元器件商城为您提供L4949ED-E由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 L4949ED-E价格参考。STMicroelectronicsL4949ED-E封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC Positive Fixed 1 Output 5V 100mA 8-SO。您可以下载L4949ED-E参考资料、Datasheet数据手册功能说明书,资料中有L4949ED-E 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC REG LDO 5V 0.1A 8SO低压差稳压器 5V MULTIFUNCTION LDO |
产品分类 | |
品牌 | STMicroelectronics |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 电源管理 IC,低压差稳压器,STMicroelectronics L4949ED-E- |
数据手册 | |
产品型号 | L4949ED-E |
产品种类 | 低压差稳压器 |
供应商器件封装 | 8-SO |
其它名称 | 497-11734-5 |
其它有关文件 | http://www.st.com/web/catalog/sense_power/FM1965/SC1036/PF250062?referrer=70071840 |
包装 | 管件 |
商标 | STMicroelectronics |
回动电压—最大值 | 500 mV |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Tube |
封装/外壳 | 8-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SOIC-8 |
工作温度 | -40°C ~ 125°C |
工厂包装数量 | 100 |
最大工作温度 | + 125 C |
最大输入电压 | 40 V |
最小工作温度 | - 40 C |
标准包装 | 100 |
电压-跌落(典型值) | 0.3V @ 100mA |
电压-输入 | 最高 28V |
电压-输出 | 5V |
电流-输出 | 100mA |
电流-限制(最小值) | 120mA |
稳压器拓扑 | 正,固定式 |
稳压器数 | 1 |
系列 | L4949ED |
线路调整率 | 20 mV |
负载调节 | 30 mV |
输出电压 | 5 V |
输出电流 | 100 mA |
输出类型 | Fixed |
L4949ED-E L4949EP-E Automotive multifunction very low drop voltage regulator Datasheet - production data Description The L4949ED-E and L4949EP-E are monolithic integrated 5V voltage regulators with a very low dropout output and additional functions as power- on reset and input voltage sense. They are designed for supplying the microcomputer controlled systems especially in automotive SO-8 applications. SO-20W (12+4+4) Features AEC-Q100 qualified ECOPACK®: lead free and RoHS compliant Operating DC supply voltage range 5 V - 28 V Transient supply voltage up to 40 V Extremely low quiescent current in standby High precision standby output voltage 5V±1% Output current capability up to 100 mA Very low dropout voltage less than 0.5 V Reset circuit sensing the output voltage Programmable reset pulse delay with external capacitor Voltage sense comparator Thermal shutdown and short circuit protections Table 1. Device s ummary Order codes Package Tube Tape and Reel SO-8 - L4949EDTR-E SO-20W L4949EP-E L4949EPTR-E September 2018 DS6614 Rev 4 1/19 This is information on a product in full production. www.st.com
Contents L4949ED-E, L4949EP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 Supply voltage transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.4 Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.5 Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.6 Sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.2 SO-8 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.3 SO-20 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 DS6614 Rev 4
L4949ED-E, L4949EP-E List of tables List of tables Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin definitions and functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 9. SO-8 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 10. SO-20 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DS6614 Rev 4 3/19 3
List of figures L4949ED-E, L4949EP-E List of figures Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 4. Foldback characteristic of V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 O Figure 5. Output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Quiescent current vs supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Block circuit of reset circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. SO-8 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 10. SO20 TP package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram Note: The block diagram illustrates only a major internal device functionality and it is not intended to mimic any details of hardware design Figure 2. Configuration diagram (top view) SO-8 SO-20 DS6614 Rev 4 5/19 18
Block diagram and pin description L4949ED-E, L4949EP-E Table 2. Pin definitions and functions Pin N° Symbol Function SO-8 SO-20 Input supply voltage. Block to GND via an external 1 19 V S capacitor (see Figure 3). Sense input pin to supervise input voltage. Connect via an 2 20 S I external voltage divider connected to V and to GND. S Preregulator output voltage. For details, see Section 3.4: 3 1 V Z Preregulator. Reset pulse delay adjustment. Connecting this pin via a 4 2 C T capacitor to GND 4, 5, 6, 7, 14, 5 GND Ground reference 15, 16, 17 Reset output. It is pulled down when the output voltage 6 10 RES goes below V . RT Sense output. This open collector pin must be connected to 7 11 S V via an external resistor. It is pulled down whenever O OUT the S voltage becomes lower than an internal voltage. I Output voltage. Block to GND via an external capacitor (see 8 12 V OUT Figure 3) - 3, 8, 9, 13, 18 NC Not connected pins 6/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Electrical specifications 2 Electrical specifications 2.1 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Value Unit V DC operating supply voltage 28 V SDC V Transient supply voltage (T < 1s) 40 V STR I Output current Internally limited O V Output voltage 20 V O V , V Output voltage 20 V RES SO I , I Output current 5 mA RES SO V Reset delay voltage 7 V CT V Sense input voltage 28 V SIDC V Preregulator output voltage 7 V Z I Preregulator output current 5 mA Z T Junction temperature -40 to +150 °C J T Storage temperature range -55 to +150 °C stg Note: The circuit is ESD protected according to MIL-STD-883C. 2.2 Thermal data Table 4. Thermal data Symbol Description SO-8 SO20L Unit R Thermal Resistance Junction-ambient (max) 200 50 °C/W th j-amb R Thermal Resistance Junction-pins (max) 15 °C/W th j-pins TJSD Thermal Shutdown Junction temperature 165 °C DS6614 Rev 4 7/19 18
Electrical specifications L4949ED-E, L4949EP-E 2.3 Electrical characteristics V = 14 V; -40 °C < T < 125 °C unless otherwise specified S j Table 5. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit V Output voltage T = 25 °C; I = 1 mA 4.95 5 5.05 V O J O V Output voltage 6 V < V < 28 V, 1 mA < I < 50 mA 4.90 5 5.10 V O IN O V = 40 V; V Output voltage IN 4.75 5.25 V O T < 1 s; 5 mA < I < 100 mA O I = 10 mA 0.1 0.25 V O V Dropout voltage I = 50 mA 0.2 0.4 V DP O I = 100 mA 0.3 0.5 V O Input to output voltage V difference in undervoltage V = 4 V, I = 35 mA 0.4 V IO IN O condition I (1) Max output leakage V = 25 V, V = 5.5 V 20 50 80 µA outh IN O V Line regulation 6 V < V < 28 V; I = 1 mA 20 mV OL IN O V Load regulation 1 mA < I < 100 mA 30 mV OLO O V = 4.5 V 105 200 400 mA O I Current limit V = 4.5 V; T = 25 °C 120 400 mA LIM O J VO = 0 V(2) 100 mA I Quiescent current I = 0.3 mA; T < 100 °C 200 300 µA QSE O J I Quiescent current I = 100 mA 5 mA Q O 1. With this test we guarantee that with no output current the output voltage will not exceed 5.5V 2. Foldback characteristic Table 6. Reset Symbol Parameter Test condition Min. Typ. Max. Unit VO - V Reset threshold voltage V RT 0.5V V Reset threshold hysteresis 50 100 200 mV RTH t Reset pulse delay C = 100 nF; T 100 µs 55 100 180 ms RD T R V Reset output low voltage R = 10 K to V V 1.5V 0.4 V RL RES O S Reset output high leakage I V = 5 V 1 µA RH current RES V Delay comparator threshold 2 V CTth Delay comparator threshold V 100 mV CTth, hy hysteresis 8/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Electrical specifications Table 7. Sense Symbol Parameter Test condition Min. Typ. Max. Unit V Sense low threshold 1.16 1.23 1.35 V st V Sense threshold hysteresis 20 100 200 mV sth V 1.16 V; V 3 V V Sense output low voltage SI S 0.4 V SL R = 10 K to V SO O I Sense output leakage V = 5 V; V 1.5 V 1 µA SH SO SI I Sense input current V = 0 -20 -8 -3 µA SI SI Table 8. Preregulator Symbol Parameter Test condition Min. Typ. Max. Unit V Preregulator output voltage I = 10 µA 4.5 5 6 V Z Z I Preregulator output current 10 µA Z DS6614 Rev 4 9/19 18
Application information L4949ED-E, L4949EP-E 3 Application information Figure 3. Application circuit Note: For stability: C 1µF, C 4.7µF, ESR < 10 at 10KHz. Recommended for application: C S O S = C = 10 µF to 100 µF O 3.1 Supply voltage transient High supply voltage transients can cause a reset output signal disturbance. For supply voltages greater than 8V the circuit shows a high immunity of the reset output against supply transients of more than 100V/µs. For supply voltages less than 8V supply transients of more than 0.4V/µs can cause a reset signal disturbance. To improve the transient behaviour for supply voltages less than 8V a capacitor at pin V Z can be used. This capacitor (C3 1 µF) reduces also the output noise. 3.2 Functional description The L4949ED-E and L4949EP-E are monolithic integrated voltage regulator, based on the STM modular voltage regulator approach. Several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. Nevertheless, it is suitable also in other applications where the 10/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Application information present functions are required. The modular approach of this device allows to get easily also other features and functions when required. 3.3 Voltage regulator The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating element. Figure 4. Foldback characteristic of V O With this structure very low dropout voltage at currents up to 100mA is obtained. The dropout operation of the standby regulator is maintained down to 3V input supply voltage. The output voltage is regulated up to the transient input supply voltage of 40V. With this feature no functional interruption due to overvoltage pulses is generated. The typical curve showing the standby output voltage as a function of the input supply voltage is shown in Figure 5. The current consumption of the device (quiescent current) is less than 300 µA. To reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled, the quiescent current as a function of the supply input voltage is shown in Figure 6. DS6614 Rev 4 11/19 18
Application information L4949ED-E, L4949EP-E Figure 5. Output voltage vs input voltage Figure 6. Quiescent current vs supply voltage 3.4 Preregulator To improve the transient immunity a preregulator stabilizes the internal supply voltage to 5 V. This internal voltage is present at Pin 3 (V ). This voltage should not be used as an Z output because the output capability is very small (10 µA). This output may be used as an option when a better transient behaviour for supply voltages less than 8 V is required (see also application note). In this case a capacitor (100 nF - 1 µF) must be connected between pin V and GND. If this Z feature is not used pin V must be left open. Z 12/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Application information 3.5 Reset circuit The block circuit diagram of the reset circuit is shown in Figure 7. The reset circuit supervises the output voltage. The reset threshold of 4.5 V is defined with the internal reference voltage and standby output divider. The reset pulse delay time t , is defined with the charge time of an external capacitor C : RD T C 2V T t = ------------------- RD 2A The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor CT and is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity. Standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. The nominal reset delay time is generated for standby output voltage drops longer than approximately 50ms. The typical reset output waveforms are shown in Figure 8. 3.6 Sense comparator The sense comparator compares an input signal with an internal voltage reference of typical 1.23V. The use of an external voltage divider makes this comparator very flexible in the application. It can be used to supervise the input voltage either before or after the protection diode and to give additional informations to the microprocessor like low voltage warnings. DS6614 Rev 4 13/19 18
Application information L4949ED-E, L4949EP-E Figure 7. Block circuit of reset circuit Figure 8. Waveforms 14/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Package and packing information 4 Package and packing information ® 4.1 ECOPACK packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.2 SO-8 TP package information Table 9. SO-8 TP mechanical data mm Dim. Min. Typ. Max. A 1.75 a1 0.1 0.25 a2 1.65 a3 0.65 0.85 b 0.35 0.48 b1 0.19 0.25 C 0.25 0.5 c1 45° (typ.) D(1) 4.8 5.0 E 5.8 6.2 e 1.27 e3 3.81 F(1) 3.8 4.0 L 0.4 1.27 M 0.6 S 8° (max.) 1. D and F do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm (.006inch). DS6614 Rev 4 15/19 18
Package and packing information L4949ED-E, L4949EP-E Figure 9. SO-8 TP package dimensions 4.3 SO-20 TP package information Table 10. SO-20 TP mechanical data mm Dim. Min. Typ. Max. A 2.35 2.65 A1 0.1 0.3 B 0.33 0.51 C 0.23 0.32 D 12.6 13 E 7.4 7.6 e 1.27 H 10 10.65 16/19 DS6614 Rev 4
L4949ED-E, L4949EP-E Package and packing information Table 10. SO-20 TP mechanical data (continued) mm Dim. Min. Typ. Max. h 0.25 0.75 L 0.4 1.27 K 0 (min.)8 (max.) Figure 10. SO20 TP package dimensions DS6614 Rev 4 17/19 18
Revision history L4949ED-E, L4949EP-E 5 Revision history Table 11. Document revision history Date Revision Description of changes 24-Nov-2009 1 Initial release. 20-Sep-2013 2 Updated disclaimer. 28-Feb-2018 3 Removed tube version for SO-8 package. 24-Sep-2018 4 Updated : Features 18/19 DS6614 Rev 4
L4949ED-E, L4949EP-E IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS6614 Rev 4 19/19 19