Product Order Technical Tools & Support & Folder Now Documents Software Community ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 ISO722x Dual-Channel Digital Isolators 1 Features A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive • 1,5,25,and150-MbpsSignalingRateOptions 1 isolation barrier. Across the isolation barrier, a – LowChannel-to-ChannelOutputSkew; differential comparator receives the logic transition 1-nsMax information, then sets or resets a flip-flop and the – LowPulse-WidthDistortion(PWD);1-nsMax output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level – LowJitterContent;1nsTypat150Mbps of the output. If this dc-refresh pulse is not received • 50kV/μsTypicalTransientImmunity every 4 μs, the input is assumed to be unpowered or • Operateswith2.8-V(C-Grade), not being actively driven, and the failsafe circuit 3.3-V,or5-VSupplies drivestheoutputtoalogichighstate. • 4-kVESDProtection The small capacitance and resulting time constant provide fast operation with signaling rates available • HighElectromagneticImmunity from 0 Mbps (DC) to 150 Mbps (The signaling rate of • –40°Cto+125°COperatingRange a line is the number of voltage transitions that are • Typical28-YearLifeatRatedVoltage made per second expressed in the units bps). The A- (seeHigh-VoltageLifetimeoftheISO72xFamily option, B-option, and C-option devices have TTL ofDigitalIsolatorsandIsolationCapacitorLifetime input thresholds and a noise filter at the input that Projection) prevents transient pulses from being passed to the output of the device. The M-option devices have • Safety-RelatedCertifications CMOS V /2 input thresholds and do not have the CC – VDEBasicInsulationwith4000-VPKVIOTM,560 inputnoisefilterandtheadditionalpropagationdelay. V V perDINVDEV0884-11:2017-01 PK IORM The ISO7220x and ISO7221x family of devices andDINEN61010-1(VDE0411-1) requiretwosupplyvoltagesof2.8V(C-Grade),3.3V, – 2500V IsolationperUL1577 RMS 5 V, or any combination. All inputs are 5-V tolerant – CSAApprovedforIEC60950-1andIEC when supplied from a 2.8-V or 3.3-V supply and all 62368-1 outputsare4-mACMOS. The ISO7220x and ISO7221x family of devices are 2 Applications characterized for operation over the ambient • IndustrialFieldbus temperaturerangeof –40°Cto+125°C. – Modbus DeviceInformation(1) – Profibus™ PARTNUMBER PACKAGE BODYSIZE(NOM) – DeviceNet™DataBuses ISO7220x SOIC(8) 4.90mm×3.91mm • ComputerPeripheralInterface ISO7221x • ServoControlInterface (1) For all available packages, see the orderable addendum at • DataAcquisition theendofthedatasheet. 3 Description SimplifiedSchematic The ISO7220x and ISO7221x family devices are VCCI VCCO Isolation dual-channeldigitalisolators.TofacilitatePCBlayout, Capacitor the channels are oriented in the same direction in the INx OUTx ISO7220xandinoppositedirectionsintheISO7221x. These devices have a logic input and output buffer separated by TI’s silicon-dioxide (SiO ) isolation 2 GNDI GNDO barrier, providing galvanic isolation of up to 4000 V PK VCCIandGNDIaresupplyandground per VDE. Used in conjunction with isolated power connectionsrespectivelyfortheinput supplies, these devices block high voltage and isolate channels. grounds, as well as prevent noise currents on a data V andGNDOaresupplyandground CCO bus or other circuits from entering the local ground connectionsrespectivelyfortheoutput andinterferingwithordamagingsensitivecircuitry. channels. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com Table of Contents 1 Features.................................................................. 1 Supplies...................................................................17 2 Applications........................................................... 1 6.18 SwitchingCharacteristics—2.8-VVCC1andVCC2 Supplies...................................................................17 3 Description............................................................. 1 6.19 InsulationCharacteristicsCurves.........................18 4 RevisionHistory..................................................... 2 6.20 TypicalCharacteristics..........................................19 5 PinConfigurationandFunctions......................... 6 7 ParameterMeasurementInformation................21 6 Specifications......................................................... 6 8 DetailedDescription............................................ 23 6.1 AbsoluteMaximumRatings......................................6 8.1 Overview.................................................................23 6.2 ESDRatings..............................................................6 8.2 FunctionalBlockDiagram.......................................23 6.3 RecommendedOperatingConditions.......................7 8.3 FeatureDescription.................................................24 6.4 ThermalInformation..................................................7 8.4 DeviceFunctionalModes........................................24 6.5 PowerRatings...........................................................7 9 ApplicationandImplementation........................ 25 6.6 InsulationSpecifications............................................8 9.1 ApplicationInformation............................................25 6.7 Safety-RelatedCertifications.....................................9 9.2 TypicalApplication..................................................25 6.8 SafetyLimitingValues..............................................9 10 PowerSupplyRecommendations..................... 27 6.9 ElectricalCharacteristics—5-VV andV CC1 CC2 Supplies...................................................................10 11 Layout................................................................... 27 6.10 ElectricalCharacteristics—5-VV and3.3-VV 11.1 LayoutGuidelines.................................................27 CC1 CC2 Supply......................................................................11 11.2 LayoutExample....................................................27 6.11 ElectricalCharacteristics—3.3-VVCC1and5-VVCC2 12 DeviceandDocumentationSupport................. 28 Supply .....................................................................12 12.1 DeviceSupport......................................................28 6.12 ElectricalCharacteristics—3.3-VV andV CC1 CC2 12.2 DocumentationSupport........................................28 Supplies...................................................................13 12.3 RelatedLinks........................................................28 6.13 ElectricalCharacteristics—2.8-VV andV CC1 CC2 Supplies...................................................................13 12.4 ReceivingNotificationofDocumentationUpdates28 6.14 SwitchingCharacteristics—5-VV andV 12.5 CommunityResources..........................................28 CC1 CC2 Supplies...................................................................14 12.6 Trademarks...........................................................29 6.15 SwitchingCharacteristics—5-VV and3.3-V 12.7 ElectrostaticDischargeCaution............................29 CC1 VCC2Supply.............................................................15 12.8 Glossary................................................................29 6.16 SwitchingCharacteristics—3.3-VCC1and5-VVCC2 13 Mechanical,Packaging,andOrderable Supplies...................................................................16 Information........................................................... 29 6.17 SwitchingCharacteristics—3.3-VV andV CC1 CC2 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionO(April2017)toRevisionP Page • Changed(VDEV0884-10):2006-12toDINVDEV0884-11:2017-01throughoutthedocument......................................... 1 • ChangedCSAApprovedforComponentAcceptanceNotice5AandIEC60950-1toCSAApprovedforIEC60950-1 andIEC62368-1throughoutthedocument........................................................................................................................... 1 • AddedthebasicinsulationworkingvoltageforCSAintheSafety-RelatedCertificationstable............................................ 9 • ChangedtheVDEcertificationnumberfrom40016131to40047657intheSafety-RelatedCertificationstable..................9 • Changedthemaximumpropagationdelayandpulse-widthdistortionineachSwitchingCharacteristicstable .................14 • Added±10%fortheV andV voltagesintheconditionstatementoftheSwitchingCharacteristics—5-VV CC1 CC2 CC1 andV Suppliestable ....................................................................................................................................................... 14 CC2 • ChangedISO722xtoISO7220forallpartnumbersfortheChannel-to-channeloutputskewparameterineach SwitchingCharacteristictable.............................................................................................................................................. 14 ChangesfromRevisionN(September2015)toRevisionO Page • ChangedtheDissipationCharacteristicstabletoPowerRatings.CombinedtheDINVVDEV0884-10(VDEV 0884-10):2006-12InsulationCharacteristicstableIECPackageCharacteristics,andIEC60664-1RatingsTablein theInsulationSpecificationstable.ChangedtheRegulatoryInformationtabletoSafety-RelatedCertifications..................7 • Deletedthemaximumsurgevoltage,4000V forVDEintheSafety-RelatedCertificationstable...................................... 9 PK 2 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 • ChangedtheCSAinformationintheSafety-RelatedCertificationstable.............................................................................. 9 • AddedtheReceivingNotificationofDocumentationUpdatessection ................................................................................ 28 • ChangedtheElectrostaticDischargeCautionsection......................................................................................................... 28 ChangesfromRevisionM(October2014)toRevisionN Page • ChangedtheVDECerificationfrom:DINEN60747-5-5(VDE0884-5)to:DINVVDEV0884-10(VDEV0884- 10):2006-12throughoutthedocument................................................................................................................................... 1 • UpdatedtheSimplifiedSchematictoahigherqualityversion............................................................................................... 1 • ChangedthemaxvalueoftheINandOUTvoltagefrom6toV +0.5intheAbsoluteMaximumRatingstable...............6 CC • ChangedL(I01)MINvaluefrom4.8to4intheIECPackageCharacteristicstable.............................................................. 8 • AddedtheJEDECpackagedimensionsnoteintheIECPackageCharacteristicstable....................................................... 8 • ChangedL(I01)MINvaluefrom4.8to4intheIECPackageCharacteristicstable.............................................................. 8 • AddedtheDTIparametertotheIECPackageCharacteristicstable..................................................................................... 8 • ChangedtheDTItestconditionFrom:IEC60112/VDE0303Part1To:DINEN60112(VDE0303-11);IEC60112........8 • Added=150°CtoinsulationresistancetestconditionintheDINVVDEV0884-10(VDEV0884-10):2006-12 InsulationCharacteristicstable.............................................................................................................................................. 8 • AddedtablerowwithinputsideV =XtotheISO7220xorISO7221xFunctiontable...................................................... 24 CC ChangesfromRevisionL(January2012)toRevisionM Page • ChangedthetitleofthisdatasheettoISO722xDualChannelDigitalIsolators ................................................................... 1 • AddedPinConfigurationandFunctionssection,HandlingRatingtable,DissipationRatingstable,Feature Descriptionsection,DeviceFunctionalModes,ApplicationandImplementationsection,PowerSupply Recommendationssection,Layoutsection,DeviceandDocumentationSupportsection,andMechanical, Packaging,andOrderableInformationsection,changedThermalInformationtable ........................................................... 1 • UpdatedtheFeaturessection ............................................................................................................................................... 1 • AddedperVDEto4000V insecondsentenceofDescription .......................................................................................... 1 PK • UpdatedtheRegulatoryInformationTable............................................................................................................................. 6 • AddedtheminandmaxvaluestotheStoragetemperatureparameterintheAbsoluteMaximumRatingstable................6 • ChangedinROCtableMaxcol,V rowfromVCCto5.5 .................................................................................................... 7 IH • ChangedtheL(I01)parameternametoexternalclearance(CLR)andL(I02)toexternalcreepage(CPG).Also changedtheinput-to-outputtestvoltage(V )parameternametoapparentcharge(q ) ................................................... 8 PR pd • ChangedtheDeviceOptionstable,InputThresholdcolumnfrom≠symbolto~symbol6places .................................... 24 • ChangedIsolationGlossary ................................................................................................................................................ 28 ChangesfromRevisionK(January2010)toRevisionL Page • ChangedFeatureFrom:Operateswith3.3-Vor5-VSuppliesTo:Operateswith2.8-V(C-Grade),3.3-Vor5-VSupplies.1 • ChangedFeatureFrom:4000-V Isolation,560V V To:4000-V V ,560V V perIEC60747-5-2 peak peak IORM PK IOTM PK IORM (VDE0884,Rev2) ................................................................................................................................................................. 1 • AddeddeviceoptionstoV intheRECOMMENDEDOPERATINGCONDITIONStable................................................... 7 CC • ChangedNote:(1)intheRECOMMENDEDOPERATINGCONDITIONStable................................................................... 7 • ChangedtheCTIMINvalueFrom:≥175VTo:≥400V......................................................................................................... 8 • UpdatedtheRegulatoryInformationtable.............................................................................................................................. 9 • ChangedI andI testconditionsinthe5-Vtable......................................................................................................... 10 CC1 CC2 • ChangedTableNote:(1)...................................................................................................................................................... 10 • ChangedI andI testconditionsintheV at5V,V at3.3Vtable...................................................................... 11 CC1 CC2 CC1 CC2 • ChangedTableNote:(1)...................................................................................................................................................... 11 Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com • ChangedI andI testconditionsintheV at3.3V,V at5Vtable...................................................................... 12 CC1 CC2 CC1 CC2 • ChangedTableNote(1)....................................................................................................................................................... 12 • ChangedI andI testconditionsintheV andV at3.3Vtable.......................................................................... 13 CC1 CC2 CC1 CC2 • ChangedTableNote(1)....................................................................................................................................................... 13 • AddedELECTRICALandSwitchingCHARACTERISTICStableforV andV at2.8V(ISO722xC-Only).................13 CC1 CC2 • ChangedV UndervoltageThresholdvsFree-AirTemperature........................................................................................ 19 CC • ChangedFailsafeDelayTimeTestCircuitandVoltageWaveforms................................................................................... 21 ChangesfromRevisionJ(May2009)toRevisionK Page • ChangedtheRECOMMENDEDOPERATINGCONDITIONSsothatNote(2)isassociatedwithalldeviceoptionsin theInputpulsewidthandSignalingrate................................................................................................................................ 7 • ChangedNote(2)From:Typicalsignalingrateunderidealconditionsat25°C.To:TypicalsignalingrateandInput pulsewidtharemeasuredatidealconditionsat25°C........................................................................................................... 7 • Changedcolumn2oftheAVAILABLEOPTIONStableFrom:SignalingRateTo:MaxSignalingRate............................. 24 ChangesfromRevisionI(December2008)toRevisionJ Page • ChangedISO7221CMarkedAscolumnFrom:TI7221CTo:I7221CintheAVAILABLEOPTIONStable......................... 24 ChangesfromRevisionH(May2008)toRevisionI Page • Added"IEC61010-1,IEC60950-1andCSAApproved"totheUL1577FEATURESbullet................................................ 1 ChangesfromRevisionG(March2008)toRevisionH Page • AddedNote:(1)totheRECOMMENDEDOPERATINGCONDITIONStable....................................................................... 7 • AddedNote:(1)totheELECTRICALCHARACTERISTICS:V andV at5-Vtable.................................................... 10 CC1 CC2 • AddedNote:(1)totheELECTRICALCHARACTERISTICS:V at5V,V at3.3Vtable............................................ 11 CC1 CC2 • AddedNote(1):totheELECTRICALCHARACTERISTICS:V at3.3V,V at5Vtable............................................ 12 CC1 CC2 • AddedNote(1):totheELECTRICALCHARACTERISTICS:V andV at3.3V.......................................................... 13 CC1 CC2 ChangesfromRevisionF(August2007)toRevisionG Page • AddedPartNumbersISO7220BandISO7221Btothedatasheet........................................................................................ 1 • Added5-MbpsSignalingratetotheFEATURESlist............................................................................................................. 1 • AddedPartNumbersISO7220BandISO7221BtotheELECTRICALCHARACTERISTICS:V andV at5-Vtable.10 CC1 CC2 • AddedPartNumbersISO7220BandISO7221BtotheELECTRICALCHARACTERISTICS:V at5V,V at3.3 CC1 CC2 Vtable................................................................................................................................................................................... 11 • AddedPartNumbersISO7220BandISO7221BtotheELECTRICALCHARACTERISTICS:V at3.3V,V at5 CC1 CC2 Vtable................................................................................................................................................................................... 12 • AddedPartNumbersISO7220BandISO7221BtotheELECTRICALCHARACTERISTICS:V andV at3.3V.......13 CC1 CC2 • AddedPROPAGATIONDELAYvsFREE-AIRTEMPERATURE,ISO722xB,PropagationDelayvsFree-Air Temperature,ISO722xB....................................................................................................................................................... 19 • AddedPartNumbersISO7220BandISO7221BtotheAVAILABLEOPTIONStable......................................................... 24 4 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 ChangesfromRevisionE(July2007)toRevisionF Page • Addedt footnotetotheSWITCHINGCHARACTERISTICS:V andV at5-VOPERATIONtable....................... 14 sk(pp) CC1 CC2 • Addedt footnotetotheSWITCHINGCHARACTERISTICS:V andV at5-VOPERATIONtable......................... 14 sk(o) CC1 CC2 • Addedt footnotetotheSWITCHINGCHARACTERISTICS:V at5V,V at3.3VOPERATIONtable................15 sk(pp) CC1 CC2 • Addedt footnotetotheSWITCHINGCHARACTERISTICS:V at5V,V at3.3VOPERATIONtable.................15 sk(o) CC1 CC2 • Addedt footnotetotheSWITCHINGCHARACTERISTICS:V at3.3V,V at5VOPERATIONtable................16 sk(pp) CC1 CC2 • Addedt footnotetotheSWITCHINGCHARACTERISTICS:V at3.3V,V at5VOPERATIONtable.................16 sk(o) CC1 CC2 • Addedt footnotetotheSWITCHINGCHARACTERISTICStable................................................................................. 17 sk(pp) • Changed3.3-V SupplyCurrentvsSignalingRate-Re-scaledtheY-axis..................................................................... 19 RMS • Changed5-V SupplyCurrentvsSignalingRate-NewCurves...................................................................................... 19 RMS ChangesfromRevisionD(June2007)toRevisionE Page • Changed3.3-V SupplyCurrentvsSignalingRate-NewCurves................................................................................... 19 RMS • Changed5-V SupplyCurrentvsSignalingRate-Re-scaledtheY-axis ....................................................................... 19 RMS ChangesfromRevisionC(May2007)toRevisionD Page • ChangedTypicalISO7220xCircuitHook-Up-Pin2(INA)labelFrom:OUTPUTtoINPUT............................................... 26 ChangesfromRevisionB(May2007)toRevisionC Page • AddedtheSignalingratevaluestotheRECOMMENDEDOPERATINGCONDITIONStable.............................................. 7 • ChangedtheIEC60664-1RATINGSTABLE-SpecificationI-IIItestconditionsFrom:Ratedmainsvoltage≤150 VRMSTo:Ratedmainsvoltage≤300VRMS.AddedarowfortheI-IIspecifications........................................................... 8 • AddedISO722xMJittervsSignalingRatecrossreferencetothePeak-to-peakeye-patternjitteroftheSWITCHING CHARACTERISTICStable................................................................................................................................................... 14 • AddedTime-DependentDielectricBreakdownTestResults............................................................................................... 26 ChangesfromRevisionA(August2006)toRevisionB Page • AddedtheTYPICALCHARACTERISTICCURVEStothedatasheet................................................................................ 19 • AddedthePARAMETERMEASUREMENTINFORMATIONtothedatasheet.................................................................. 21 • AddedtheAPPLICATIONINFORMATIONsectiontothedatasheet.................................................................................. 25 • AddedtheISOLATIONGLOSSARYsectiontothedatasheet........................................................................................... 28 ChangesfromOriginal(July2006)toRevisionA Page • Deleted"andCSAApporved"fromtheUL1577FEATURESbullet...................................................................................... 1 • AddedoptionAtotheAVAILABLEOPTIONStable............................................................................................................ 24 Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 5 Pin Configuration and Functions ISO7220xDPackage ISO7221xDPackage 8-PinSOIC 8-PinSOIC TopView TopView VCC1 1 8 VCC2 VCC1 1 8 VCC2 N N INA 2 O 7 OUTA OUTA 2 O 7 INA TI TI A A INB 3 OL 6 OUTB INB 3 OL 6 OUTB S S I I GND1 4 5 GND2 GND1 4 5 GND2 PinFunctions PIN I/O DESCRIPTION NAME ISO7220x ISO7221x INA 2 7 I Input,channelA INB 3 3 I Input,channelB GND1 4 4 — GroundconnectionforV CC1 GND2 5 5 — GroundconnectionforV CC2 OUTA 7 2 O Output,channelA OUTB 6 6 O Output,channelB V 1 1 — Powersupply,V CC1 CC1 V 8 8 — Powersupply,V CC2 CC2 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT VCC Supplyvoltage(2),VCC1,VCC2 –0.5 6 V VI VoltageatIN,OUT –0.5 VCC+0.5(3) V IO Outputcurrent –15 15 mA TJ Maximumjunctiontemperature 170 °C Tstg Storagetemperature –65 150 °C (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingscancausepermanentdamagetothedevice.Theseratingsarestress ratingsonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodscanaffectdevicereliability. (2) AllvoltagevaluesexceptdifferentialI/Obusvoltagesarewithrespecttonetworkgroundpinandarepeakvoltagevalues. (3) Maximumvoltagemustnotexceed6V. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) ±4000 V V Electrostatic Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101,allpins(2) ±1000 V (ESD) discharge MachineModel,ANSI/ESDS5.2-1996 ±200 V (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.3 Recommended Operating Conditions MIN NOM MAX UNIT ISO722xA,ISO722xB,ISO722xM 3 5.5 VCC Supplyvoltage(1),VCC1,VCC2 V ISO722xC 2.8 5.5 IOH High-leveloutputcurrent –4 mA IOL Low-leveloutputcurrent 4 mA ISO722xA 1 0.67 μs ISO722xB 200 100 tui Inputpulsewidth(2) ISO722xC 40 33 ns ISO722xM 6.67 5 ISO722xA 0 1500 1000 kbps ISO722xB 0 10 5 1/tui Signalingrate(2) ISO722xC 0 30 25 Mbps ISO722xM 0 200 150 VIH High-levelinputvoltage ISO722xA,ISO722xB,ISO722xC 2 5.5 V VIL Low-levelinputvoltage ISO722xA,ISO722xB,ISO722xC 0 0.8 V VIH High-levelinputvoltage ISO722xM 0.7VCC VCC V VIL Low-levelinputvoltage ISO722xM 0 0.3VCC V TJ Junctiontemperature –40 150 °C H Externalmagneticfield-strengthimmunityperIEC61000-4-8andIEC61000-4-9certification 1000 A/m (1) Forthe5-Voperation,V orV isspecifiedfrom4.5Vto5.5V. CC1 CC2 Forthe3.3-Voperation,V orV isspecifiedfrom3Vto3.6V. CC1 CC2 Forthe2.8-Voperation,V orV isspecifiedat2.8V. CC1 CC2 (2) TypicalsignalingrateandInputpulsewidtharemeasuredatidealconditionsat25°C. 6.4 Thermal Information ISO7220x ISO7221x THERMALMETRIC(1) UNIT D(SOIC) 8PINS Low-KThermalResistance(2) 212 R Junction-to-ambientthermalresistance °C/W θJA High-KThermalResistance 122 R Junction-to-case(top)thermalresistance 69.1 °C/W θJC(top) R Junction-to-boardthermalresistance 47.7 °C/W θJB ψ Junction-to-topcharacterizationparameter 15.2 °C/W JT ψ Junction-to-boardcharacterizationparameter 47.2 °C/W JB R Junction-to-case(bottom)thermalresistance — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. (2) TestedinaccordancewiththeLow-KorHigh-KthermalmetricdefinitionsofEIA/JESD51-3forleadedsurfacemountpackages. 6.5 Power Ratings V =V =5.5V,T =150°C,C =15pF,Inputa150Mbps50%dutycyclesquarewave CC1 CC2 J L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT P Devicepowerdissipation,ISO722xM 390 mW D Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 6.6 Insulation Specifications PARAMETER TESTCONDITIONS VALUE UNIT GENERAL CLR Externalclearance(1) Shortestterminal-to-terminaldistancethroughair 4 mm CPG Externalcreepage(1) Shortestterminal-to-terminaldistanceacrossthe 4 mm packagesurface DTI Distancethroughtheinsulation Minimuminternalgap(internalclearance) 0.008 mm CTI Comparativetrackingindex DINEN60112(VDE0303-11);IEC60112 400 V Materialgroup II Ratedmainsvoltage≤150V I-IV RMS Overvoltagecategory Ratedmainsvoltage≤300V I-III RMS Ratedmainsvoltage≤400V I-II RMS DINVDEV0884-11:2017-01(2) V Maximumrepetitivepeakisolationvoltage ACvoltage(bipolar) 560 V IORM PK V =V V Maximumtransientisolationvoltage TEST IOTM 4000 V IOTM t=60s(qualification),t=1s(100%production) PK Methoda:AfterI/Osafetytestsubgroup2/3,V = ini ≤5 V ,t =60s;V =1.2×V ,t =10s IOTM ini pd(m) IORM m Methoda:Afterenvironmentaltestssubgroup1, q Apparentcharge(3) Vini=VIOTM,tini=60s;Vpd(m)=1.3×VIORM,tm= ≤5 pC pd 10s Methodb1:Atroutinetest(100%production)and preconditioning(typetest)V =V ,t =1s; ≤5 ini IOTM ini V =1.5×V ,t =1s pd(m) IORM m C Barriercapacitance,inputtooutput(4) V =0.4sin(4E6πt) 1 pF IO IO V =500V,T =25°C >1012 IO A R Isolationresistance,inputtooutput(4) V =500V,100°C≤T ≤125°C >1011 Ω IO IO A V =500VatT =150°C >109 IO S Pollutiondegree 2 Climaticcategory 40/125/21 UL1577 V =V =2500V ,t=60s(qualification); TEST ISO RMS V Withstandisolationvoltage V =1.2×V =3000V ,t=1s(100% 2500 V ISO TEST ISO RMS RMS production) (1) Creepageandclearancerequirementsshouldbeappliedaccordingtothespecificequipmentisolationstandardsofanapplication.Care shouldbetakentomaintainthecreepageandclearancedistanceofaboarddesigntoensurethatthemountingpadsoftheisolatoron theprinted-circuitboarddonotreducethisdistance.Creepageandclearanceonaprinted-circuitboardbecomeequalincertaincases. Techniquessuchasinsertinggroovesand/orribsonaprintedcircuitboardareusedtohelpincreasethesespecifications. (2) Thiscouplerissuitableforbasicelectricalinsulationonlywithinthemaximumoperatingratings.Compliancewiththesafetyratingsshall beensuredbymeansofsuitableprotectivecircuits. (3) Apparentchargeiselectricaldischargecausedbyapartialdischarge(pd). (4) Allpinsoneachsideofthebarriertiedtogethercreatingatwo-terminaldevice 8 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.7 Safety-Related Certifications VDE CSA UL CertifiedaccordingtoDINVDEV0884- CertifiedaccordingtoIEC60950-1andIEC62368- RecognizedunderUL1577 11:2017-01andDINEN61010-1(VDE 1 ComponentRecognitionProgram 0411-1):2011-07 2000V Isolationrating RMS 400V Basicinsulationand148V BasicInsulation RMS RMS ReinforcedinsulationworkingvoltageperCSA MaximumTransientOvervoltage,4000V ; PK 60950-1-07+A1+A2andIEC60950-12ndEd. Singleprotection,2500V MaximumRepetitivePeakIsolationVoltage, RMS +A1+A2. 560V PK 300V Basicinsulationworkingvoltageper RMS CSA62369-1-14andIEC62368-1:2014Ed.2. Certificatenumber:40047657 Mastercontractnumber:220991 Filenumber:E181974 6.8 Safety Limiting Values Safetylimiting(1)intendstominimizepotentialdamagetotheisolationbarrieruponfailureofinputoroutputcircuitry.Afailure oftheI/Ocanallowlowresistancetogroundorthesupplyand,withoutcurrentlimiting,dissipatesufficientpowertooverheat thedieanddamagetheisolationbarrier,potentiallyleadingtosecondarysystemfailures. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT R =212°C/W,V =5.5V,T =170°C,T =25°C, θJA I J A 124 Safetyinput,output,orsupply seeFigure1 I mA S current R =212°C/W,V =3.6V,T =170°C,T =25°C, θJA I J A 190 seeFigure1 T Safetytemperature 150 °C S (1) Thesafety-limitingconstraintisthemaximumjunctiontemperaturespecifiedinthedatasheet.Thepowerdissipationandjunction-to-air thermalimpedanceofthedeviceinstalledintheapplicationhardwaredeterminesthejunctiontemperature.Theassumedjunction-to-air thermalresistanceintheThermalInformationtableisthatofadeviceinstalledonahigh-Ktestboardforleadedsurface-mount packages.Thepoweristherecommendedmaximuminputvoltagetimesthecurrent.Thejunctiontemperatureisthentheambient temperatureplusthepowertimesthejunction-to-airthermalresistance. Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 6.9 Electrical Characteristics—5-V V and V Supplies CC1 CC2 V andV at5V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ISO7220xquiescent,V =V or0V,noload 1 2 I CC mA ISO7221quiescent,V =V or0V,noload 8.5 17 I CC ISO7220AandISO7220B1Mbps,0.5-MHz 2 3 inputclocksignal,noload mA ICC1 VCC1supplycurrent ISO7221A,ISO7221B1Mbps,0.5-MHzinput 10 18 clocksignal,noload ISO7220C,ISO7220M25Mbps,12.5-MHz 4 9 inputclocksignal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHz 12 22 inputclocksignal,noload ISO7220xquiescent,V =V or0V,noload 16 31 I CC mA ISO7221xquiescent,V =V or0V,noload 8.5 17 I CC ISO7220AandISO7220B1Mbps,0.5-MHz 17 32 inputclocksignal,noload mA ICC2 VCC2supplycurrent ISO7221A,ISO7221B1Mbps,0.5-MHzinput 10 18 clocksignal,noload ISO7220C,ISO7220M25Mbps,12.5-MHz 20 34 inputclocksignal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHz 12 22 inputclocksignal,noload I =–4mA,SeeFigure14 V –0.8 4.6 OH CC V High-leveloutputvoltage V OH I =–20μA,SeeFigure14 V –0.1 5 OH CC I =4mA,SeeFigure14 0.2 0.4 OL V Low-leveloutputvoltage V OL I =20μA,SeeFigure14 0 0.1 OL V Inputvoltagehysteresis 150 mV I(HYS) I High-levelinputcurrent INfrom0VtoV 10 μA IH CC I Low-levelinputcurrent INfrom0VtoV –10 μA IL CC C Inputcapacitancetoground INatV ,V =0.4sin(4E6πt) 1 pF I CC I CMTI Common-modetransientimmunity V =V or0V,SeeFigure16 25 50 kV/μs I CC 10 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.10 Electrical Characteristics—5-V V and 3.3-V V Supply CC1 CC2 V at5V±10%,V at3.3V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ISO7220xquiescent,VI=VCCor0V,noload 1 2 mA ISO7221xquiescent,VI=VCCor0V,noload 8.5 17 ISO7220AandISO7220B1Mbps,0.5-MHzinput 2 3 clocksignal,noload mA ICC1 VCC1supplycurrent ISO7221AandISO7221B1Mbps,0.5-MHzinput 10 18 clocksignal,noload ISO7220CandISO7220M25Mbps,12.5-MHz 4 9 inputclocksignal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHz 12 22 inputclocksignal,noload ISO7220xquiescent,VI=VCCor0V,noload 8 18 mA ISO7221xquiescent,VI=VCCor0V,noload 4.3 9.5 ISO7220AandISO7220B1Mbps,0.5-MHzinput 9 19 clocksignal,noload mA ICC2 VCC2supplycurrent ISO7221AandISO7221B1Mbps,0.5-MHzinput 5 11 clocksignal,noload ISO7220CandISO7220M25Mbps,12.5-MHz 10 20 inputclocksignal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHz 6 12 inputclocksignal,noload ISSeOe7F2i2g0uxre,I1S4O7221x(3.3-Vside),IOH=–4mA, VCC–0.4 VOH High-leveloutputvoltage ISO7221x(5-Vside),IOH=–4mA,SeeFigure14 VCC–0.8 V Alldevices,IOH=–20μA,SeeFigure14 VCC–0.1 IOL=4mA,SeeFigure14 0.4 VOL Low-leveloutputvoltage V IOL=20μA,SeeFigure14 0.1 VI(HYS) Inputvoltagehysteresis 150 mV IIH High-levelinputcurrent INfrom0VtoVCC 10 μA IIL Low-levelinputcurrent INfrom0VtoVCC –10 μA CI Inputcapacitancetoground INatVCC,VI=0.4sin(4E6πt) 1 pF CMTI Common-modetransientimmunity VI=VCCor0V,SeeFigure16 15 40 kV/μs Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 6.11 Electrical Characteristics—3.3-V V and 5-V V Supply CC1 CC2 V at3.3V±10%,V at5V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ISO7220xquiescent,VI=VCCor0V,noload 0.6 1 mA ISO7221xquiescent,VI=VCCor0V,noload 4.3 9.5 ISO7220AandISO7220B1Mbps,0.5-MHzinputclocksignal, 1 2 noload mA ICC1 VCC1supplycurrent ISO7221AandISO7221B1Mbps,0.5-MHzinputclocksignal, 5 11 noload ISO7220CandISO7220M25Mbps,12.5-MHzinputclock 2 4 signal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHzinputclock 6 12 signal,noload ISO7220xquiescent,VI=VCCor0V,noload 16 31 mA ISO7221xquiescent,VI=VCCor0V,noload 8.5 17 ISO7220AandISO7220B1Mbps,0.5-MHzinputclocksignal, 18 32 noload mA ICC2 VCC2supplycurrent ISO7221AandISO7221B1Mbps,0.5-MHzinputclocksignal, 10 18 noload ISO7220CandISO7220M25Mbps,12.5-MHzinputclock 20 34 signal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHzinputclock 12 22 signal,noload IFSigOu7r2e2104xandISO7221x(5-Vside),IOH=–4mA,See VCC–0.8 VOH High-leveloutputvoltage ISO7221x(3.3-Vside),IOH=–4mA,SeeFigure14 VCC–0.4 V Alldevices,IOH=–20μA,SeeFigure14 VCC–0.1 IOL=4mA,SeeFigure14 0.4 VOL Low-leveloutputvoltage IOL=20μA,SeeFigure14 0 0.1 VI(HYS) Inputthresholdvoltagehysteresis 150 mV IIH High-levelinputcurrent INfrom0VorVCC 10 μA IIL Low-levelinputcurrent INfrom0VorVCC –10 μA CI Inputcapacitancetoground INatVCC,VI=0.4sin(4E6πt) 1 pF CMTI Common-modetransientimmunity VI=VCCor0V,SeeFigure16 15 40 kV/μs 12 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.12 Electrical Characteristics—3.3-V V and V Supplies CC1 CC2 V andV at3.3V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.)(1) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ISO7220xquiescent,VI=VCCor0V,noload 0.6 1 mA ISO7221xquiescent,VI=VCCor0V,noload 4.3 9.5 ISO7220AandISO7220B1Mbps,0.5-MHzinputclocksignal, 1 2 noload mA ICC1 VCC2supplycurrent ISO7221AandISO7221B1Mbps,0.5-MHzinputclocksignal, 5 11 noload ISO7220CandISO7220M25Mbps,12.5-MHzinputclock 2 4 signal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHzinputclock 6 12 signal,noload ISO7220xquiescent,VI=VCCor0V,noload 8 18 mA ISO7221xquiescent,VI=VCCor0V,noload 4.3 9.5 ISO7220AandISO7220B1Mbps,0.5-MHzinputclocksignal, 9 19 noload mA ICC2 VCC2supplycurrent ISO7221AandISO7221B1Mbps,0.5-MHzinputclocksignal, 5 11 noload ISO7220CandISO7220M25Mbps,12.5-MHzinputclock 10 20 signal,noload mA ISO7221CandISO7221M25Mbps,12.5-MHzinputclock 6 12 signal,noload IOH=–4mA,SeeFigure14 VCC–0.4 3 VOH High-leveloutputvoltage IOH=–20μA,SeeFigure14 VCC–0.1 3.3 V IOL=4mA,SeeFigure14 0.2 0.4 VOL Low-leveloutputvoltage IOL=20μA,SeeFigure14 0 0.1 VI(HYS) Inputvoltagehysteresis 150 mV IIH High-levelinputcurrent INfrom0VorVCC 10 μA IIL Low-levelinputcurrent INfrom0VorVCC –10 μA CI Inputcapacitancetoground INatVCC,VI=0.4sin(4E6πt) 1 pF CMTI Common-modetransientimmunity VI=VCCor0V,SeeFigure16 15 40 kV/μs (1) Forthe3.3-Voperation,V orV isspecifiedfrom3Vto3.6V. CC1 CC2 6.13 Electrical Characteristics—2.8-V V and V Supplies CC1 CC2 V andV at2.8V(overrecommendedoperatingconditionsunlessotherwisenoted.)2.8-Voperationisonlyspecifiedfor CC1 CC2 ISO722xCwithproductionscreeningstartinginJanuary2012.ThefirsttwodigitsoftheLotTraceCode(YMSLLLLG4) writtenontopofeachdevicecanbeusedtoidentifyyearandmonthofproductionrespectively. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ISO7220Cquiescent,VI=VCCor0V,noload 0.4 0.9 mA ISO7221Cquiescent,VI=VCCor0V,noload 3.7 7.5 ICC1 VCC1supplycurrent ISO7220C25Mbps,12.5-MHzinputclocksignal,noload 1.5 3.5 mA ISO7221C25Mbps,12.5-MHzinputclocksignal,noload 4.5 10 ISO7220Cquiescent,VI=VCCor0V,noload 6.8 15 mA ISO7221Cquiescent,VI=VCCor0V,noload 3.7 7.5 ICC2 VCC2supplycurrent ISO7220C25Mbps,12.5-MHzinputclocksignal,noload 9 17 mA ISO7221C25Mbps,12.5-MHzinputclocksignal,noload 4.5 10 IOH=–4mA,SeeFigure14 VCC–0.6 2.55 VOH High-leveloutputvoltage IOH=–20μA,SeeFigure14 VCC–0.1 2.8 V IOL=4mA,SeeFigure14 0.25 0.6 VOL Low-leveloutputvoltage IOL=20μA,SeeFigure14 0 0.1 VI(HYS) Inputvoltagehysteresis 150 mV IIH High-levelinputcurrent INfrom0VorVCC 10 μA IIL Low-levelinputcurrent INfrom0VorVCC –10 μA CI Inputcapacitancetoground INatVCC,VI=0.4sin(4E6πt) 1 pF CMTI Common-modetransientimmunity VI=VCCor0V,SeeFigure16 10 30 kV/μs Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 6.14 Switching Characteristics—5-V V and V Supplies CC1 CC2 V andV at5V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT tPLH,tPHL Propagationdelay 280 405 600 ns ISO722xA,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 18 ns tPLH,tPHL Propagationdelay 42 55 70 ns ISO722xB,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 3 ns tPLH,tPHL Propagationdelay 22 32 42 ns ISO722xC,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 2 ns tPLH,tPHL Propagationdelay 6 10 16 ns ISO722xM,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 0.5 1 ns ISO722xA 180 ISO722xB 17 tsk(pp) Part-to-partskew(2) ns ISO722xC 10 ISO722xM 3 ISO7220A 3 15 tsk(o) Channel-to-channeloutputskew(3) ISO7220B 0.6 3 ns ISO7220C,ISO7220M 0.2 1 tr Outputsignalrisetime 1 ns SeeFigure14 tf Outputsignalfalltime 1 ns Failsafeoutputdelaytimefrominputpower tfs loss SeeFigure15 3 μs ISO722xM,150MbpsPRBSNRZdata,5-bitmaxsame 1 polarityinput,bothchannels,SeeFigure17,Figure13 tjit(pp) Peak-to-peakeye-patternjitter ns ISO722xM,150Mbpsunrestrictedbitrunlengthdata 2 input,bothchannels,SeeFigure17 (1) Alsoreferredtoaspulseskew. (2) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedpinsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. (3) t istheskewbetweenspecifiedoutputsofasingledevicewithalldrivinginputsconnectedtogetherandtheoutputsswitchinginthe sk(o) samedirectionwhiledrivingidenticalspecifiedloads. 14 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.15 Switching Characteristics—5-V V and 3.3-V V Supply CC1 CC2 V at5V±10%,V at3.3V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT tPLH,tPHL Propagationdelay 285 410 585 ns ISO722xA,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 18 ns tPLH,tPHL Propagationdelay 45 58 75 ns ISO722xB,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 3 ns tPLH,tPHL Propagationdelay 25 36 48 ns ISO722xC,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 2 ns tPLH,tPHL Propagationdelay 7 12 20 ns ISO722xM,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 0.5 1 ns ISO722xA 180 ISO722xB 17 tsk(pp) Part-to-partskew(2) ns ISO722xC 10 ISO722xM 5 ISO7220A 3 15 tsk(o) Channel-to-channeloutputskew(3) ISO7220B 0.6 3 ns ISO7220C,ISO7220M 0.2 1 tr Outputsignalrisetime 2 ns SeeFigure14 tf Outputsignalfalltime 2 ns Failsafeoutputdelaytimefrominputpower tfs loss SeeFigure15 3 μs ISO722xM,150MbpsPRBSNRZdata,5-bitmaxsame 1 polarityinput,bothchannels,SeeFigure17,Figure13 tjit(pp) Peak-to-peakeye-patternjitter ns ISO722xM,150Mbpsunrestrictedbitrunlengthdata 2 input,bothchannels,SeeFigure17 (1) Alsoreferredtoaspulseskew. (2) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedpinsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. (3) t istheskewbetweenspecifiedoutputsofasingledevicewithalldrivinginputsconnectedtogetherandtheoutputsswitchinginthe sk(o) samedirectionwhiledrivingidenticalspecifiedloads. Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 6.16 Switching Characteristics—3.3-V and 5-V V Supplies CC1 CC2 V at3.3V±10%,V at5V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT tPLH,tPHL Propagationdelay 285 395 605 ns ISO722xA,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 22 ns tPLH,tPHL Propagationdelay 45 58 75 ns ISO722xB,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 4 ns tPLH,tPHL Propagationdelay 25 36 48 ns ISO722xC,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 3 ns tPLH,tPHL Propagationdelay 7 12 21 ns ISO722xM,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 0.5 1 ns ISO722xA 190 ISO722xB 17 tsk(pp) Part-to-partskew(2) ns ISO722xC 10 ISO722xM 5 ISO7220A 3 15 tsk(o) Channel-to-channeloutputskew(3) ISO7220B 0.6 3 ns ISO7220C,ISO7220M 0.2 1 tr Outputsignalrisetime 1 ns SeeFigure14 tf Outputsignalfalltime 1 ns Failsafeoutputdelaytimefrominputpower tfs loss SeeFigure15 3 μs ISO722xM,150MbpsPRBSNRZdata,5-bitmaxsame 1 polarityinput,bothchannels,seeFigure17,Figure13 tjit(pp) Peak-to-peakeye-patternjitter ns ISO722xM,150Mbpsunrestrictedbitrunlengthdata 2 input,bothchannels,seeFigure17 (1) Alsoreferredtoaspulseskew. (2) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedpinsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. (3) t istheskewbetweenspecifiedoutputsofasingledevicewithalldrivinginputsconnectedtogetherandtheoutputsswitchinginthe sk(o) samedirectionwhiledrivingidenticalspecifiedloads. 16 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.17 Switching Characteristics—3.3-V V and V Supplies CC1 CC2 V andV at3.3V±10%(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT tPLH,tPHL Propagationdelay 290 400 610 ns ISO722xA,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 22 ns tPLH,tPHL Propagationdelay 46 62 78 ns ISO722xB,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 4 ns tPLH,tPHL Propagationdelay 26 40 52 ns ISO722xC,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1 3 ns tPLH,tPHL Propagationdelay 8 16 25 ns ISO722xM,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 0.5 1 ns ISO722xA 190 ISO722xB 17 tsk(pp) Part-to-partskew(2) ns ISO722xC 10 ISO722xM 5 ISO7220A 3 15 tsk(o) Channel-to-channeloutputskew(3) ISO7220B 0.6 3 ns ISO7220C,ISO7220M 0.2 1 tr Outputsignalrisetime 2 ns SeeFigure14 tf Outputsignalfalltime 2 ns Failsafeoutputdelaytimefrominputpower tfs loss SeeFigure15 3 μs ISO722xM,150MbpsPRBSNRZdata,5-bitmaxsame 1 polarityinput,bothchannels,SeeFigure17,Figure13 tjit(pp) Peak-to-peakeye-patternjitter ns ISO722xM,150Mbpsunrestrictedbitrunlengthdata 2 input,bothchannels,SeeFigure17 (1) Alsoreferredtoaspulseskew. (2) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedpinsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. (3) t istheskewbetweenspecifiedoutputsofasingledevicewithalldrivinginputsconnectedtogetherandtheoutputsswitchinginthe sk(o) samedirectionwhiledrivingidenticalspecifiedloads. 6.18 Switching Characteristics—2.8-V V and V Supplies CC1 CC2 V andV at2.8V(overrecommendedoperatingconditionsunlessotherwisenoted.) CC1 CC2 PARAMETER TESTCONDITIONS MIN TYP MAX UNIT tPLH,tPHL Propagationdelay 26 45 65 ns ISO722xC,seeFigure14 PWD Pulse-widthdistortion|tPHL–tPLH|(1) 1.5 5 ns tsk(pp) Part-to-partskew(2) ISO722xC 12 ns tsk(o) Channel-to-channeloutputskew(3) ISO7220C 0.2 5 ns tr Outputsignalrisetime 2 ns SeeFigure14 tf Outputsignalfalltime 2 ns Failsafeoutputdelaytimefrominputpower tfs loss SeeFigure15 4.6 μs (1) Alsoreferredtoaspulseskew. (2) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedpinsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. (3) t istheskewbetweenspecifiedoutputsofasingledevicewithalldrivinginputsconnectedtogetherandtheoutputsswitchinginthe sk(o) samedirectionwhiledrivingidenticalspecifiedloads. Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 6.19 Insulation Characteristics Curves 250 225 200 VCC1,2at 3.6 V A m nt - 175 urre 150 C g 125 n miti 100 VCC1,2at 5.5 V Li ety 75 af S 50 25 0 0 50 100 150 200 TC- Case Temperature - °C Figure1.ThermalDeratingCurveforLimitingCurrentperVDE 18 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 6.20 Typical Characteristics 20 30 18 T15A p=F 2 L5°oCa,d 28 T15A p=F 2 L5°oCa,d ISO7220xICC2 26 16 24 I- Supply Current - mACC 11102468 IISSOO77222210xxIICCCC12&2 I- Supply Current - mACC 112111228240608 ISO7221xICC1&IS2O7220xICC1 4 ISO7220xICC1 6 2 4 2 0 0 25 50 75 100 00 25 50 75 100 Signaling Rate - Mbps Signaling Rate - Mbps Figure2. 3.3-VRMSSupplyCurrentvsSignalingRate Figure3.5-VRMSSupplyCurrentvsSignalingRate (Mbps) (Mbps) 450 70 440 15 pF Load TA= 25°C, 15 pF Load 430 65 Delay - ns 441200 VCC= 3.3 V tpLH& tpHL Delay - ns 60 VCC= 3.3 V tPLH& tPHL Propagation 334890000 VCC=t p5LH V& tpHL Propagation 55 VCC= 5 V tPLH& tPHL 370 50 360 350 45 -40 -15 10 35 60 85 110125 -40 25 125 Temperature - °C Temperature - °C Figure4.PropagationDelayvsFree-AirTemperature, Figure5.PropagationDelayvsFree-AirTemperature, ISO722xA ISO722xB 30 20 25 VCC= 3.3 V VCC= 3.3 V tpLH& tpHL tpLH& tpHL 15 ay - ns 20 ay - ns el el ation D 15 tpLH& tpHL VCC= 5 V ation D 10 tpLH& tpHL VCC= 5 V g g a a op 10 op Pr Pr 5 5 15 pF Load 15 pF Load 0 0 -40 -15 10 35 60 85 110125 -40 -15 10 35 60 85 110125 Temperature - °C Temperature - °C Figure6.PropagationDelayvsFree-AirTemperature, Figure7.PropagationDelayvsFree-AirTemperature, ISO722xC ISO722xM Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com Typical Characteristics (continued) 1.4 2.5 1.35 5-V Vth+ 2.4 5-V Vth+ 2.3 VoltageThreshold - V 1111..12..2355 3.3-V Vth+ 15 pF Load VoltageThreshold - V 1122....28912 5-V Vth- 15 pF Load Input 1.1 5-V Vth- Input 1.7 3.3-V Vth+ 1.6 1.05 3.3-V Vth- 1.5 3.3-V Vth- 1 1.4 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature - °C Temperature - °C Figure8.ISO722xA,ISO722xBandISO722xCInputVoltage Figure9.ISO722xMInputVoltageHigh-to-Low Low-to-HighSwitchingThresholdvsFree-AirTemperature vsFree-AirTemperature 2.68 -80 15 pF Load d - V -70 TA= 25°C ol 2.64 esh -60 Thr VCCRising VCC= 5 V e -50 ag 2.6 A Supply Undervolt 2.56 VCCFalling I- mOUT ---432000 VCC= 3.3 V wer 2.52 Po -10 2.48 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 2 4 6 Free-AirTemperature - °C VOUT- V Figure10.V UndervoltageThresholdvsFree-Air Figure11.High-LevelOutputCurrentvsHigh-LevelOutput CC Temperature Voltage 70 2000 15 pF Load 15 pF Load 60 TA= 25°C 1800 TA= 25°C VCC= 5 V 1600 50 1400 1200 40 I- mAOUT 30 VCC= 3.3 V Jitter−ps 1080000 VCC1= VCC2= 5 V 20 600 VCC1= VCC2= 3.3 V 400 10 200 0 0 0 1 2 3 4 5 0 50 100 150 200 VOUT- V Signaling Rate - Mbps Figure12.Low-LevelOutputCurrentvsLow-LevelOutput Figure13.ISO722xMJittervsSignalingRate Voltage 20 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 7 Parameter Measurement Information ER VCC RRI VI VCC/2 VCC/2 A IN B OUT 0 V Input TION tPLH tPHL GNeOneTrEatAor VI 50W SOLA VO NCOLTE B VO 50% 90% 50%VOH I 10% VOL tr tf A. Theinputpulseissuppliedbyageneratorhavingthefollowingcharacteristics:PRR≤50kHz,50%dutycycle,t ≤3 r ns,t ≤3ns,Z =50Ω. f O B. C =15pFandincludesinstrumentationandfixturecapacitancewithin±20%. L Figure14. SwitchingCharacteristicTestCircuitandVoltageWaveforms V I V CC RIER VCC IN = 0 V N BAR OUT VO VI 2.7 V 0 V O t ATI fs VOH SOL CL VO 50% FAILSAFE HIGH I NOTEA V OL A. C =15pFandincludesinstrumentationandfixturecapacitancewithin±20%. L Figure15. FailsafeDelayTimeTestCircuitandVoltageWaveforms VCCI VCCO C = 0.1 µF ±1% C = 0.1 µF ±1% Pass-fail criteria: The output must er remain stable. arri IN B OUT S1 n o ati + ol Is EN VOH or VOL CL See Note A – GNDI + VCM – GNDO Copyright © 2016, Texas Instruments Incorporated A. C =15pFandincludesinstrumentationandfixturecapacitancewithin±20%. L Figure16. Common-ModeTransientImmunityTestCircuit Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com Parameter Measurement Information (continued) V CC DUT Tektronix IN HFS9009 0 V Tektronix OUT 784D PATTERN GENERATOR VCC/2 Jitter NOTE: PRBSbitpatternrunlengthis216–1.Transitiontimeis800ps. Figure17. Peak-to-PeakEye-PatternJitterTestCircuitandVoltageWaveform 22 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 8 Detailed Description 8.1 Overview The isolator in theFunctional Block Diagram is based on a capacitive isolation barrier technique. The I/O channel of the ISO7220x and ISO7221x family of devices consists of two internal data channels, a high-frequency channel (HF) with a bandwidth from 100 kbps up to 150 Mbps, and a low-frequency channel (LF) covering the range from 100 kbps down to DC. In principle, a single-ended input signal entering the HF-channel is split into a differential signal via the inverter gate at the input. The following capacitor-resistor networks differentiate the signal into transients, which then are converted into differential pulses by two comparators. The comparator outputs drive a NOR-gate flip-flop whose output feeds an output multiplexer. A decision logic (DCL) at the driving output of the flip-flop measures the durations between signal transients. If the duration between two consecutive transients exceeds a certain time limit, (as in the case of a low-frequency signal), the DCL forces the output- multiplexertoswitchfromthehigh-frequencytothelow-frequencychannel. Because low-frequency input signals require the internal capacitors to assume prohibitively large values, these signals are pulse-width modulated (PWM) with the carrier frequency of an internal oscillator, thus creating a sufficientlyhighfrequencysignal,capableofpassingthecapacitivebarrier.Astheinputismodulated,alow-pass filter (LPF) is needed to remove the high-frequency carrier from the actual data before passing it on to the output multiplexer. 8.2 Functional Block Diagram Isolation Barrier OSC LPF Low t Frequency Channel PWM VREF (DC...100 kbps) 0 OUT 1 S IN DCL High t Frequency Channel VREF (100 kbps...150 Mbps) Copyright © 2016, Texas Instruments Incorporated Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 8.3 Feature Description Table1providesanoverviewofthedevicefeatures. Table1.DeviceFeatures MAXIMUMSIGNALING INPUT CHANNEL PARTNUMBER RATE THRESHOLD DIRECTION ≈1.5V(TTL) ISO7220A 1Mbps (CMOScompatible) ≈1.5V(TTL) ISO7220B 5Mbps (CMOScompatible Samedirection ≈1.5V(TTL) ISO7220C 25Mbps (CMOScompatible) ISO7220M 150Mbps V /2(CMOS) CC ≈1.5V(TTL) ISO7221A 1Mbps (CMOScompatible) ≈1.5V(TTL) ISO7221B 5Mbps (CMOScompatible) Oppositedirections ≈1.5V(TTL) ISO7221C 25Mbps (CMOScompatible) ISO7221M 150Mbps V /2(CMOS) CC 8.4 Device Functional Modes TheISO7220xandISO7221xfamilyofdevicesfunctionalmodesarelistedinTable2. Table2.ISO7220xorISO7221xFunctionTable(1) INPUTSIDEV OUTPUTSIDEV INPUT(IN) OUTPUT(OUT) CC CC H H PU PU L L Open H PD PU X H X PD X Undetermined (1) PU=PoweredUp(V ≥3.0V),PD=PoweredDown(V ≤2.5V),X=Irrelevant,H=HighLevel, CC CC L=LowLevel Input Output V V V V CC2 CC1 CC1 CC1 750 kW 500W 8W IN OUT 13W Figure18. DeviceI/OSchematics 24 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The ISO7220x and ISO7221x family devices use single-ended TTL or CMOS-logic switching technology. The supply voltage range is from 3 V (2.8 V for C-grade) to 5.5 V for both supplies, V and V . When designing CC1 CC2 withdigitalisolators,becauseofthesingle-endeddesignstructure,digitalisolatorsdonotconformtoanyspecific interface standard and are only intended for isolating single-ended CMOS or TTL digital signal lines. The isolator is typically placed between the data controller (that is, μC or UART), and a data converter or a line transceiver, regardlessoftheinterfacetypeorstandard. 9.2 Typical Application The ISO7221x family of devices can be used with Texas Instruments' mixed signal micro-controller, digital-to- analogconverter,transformerdriver,andvoltageregulatortocreateanisolated4-to20-mAcurrentloop. VS 3.3 V 0.1 (cid:29)F VC2C D2 3 1:1.33 MBR0520L 1 IN OUT 5 3.3VISO 10 (cid:29)F TPS76333 SN6501 10 (cid:29)F 0.1 (cid:29)F 3 2 EN GND 1 GND D1 10 (cid:29)F MBR0520L 4, 5 0.1 (cid:29)F ISO-BARRIER 20 (cid:13) 0.1 (cid:29)F LOOP+ 0.1 (cid:29)F 0.1 (cid:29)F 0.1 (cid:29)F 15 3 10 VA VD 16 1 8 LOW BASE 0.1 (cid:29)F 1 (cid:29)F 2 8 56 XXOINUT MGDS2VP1C43C320 PP33..01 1112 23 OINUVBTCCA1ISO7221VOCUCIN2TAB 76 54 EDDRBINARCLVKCL1 C2DACC316C1OPM99A7 COMDOUT 9 22 (cid:13) LOOP– DVSS GND1 GND2 14 13 12 1 2 4 4 5 3 × 22 nF Figure19. Isolated4-to20-mACurrentLoop 9.2.1 DesignRequirements Unlike optocouplers, which require external components to improve performance, provide bias (or limit current), theISO7220xandISO7221xdevicesrequireonlytwoexternalbypasscapacitorstooperate. Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com Typical Application (continued) 9.2.2 DetailedDesignProcedure Figure 20 and Figure 21 show the hookup of a typical ISO7220x and ISO7221x circuit. The only external componentsaretwobypasscapacitors. V V CC1 CC2 2mm 2 mm max. max. 0.1mF from from 0.1mF Vcc1 1 8 Vcc2 INPUT INA 2 7 OUTA OUTPUT INB OUTB INPUT 3 6 OUTPUT 4 5 GND1 ISO7220 GND2 Figure20. TypicalISO7220xCircuitHook-Up V V CC1 CC2 2 mm 2 mm max. max. 0.1mF from from 0.1mF Vcc1 1 8 Vcc2 OUTPUT OUTA 2 7 INA INPUT INB OUTB INPUT 3 6 OUTPUT 4 5 GND1 ISO7221 GND2 Figure21. TypicalISO7221xCircuitHook-Up 9.2.3 ApplicationCurve At maximum working voltage, the isolation barrier of the ISO7220x and ISO7221x family of devices has more than28yearsoflife. 100 ) s r a e Y e ( VIORMat 560 VPK Lif 28 g n ki r o W 10 0 120 250 500 750 880 1000 Working Voltage, V (V ) IORM PK Figure22. Time-DependentDielectricBreakdownTestResults 26 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 10 Power Supply Recommendations To help ensure reliable operation at all data rates and supply voltages, a 0.1-μF bypass capacitor is recommended at input and output supply pins (V and V ). The capacitors should be placed as close to the CC1 CC2 supply pins as possible. If only a single primary-side power supply is available in an application, isolated power can be generated for the secondary-side with the help of a transformer driver such as Texas Instruments SN6501device.Forsuchapplications,detailedpowersupplydesignandtransformerselectionrecommendations areavailableinSN6501TransformerDriverforIsolatedPowerSupplies. 11 Layout 11.1 Layout Guidelines A minimum of four layers are required to accomplish a low EMI PCB design (see Figure 23). Layer stacking should be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low- frequencysignallayer. • Routethehigh-speedtracesonthetoplayertoavoidtheuseofvias(andtheintroductionoftheinductances) and allow for clean interconnects between the isolator and the transmitter and receiver circuits of the data link. • Place a solid ground plane next to the high-speed signal layer to establish controlled impedance for transmissionlineinterconnectsandprovideanexcellentlow-inductancepathforthereturncurrentflow. • Place the power plane next to the ground plane to create additional high-frequency bypass capacitance of approximately100pF/in2. • Route the slower speed control signals on the bottom layer to allow for greater flexibility as these signal links usuallyhavemargintotoleratediscontinuitiessuchasvias. If an additional supply voltage plane or signal layer is needed, add a second power or ground plane system to the stack to keep it symmetrical. Adding a second plane system to the stack makes the stack mechanically stable and prevents it from warping. The power and ground plane of each power system can be placed closer together,thusincreasingthehigh-frequencybypasscapacitancesignificantly. Fordetailedlayoutrecommendations,refertotheDigitalIsolatorDesignGuide. 11.1.1 PCBMaterial For digital circuit boards operating at less than 150 Mbps, (or rise and fall times greater than 1 ns), and trace lengths of up to 10 inches, use standard FR-4 UL94V-0 printed circuit board. This PCB is preferred over cheaper alternativesbecauseoflowerdielectriclossesathighfrequencies,lessmoistureabsorption,greaterstrengthand stiffness,andtheself-extinguishingflammability-characteristics. 11.2 Layout Example High-speed traces 10 mils Ground plane Keep this space FR-4 40 mils tfrraecee fsro, mpa pdlsa,n aensd, 0r ~ 4.5 vias Power plane 10 mils Low-speed traces Figure23. RecommendedLayerStack Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M SLLS755P–JULY2006–REVISEDAUGUST2018 www.ti.com 12 Device and Documentation Support 12.1 Device Support 12.1.1 DevelopmentSupport Fordevelopmentsupport,referto: • AC-mainsLEDLightingwithDALIDMX512& PowerLineCommunicationsReferenceDesign • IndustrialServoDriveandACInverterDriveReferenceDesign • Low-CostSingle/Dual-PhaseIsolatedElectricityMeasurementReferenceDesign • NoiseTolerantCapacitiveTouchHMIReferenceDesign • Type2PoEPSE,6kVLightningSurgeReferenceDesign 12.2 Documentation Support 12.2.1 RelatedDocumentation Forrelateddocumentation,seethefollowing: • TexasInstruments,DAC161P997Single-Wire16-bitDACfor4-to20-mALoops datasheet • TexasInstruments,DigitalIsolatorDesignGuide • TexasInstruments,High-VoltageLifetimeoftheISO72xFamilyofDigitalIsolatorsapplicationreport • TexasInstruments,IsolationGlossary • TexasInstruments,MSP430G2x32MixedSignalMicrocontroller datasheet • TexasInstruments,SN6501TransformerDriverforIsolatedPowerSupplies datasheet • TexasInstruments,TPS763xxLow-Power150-mALow-DropoutLinearRegulators datasheet 12.3 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table3.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER ORDERNOW DOCUMENTS SOFTWARE COMMUNITY ISO7220A Clickhere Clickhere Clickhere Clickhere Clickhere ISO7220B Clickhere Clickhere Clickhere Clickhere Clickhere ISO7220C Clickhere Clickhere Clickhere Clickhere Clickhere ISO7220M Clickhere Clickhere Clickhere Clickhere Clickhere ISO7221A Clickhere Clickhere Clickhere Clickhere Clickhere ISO7221B Clickhere Clickhere Clickhere Clickhere Clickhere ISO7221C Clickhere Clickhere Clickhere Clickhere Clickhere ISO7221M Clickhere Clickhere Clickhere Clickhere Clickhere 12.4 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.5 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp 28 SubmitDocumentationFeedback Copyright©2006–2018,TexasInstrumentsIncorporated ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

ISO7220A,ISO7220B,ISO7220C,ISO7220M ISO7221A,ISO7221B,ISO7221C,ISO7221M www.ti.com SLLS755P–JULY2006–REVISEDAUGUST2018 Community Resources (continued) solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.6 Trademarks E2EisatrademarkofTexasInstruments. DeviceNetisatrademarkofOpenDeviceNetVendorsAssociation. ProfibusisatrademarkofProfibus. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.7 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 12.8 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2006–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:ISO7220A ISO7220B ISO7220C ISO7220MISO7221A ISO7221B ISO7221C ISO7221M

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) ISO7220AD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220A & no Sb/Br) ISO7220ADG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220A & no Sb/Br) ISO7220ADR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220A & no Sb/Br) ISO7220ADRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220A & no Sb/Br) ISO7220BD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220B & no Sb/Br) ISO7220BDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220B & no Sb/Br) ISO7220BDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220B & no Sb/Br) ISO7220BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220B & no Sb/Br) ISO7220CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220C & no Sb/Br) ISO7220CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220C & no Sb/Br) ISO7220MD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220M & no Sb/Br) ISO7220MDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220M & no Sb/Br) ISO7220MDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220M & no Sb/Br) ISO7220MDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7220M & no Sb/Br) ISO7221AD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221A & no Sb/Br) ISO7221ADG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221A & no Sb/Br) ISO7221ADR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221A & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) ISO7221ADRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221A & no Sb/Br) ISO7221BD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221B & no Sb/Br) ISO7221BDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221B & no Sb/Br) ISO7221BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221B & no Sb/Br) ISO7221CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221C & no Sb/Br) ISO7221CDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221C & no Sb/Br) ISO7221CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221C & no Sb/Br) ISO7221CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221C & no Sb/Br) ISO7221MD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221M & no Sb/Br) ISO7221MDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221M & no Sb/Br) ISO7221MDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221M & no Sb/Br) ISO7221MDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 I7221M & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF ISO7220A, ISO7221A, ISO7221C : •Automotive: ISO7220A-Q1, ISO7221A-Q1, ISO7221C-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 13-Aug-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) ISO7220ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7220BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7220CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7220MDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7221ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7221BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7221CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 ISO7221MDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 13-Aug-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) ISO7220ADR SOIC D 8 2500 350.0 350.0 43.0 ISO7220BDR SOIC D 8 2500 350.0 350.0 43.0 ISO7220CDR SOIC D 8 2500 350.0 350.0 43.0 ISO7220MDR SOIC D 8 2500 350.0 350.0 43.0 ISO7221ADR SOIC D 8 2500 350.0 350.0 43.0 ISO7221BDR SOIC D 8 2500 350.0 350.0 43.0 ISO7221CDR SOIC D 8 2500 350.0 350.0 43.0 ISO7221MDR SOIC D 8 2500 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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