DATASHEET ISL9111, ISL9111A FN7602 Low Input Voltage, High Efficiency Synchronous Boost Converter with 1A Switch Rev.4.00 Jun 4, 2012 The ISL9111 and ISL9111A provide a power supply solution Features for single-cell, dual-cell, or three-cell alkaline, NiCd or NiMH battery-powered applications. The device has a typical 0.8V • Up to 97% Efficiency at Typical Operating Conditions start-up voltage and is capable of supplying up to 5.25V output • Minimum Start-up Voltage voltage. Both devices are guaranteed to supply 100mA from a - 0.8V (ISL9111) single-cell input and 240mA from a dual-cell input when output is 3.3V. High 1.2MHz switching frequency allows for the - 0.6V (ISL9111A) use of tiny, low-profile inductors and ceramic capacitors to • Minimum Operating Voltage minimize the size of the solution. - 0.7V (ISL9111) The ISL9111 and ISL9111A are internally compensated, fully - 0.5V (ISL9111A) integrated synchronous boost converters optimized for efficiency with minimal external components. At light load, the • Low Quiescent Current: 20μA (Typical) device enters skip mode and consumes only 20µA of • At V = 3.3V OUT quiescent current, resulting in higher efficiency at light loads - 100mA Output Current @ V = 0.9V IN and maximum battery life. - 240mA Output from @ V = 1.8V IN The ISL9111 and ISL9111A address both rechargeable and • Logic Control Shutdown (Iq < 1µA) non-rechargeable battery applications. The ISL9111 has a UVLO feature, which will internally shut off at 0.7V protecting a • Output Voltage Up to 5.25V rechargeable battery. The ISL9111A has this feature disabled • Output Disconnect During Shutdown to maximize the usable life of a non-rechargeable single cell • Skip Mode Under Light Load Condition battery. The parts are available in fixed 3.0V, 3.3V and 5.0V output voltage versions or an adjustable output voltage version • Undervoltage Lockout (ISL9111 Only) (ADJ). The fixed output voltage version also provides a FAULT • Fault Protection: OVP (ADJ Version Only), OTP, Short Circuit pin for fault condition monitoring. The ISL9111 and ISL9111A are available in a 6 Ld SOT-23 package. • 6 Ld SOT-23 Package Applications • Products Including Portable HDMI and USB-OTG • Personal Medical Products • Wireless Mouse/Keyboard • Bluetooth Headsets • MP3/MP4 Players/DSC • Single-cell, Dual-cell and Triple-cell Alkaline, NiCd, NiMH Powered Products 100 4.7µH 95 VIN = 3.6V 90 1 SW 5 VOUT %) 85 VIN 6 VIN VOUT 4.7µF CY ( 80 N 75 4.7µF 3 EN FICIE 70 VIN = 1.8V VIN = 0.9V F E 65 VFLT 1k 4 FAULT GND 2 60 55 ISL9111: 3.0/3.3/5.0V, ISL9111A: 3.0/3.3/5.0V 50 0.1 1 10 100 1000 IOUT (mA) FIGURE 1. TYPICAL APPLICATION FIGURE 2. FIXED 5V EFFICIENCY FN7602 Rev.4.00 Page 1 of 15 Jun 4, 2012

ISL9111, ISL9111A Block Diagram: ISL9111-ADJ, ISL9111A-ADJ C1 VIN VOUT C2 6 5 UVLO VINT VOLTAGE SELECTOR START-UP N-WELL SWITCH GATE SW L1 DRIVER 1 V OUT OVP AND ANTI-CROSS CONDUCTION SW EN ZCD 3 V OUT OFF ON CURRENT CONTROL LOGIC SENSE R1 DIGITAL AND SOFT-START CURRENT SLOPE COMP LIMIT FB FAULT 4 MONITORING g m VOLTAGE R2 CLAMP T N VI 1.2MHz THERMAL REFERENCE OSCILLATOR SHUTDOWN GENERATOR 2 FN7602 Rev.4.00 Page 2 of 15 Jun 4, 2012

ISL9111, ISL9111A Block Diagram: ISL9111-3.0/3.3/5.0V, ISL9111A-3.0/3.3/5.0V C1 VIN VOUT C2 6 5 UVLO VINT VOLTAGE SELECTOR START-UP N-WELL SWITCH GATE SW L1 DRIVER 1 AND ANTI-CROSS CONDUCTION SW ZCD V 4 OUT FAULT CONTROL LOGIC CURRENT SENSE DIGITAL VOUT AND SOFT-START CURRENT SLOPE COMP LIMIT EN FAULT 3 MONITORING g m OFF ON VOLTAGE CLAMP T N VI 1.2MHz THERMAL REFERENCE OSCILLATOR SHUTDOWN GENERATOR 2 FN7602 Rev.4.00 Page 3 of 15 Jun 4, 2012

ISL9111, ISL9111A Pin Configurations FIXED (5.0V/3.3V/3.0V) ADJUSTABLE OUTPUT (6 LD SOT-23) (6 LD SOT-23) TOP VIEW TOP VIEW SW 1 6 VIN SW 1 6 VIN GND 2 5 VOUT GND 2 5 VOUT EN 3 4 FAULT EN 3 4 FB Pin Descriptions FIXED (5.0V, 3.3V, 3.0V) ADJUSTABLE OUTPUT PIN NUMBER PIN NUMBER SYMBOL PIN DESCRIPTION 1 1 SW The SW pin is the switching node of the power converter. Connect one terminal of the inductor to the SW pin and the other to power input. 2 2 GND System ground 3 3 EN The EN pin is an active-high logic input for enabling the device. When asserted high, the boost function begins. When asserted low, the device is completely disabled, and current is blocked from flowing from the SW pin to the output and vice versa. This pin should be tied either high to enable the device or low to disable. 4 - FAULT Fault output; outputs logic LOW under a number of fault conditions (see Table 1 on page10). - 4 FB Feedback pin of the converter. Connect voltage divider resistors between VOUT, FB and GND for desired output. See Figures 3A, 4A, and 5A. 5 5 VOUT Device output 6 6 VIN Device input supply pin. Connect a 4.7µF ceramic capacitor to the power ground. FN7602 Rev.4.00 Page 4 of 15 Jun 4, 2012

ISL9111, ISL9111A Ordering Information PART PART NUMBER MARKING TEMP RANGE PACKAGE PKG. (Notes 1, 2, 3) (Note 4) V (V) (°C) (Pb-free) DWG. # OUT ISL9111EH30Z-T GAKA 3.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111EH30Z-T7A GAKA 3.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111EH33Z-T GALA 3.3 -20 to +85 6 Ld SOT-23 P6.064 ISL9111EH33Z-T7A GALA 3.3 -20 to +85 6 Ld SOT-23 P6.064 ISL9111EH50Z-T GAMA 5.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111EH50Z-T7A GAMA 5.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111EHADJZ-T GARA Adjustable -20 to +85 6 Ld SOT-23 P6.064 ISL9111EHADJZ-T7A GARA Adjustable -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEH30Z-T GBAA 3.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEH30Z-T7A GBAA 3.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEH33Z-T GBAB 3.3 -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEH33Z-T7A GBAB 3.3 -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEH50Z-T GBAC 5.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEH50Z-T7A GBAC 5.0 -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEHADJZ-T GBAD Adjustable -20 to +85 6 Ld SOT-23 P6.064 ISL9111AEHADJZ-T7A GBAD Adjustable -20 to +85 6 Ld SOT-23 P6.064 ISL9111H30EV1Z Evaluation Board for ISL9111EH30Z ISL9111H33EV1Z Evaluation Board for ISL9111EH33Z ISL9111H50EV1Z Evaluation Board for ISL9111EH50Z ISL9111HADJEV1Z Evaluation Board for ISL9111EHADJZ ISL9111AH30-EVZ Evaluation Board for ISL9111AH30Z ISL9111AH33-EVZ Evaluation Board for ISL9111AH33Z ISL9111AH50-EVZ Evaluation Board for ISL9111AH50Z ISL9111AHADJ-EVZ Evaluation Board for ISL9111AEHADJZ NOTES: 1. Please refer to Tech Brief TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9111, ISL9111A. For more information on MSL please see Tech Brief TB363. 4. The part marking is located on the bottom of the part. FN7602 Rev.4.00 Page 5 of 15 Jun 4, 2012

ISL9111, ISL9111A Absolute Maximum Ratings Thermal Information VIN, EN, FAULT, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V Thermal Resistance (Typical)  (°C/W) OUT JA FB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V 6 Ld SOT-23 (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 SW Voltage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-20°C to +125°C DC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6.5V Operating Temperature Range. . . . . . . . . . . . . . . . . . . . . . .-20°C to +85°C Pulse < 10ns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 8.0V Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C ESD Ratings Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below Human Body Model (Tested per JESD22-A114F). . . . . . . . . . . . . . . . 3kV http://www.intersil.com/pbfree/Pb-FreeReflow.asp Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . .250V *Other ESD Spec should meet Level 1 requirement Recommended Operating Conditions Latch Up (Tested per JESD78; Class 2, Level A) . . . . . . . . . . . . . . . . 100mA V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V to V - 200mV IN OUT Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . .-20°C to +85°C Maximum DC Current from Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . 750mA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 5.  is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. JA Electrical Specifications V = 1.2V, V = 3.3V, T = +25°C (see “Typical Application Circuits” on page7). Boldface limits apply IN OUT A over the operating temperature range, -20°C to +85°C. MIN MAX PARAMETER SYMBOL TEST CONDITIONS (Note 6) TYP (Note 6) UNITS Minimum Start-up Voltage (ISL9111) V V = V R = 50Ω 0.80 0.90 V MIN EN IN, LOAD Minimum Operating Voltage V V = V R = 50Ω 0.68 0.70 0.76 V UVLO EN IN, LOAD after Start-up (ISL9111) Minimum Start-up Voltage (ISL9111A) V V = V No Load 0.75 V MIN EN IN, Minimum Operating Voltage V V = V No Load 0.50 V OPT EN IN, after Start-up (ISL9111A) Output Voltage Range V V < V 2.5 5.25 V OUT IN OUT (ISL9111-ADJ/ISL9111A-ADJ) Output Voltage Accuracy V V = 1.2V, I = 50mA -100 +100 mV OUT IN LOAD (ISL9111: 3.0/3.3/5.0V, ISL9111A: 3.0/3.3/5.0V) Feedback Voltage V V = 5V 784 800 816 mV FB OUT (ISL9111-ADJ/ISL9111A-ADJ) Feedback Pin Input Current 100 nA Quiescent Current from V I No Load (Note 7) 20 45 μA OUT Q1 Shutdown Current from V I V = 0V, V = 1.2V, V = 0 0.5 2 μA IN SD EN IN O Leakage Current at SW Pin V = 0V, V = 5V, V = 0, T = +25°C 1 μA EN IN O A N-Channel MOSFET ON-Resistance V = 5V 0.2 Ω OUT P-Channel MOSFET ON-Resistance V = 5V 0.35 Ω OUT N-Channel MOSFET Peak Current Limit I 0.8 1.0 1.2 A PK Maximum Duty Cycle D 84 87.5 % MAX PWM Switching Frequency F 1.0 1.2 1.4 MHz OSC Soft-Start-Up Time 1 ms EN Logic High 0.8*V V IN EN Logic Low 0.2*V V IN FAULT Pin Leakage Current when High V = V 100 nA FLT OUT FAULT Pin Sink Current when Low V = 0.5V 10 mA FLT FN7602 Rev.4.00 Page 6 of 15 Jun 4, 2012

ISL9111, ISL9111A Electrical Specifications V = 1.2V, V = 3.3V, T = +25°C (see “Typical Application Circuits” on page7). Boldface limits apply IN OUT A over the operating temperature range, -20°C to +85°C. (Continued) MIN MAX PARAMETER SYMBOL TEST CONDITIONS (Note 6) TYP (Note 6) UNITS Load Regulation ΔV /V I = 0 to 100mA -1.5 +1.5 % OUT OUT LOAD Line Regulation V = 0.8V to 1.6V, I = 1mA -1.0 +1.0 % IN LOAD Output Overvoltage Protection Threshold 5.9 V (ADJ Version Only) Output Overvoltage Protection Hysteresis 400 mV (ADJ Version Only) Thermal Shutdown T 150 °C SD Thermal Shutdown Hysteresis 25 °C NOTES: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 7. I is measured at V and multiplied by V /V ; thus, the equivalent input quiescent current is calculated. Q1 OUT OUT IN Typical Application Circuits 100 4.7µH 90 VIN 6 VINSW1 VOUT 5 V2O.5UVT4.7µF NCY (%) 80 VIN = 1.8V 4.7µF 3 4 357k CIE 70 EN FB EFFI VIN = 1.2V VIN = 0.9V 166k 60 2 GND 50 ISL9111, ISL9111A -ADJ 0.1 1.0 10 100 1000 IOUT (mA) FIGURE 3A. POWER SUPPLY SOLUTION FOR 2.5V OUTPUT VOLTAGE FIGURE 3B. EFFICIENCY AT V = 2.5V OUT 100 4.7µH 90 VIN = 1.8V VIN = 2.4V 1 VOUT %) 80 SW VOUT 5 4.0V Y ( C VIN4.7µF 63 VEINN FB 4 665k 4.7µF FFICIEN 6700 VIN = 1.5VVIN = 0.9V E 166k 50 2 GND 40 0.1 1.0 10 100 1000 ISL9111, ISL9111A -ADJ IOUT (mA) FIGURE 4A. POWER SUPPLY SOLUTION FOR 4.0V OUTPUT VOLTAGE FIGURE 4B. EFFICIENCY AT V = 4.0V OUT FN7602 Rev.4.00 Page 7 of 15 Jun 4, 2012

ISL9111, ISL9111A Typical Application Circuits (Continued) 4.7µH 100 VIN = 4.2V 90 VIN = 3.6V 1 V SW 5 5.O2U5TV %) 80 VOUT Y ( VIN4.7µF 63 VIN 4 923k 4.7µF CIENC 70 VIN = 1.8V VIN = 1.5V EN FB FI 60 F E 166k VIN = 0.9V 50 2 GND 40 0.1 1.0 10 100 1000 ISL9111, ISL9111A -ADJ IOUT (mA) FIGURE 5A. POWER SUPPLY SOLUTION FOR 5.25V OUTPUT VOLTAGE FIGURE 5B. EFFICIENCY AT V = 5.25V OUT Detailed Description goes to zero. The N-channel MOSFET resumes operation when V falls back to its nominal value, repeating the previous FB Current Mode PWM Operation operation. The converter returns to 1.2MHz PWM mode operation when V drops 1.5% below its nominal voltage. The control scheme of the device is based on the peak current FB mode control, and the control loop is compensated internally. Given the skip mode algorithm incorporated in the ISL9111 and The peak current of the N-channel MOSFET switch is sensed to ISL9111A, the average value of the output voltage is limit the maximum current flowing through the switch and the approximately 0.75% higher than the nominal output voltage inductor. The typical current limit is set to 1A. under PWM operation. This positive offset improves the load transient response when switching from skip mode to PWM The control circuit includes ramp generator, slope compensator, mode operation. The ripple on the output voltage is typically error amplifier, PWM comparator (see block diagrams on page2 1.5%*V (nominal) when input voltage is sufficiently lower than and page3). The ramp signal is derived from the inductor OUT output voltage, and it increases as input voltage approaches current. This ramp signal is then compared to the error amplifier output voltage. Figure 9 shows the ripple voltage versus input output to generate the PWM gating signals for driving both voltage. N-channel and P-channel MOSFETs. The PWM operation is initialized by the clock from the internal oscillator (typical Synchronous Rectifier 1.2MHz). The N-channel MOSFET is turned on at the beginning of The ISL9111 and ISL9111A integrate one N-channel MOSFET a PWM cycle, the P-channel MOSFET remains off, and the current and one P-channel MOSFET to realize synchronous boost starts ramping up. When the sum of the ramp and the slope converters. Because the commonly used discrete Schottky compensator output reaches the error amplifier output voltage, rectifier is replaced with the low r P-channel MOSFET, the the PWM comparator outputs a signal to turn off the N-channel DS(ON) power conversion efficiency reaches a value above 90%. Since a MOSFET. Here, both MOSFETs remain off during the dead-time typical step-up converter has a conduction path from the input to interval, and then the P-channel MOSFET is turned on and the output via the body diode of the P-channel MOSFET, a special remains on until the end of this PWM cycle. During this time, the circuit (see Block Diagrams on page2 and page3) is used to inductor current ramps down until the next clock. At this point, reverse the polarity of the P-channel body diode when the part is following a short dead time, the N-channel MOSFET is again shut down. This configuration completely disconnects the load turned on, repeating as previously described. from the input during shutdown of the converter. The benefit of Skip Mode Operation this feature is that the battery will not be completely depleted during shutdown of the converter. No additional components are The device is capable of operating in two different modes. When needed to disconnect the battery from the output of the the inductor current is sensed to cross zero for eight consecutive converter. times, the converter enters skip mode. In skip mode, each pulse cycle is still synchronized by the PWM clock. The N-channel Minimum Startup and Minimum Operating MOSFET is turned on at the rising edge of the clock and turned Voltage off when the inductor peak current reaches typically 25% of the current limit. Then the P-channel MOSFET is turned on, and it The ISL9111 and ISL9111A address applications with stays on until its current goes to zero. Subsequently, both rechargeable and non-rechargeable battery cells. N-channel and P-channel MOSFETs are turned off until the next 1. The ISL9111 has a UVLO feature. The part can start up with a clock cycle starts, at which time the N-channel MOSFET is turned 0.8V typical input voltage and internally shut off when the on again. When V is 1.5% typically higher than the nominal OUT battery drops below 0.7V to protect a rechargeable battery output voltage, the N-channel MOSFET is immediately turned off from over-discharge. and the P-channel MOSFET is turned on until the inductor current FN7602 Rev.4.00 Page 8 of 15 Jun 4, 2012

ISL9111, ISL9111A 2. UVLO function is disabled in the ISL9111A. The minimum carry high switching current should be routed wide and short. A start-up voltage can be as low as 0.6V, and minimum solid power ground plane is important for EMI suppression. operating voltage can be as low as 0.5V after start-up. The The switching node (SW pin) of the converter and the traces advantage of minimum operating voltage maximizes the connected to this pin are noisy. Noise sensitive traces such as the performance of a non-rechargeable battery, allowing the feedback trace should be kept away from SW pin and traces. The system to operate until the battery is fully depleted. voltage divider should be placed close to the feedback pin to Soft-start prevent noise pickup. Figure 6 shows the recommended EVB layout. When the device is enabled, the start-up cycle starts with linear V phase. During linear phase, the rectifying switch is turned on in a GND IN current limited configuration, delivering about 200mA, until the output capacitor is charged to approximately 90% of the input voltage. At this point, PWM begins, and thus, boost operation starts. If the output voltage is below 2.3V, PWM switching is done at a fixed duty-cycle of 75% until the output voltage reaches 2.3V. When the output voltage exceeds 2.3V, the closed-loop current mode PWM loop overrides the duty cycle until the output voltage is regulated. Peak inductor current is ramped to the final value (typically 1A) during the soft-start period to limit in-rush current from the input source. Fault monitoring begins approximately 2ms after the device is enabled. V Over-temperature Protection (OTP) OUT The device offers over-temperature protection. A temperature sensor circuit is integrated and monitors the internal IC GND temperature. Once the temperature exceeds the preset threshold (typically +150°C), the IC shuts down immediately. The OTP has a typical hysteresis of +25°C. When the device temperature FIGURE 6. RECOMMENDED EVALUATION BOARD LAYOUT decreases by this, the device starts operating. Fixed Output Voltage and Adjustable Output Overvoltage Protection (OVP) Voltage The adjustable version of the ISL9111 and ISL9111A have built ISL9111 and ISL9111A offer options for fixed output voltages of in overvoltage protection (OVP) to enhance product robustness 5V, 3.3V and 3V, or an adjustable output voltage. for transient up to 8V on SW pin. V is actively monitored, and OUT should the voltage reach 5.9V (typical), the device will stop For fixed output voltage versions (ISL9111-5.0, ISL9111A-5.0, switching. This turns off both power MOSFETs and the stored ISL9111-3.3, ISL9111A-3.3, ISL9111-3.0, ISL9111A-3.0), an inductor energy is discharged to V through the body diode of internal voltage divider is used (see “Block Diagram: ISL9111- OUT the synchronous rectifier. 3.0/3.3/5.0V, ISL9111A-3.0/3.3/5.0V” on page3). For the adjustable output voltage version (ISL9111-ADJ, ISL9111A -ADJ), Fault Monitoring and Reporting the output voltage is programmed by connecting two external voltage divider resistors among OUT, FB and GND (see “Block Fault monitoring starts 2ms after start-up. Table 1 shows the Diagram: ISL9111-ADJ, ISL9111A-ADJ” on page2). response to different detected faults. Any fault condition shown in Table 1 causes the FAULT pin to be taken low. The FAULT pin Output Voltage Setting Resistor Selection will not release until V and V fully collapse or until the fault IN OUT condition is removed. For the ISL9111 adjustable output version, the resistors, R and 1 R , as shown in the block diagram on page2, set the desired 2 Board Layout Recommendations output voltage values. The output voltage can be calculated using Equation 1: The ISL9111 and ISL9111A are high frequency switching boost converters. Accordingly, the converter creates fast voltage V = V 1+R-----1-- (EQ. 1) changes and high switching current that may cause EMI and O FB  R2 stability issues if good PCB layout practices are not followed. where V is the internal feedback reference voltage (0.8V FB Although the ISL9111 and ISL9111A can tolerate short durations typical). The current flowing through the divider resistors is of 8.0V transients, prolonged or higher amplitude excursions may calculated as V /(R + R ). Large resistance is recommended to O 1 2 damage the device. Care should be taken to minimize the trace minimize current into the divider and thus improve the total inductance and reduce the area of the power loop. efficiency of the converter. R and R should be placed close to 1 2 the feedback pin of the device to prevent noise pickup. Power components such as input capacitor, inductor and output capacitor should be placed close to the device. Board traces that FN7602 Rev.4.00 Page 9 of 15 Jun 4, 2012

ISL9111, ISL9111A TABLE 1. FAULT DETECTION AND RESPONSE FAULT CONDITION DETECTION DETAILS ACTION Low Battery Voltage V < 0.7V Shut down until V or V is cycled. IN EN IN (ISL9111 only) V Out of Regulation V is 10% below the target output voltage. Shut down only if V and V fall below 2.1V. OUT OUT IN OUT Device automatically restarts after 200ms. Fault signal switches on and off when V drops OUT out of regulation due to overload condition. Short Circuit V falls below V . Shut down immediately. Device automatically OUT IN restarts after 200ms. Over-temperature Protection Die temperature is > +150°C. Switching stops. Device restarts when temperature decreases to +125°C (typical). Output Overvoltage Protection (ADJ V > 5.90V Switching stops until V drops 400mV below OVP OUT OUT Version Only) threshold. Inductor Selection TABLE 3. CAPACITOR VENDOR INFORMATION An inductor with core material suitable for high frequency MANUFACTURER SERIES WEBSITE applications (e.g., ferrite) is desirable to minimize core loss and AVX X5R www.avx.com improve efficiency. The inductor should have a low ESR to reduce copper loss. Moreover, the inductor saturation current should be Murata X5R www.murata.com higher than the maximum peak current of the part; i.e., 1.2A. Taiyo Yuden X5R www.t-yuden.com The part is designed to operate with an inductor value of 4.7µH to TDK X5R www.tdk.com provide stable operation across the range of load, input and output voltages. Stable mode switching between PWM and skip mode operation is guaranteed at this inductor value. Table 2 shows recommended inductors. TABLE 2. INDUCTOR VENDOR INFORMATION MANUFACTURER SERIES WEBSITE Sumida CDRH2D18/HPNP www.sumida.com Abracon ASPI-0412FS www.abracon.com Bourns SDR0302 www.bourns.com Taiyo Yuden NRS4012 www.t-yuden.com TDK VLF5012AT www.tdk.com Capacitor Selection INPUT CAPACITOR A minimum 4.7µF ceramic capacitor is recommended to provide stable operation under typical operating conditions. For input voltage less than 1.0V application, an additional 4.7µF ceramic capacitor is recommended for better noise filtering and EMI suppression. The input capacitor should be placed close to the input pin, GND pin, and the non-switching terminal of the inductor. OUTPUT CAPACITOR For the output capacitor, a ceramic capacitor with small ESR is recommended to minimize output voltage ripple. A typical 4.7µF should be used to provide stable operation at different typical operating conditions. The output capacitor should be placed close to the output pin and GND pin of the device. Table 3 shows recommended capacitors. FN7602 Rev.4.00 Page 10 of 15 Jun 4, 2012

ISL9111, ISL9111A Typical Characteristics 100 100 VIN = 2.4V 90 VIN = 1.8V 90 %) %) Y ( 80 Y ( 80 C C CIEN 70 VIN = 0.9V CIEN 70 VIN = 1.8V VIN = 1.2V FFI VIN = 1.2V FFI E E 60 60 50 50 0.1 1 10 100 1000 0.1 1 10 100 1000 IOUT (mA) IOUT (mA) FIGURE 7. EFFICIENCY AT V = 3.0V FIGURE 8. EFFICIENCY AT V = 3.3V OUT OUT 300 32.5 3.3V_10mA 5.0V_10mA 32.0 +85°C 250 31.5 31.0 V) 200 m 30.5 V (RIPPLE 110500 3.0V_30.0AV_10mA I (μA)Q 2390..50 -10°C +25°C 29.0 50 28.5 -40°C 3.3V_0A 28.0 5.0V_0A 0 27.5 0 1 2 3 4 5 0 1 2 3 4 5 6 VIN (V) VIN (V) FIGURE 9. OUTPUT RIPPLE vs INPUT VOLTAGE FIGURE 10. QUIESCENT CURRENT vs TEMPERATURE 700 3.355 600 3.350 500 3.345 IOUT = 1mA(PSM) VO = 3.0V (mA)UT 340000 VO = 5.0V (V)OUT 33..333450 O V I 200 3.330 VO = 3.3V IOUT = 50mA(PWM) 100 3.325 0 3.320 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VIN (V) VIN (V) FIGURE 11. MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE FIGURE 12. LINE REGULATION, V = 3.3V OUT FN7602 Rev.4.00 Page 11 of 15 Jun 4, 2012

ISL9111, ISL9111A Typical Characteristics (Continued) 3.350 5.030 3.345 5.025 3.340 3.335 5.020 IOUT = 10mA(PSM) V) 3.330 V) 5.015 (T 3.325 (T 5.010 U U VO 3.320 VO 5.005 3.315 5.000 3.310 IOUT = 40mA(PWM) 3.305 4.995 3.300 4.990 0 20 40 60 80 100 120 140 160 0.6 0.8 1.0 1.2 1.4 1.6 1.8 LOAD (mA) VIN (V) FIGURE 13. LOAD REGULATION, V = 1.2V FIGURE 14. LINE REGULATION, V = 5.0 IN OUT 5.07 10k 5.06 5.05 Ω) 5.04 D ( 1k A V) 5.03 O (OUT 5.02 OR L V T 5.01 SIS100 5.00 RE 4.99 4.98 10 0 50 100 150 200 250 300 350 0.5 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 LOAD (mA) VIN (V) FIGURE 15. LOAD REGULATION, V = 3.6V FIGURE 16. START-UP WITH MINIMUM RESISTANCE IN (PRELOADED)vs V IN VIN = 3.6V, VOUT = 5.0V, ILOAD = 20mA VIN = 3.6V, VOUT = 5.0V, ILOAD = 200mA VOUT WITH 5.0V OFFSET(200mV/DIV) VOUT WITH 5.0V OFFSET(50mV/DIV) INDUCTOR CURRENT(200mA/DIV) INDUCTOR CURRENT(200mA/DIV) SW(2.0V/DIV) SW(2.0V/DIV) FIGURE 17. SKIP MODE WAVEFORM FIGURE 18. PWM WAVEFORM FN7602 Rev.4.00 Page 12 of 15 Jun 4, 2012

ISL9111, ISL9111A Typical Characteristics (Continued) VIN = 3.6V, VOUT = 5.0V, ILOAD = 200mA VIN = 3.6V, VOUT = 5.0V, ILOAD = 50mA EN(5.0V/DIV) EN(5.0V/DIV) VOUT(2.0V/DIV) VOUT(2.0V/DIV) INDUCTOR CURRENT(200mA) INDUCTOR CURRENT(200mA) SW(2.0V/DIV) SW(2.0V/DIV) FIGURE 19. START-UP AFTER ENABLE FIGURE 20. START-UP AFTER ENABLE VIN = 3.6V, VOUT = 5.0V VIN = 3.6V, VOUT = 5.0V VOUT WITH 5.0V OFFSET(500mV/DIV) VOUT WITH 5.0V OFFSET(500mV/DIV) ILOAD = 20mA TO 100mA ILOAD = 20mA TO 200mA FIGURE 21. LOAD TRANSIENT RESPONSE FIGURE 22. LOAD TRANSIENT RESPONSE VIN = 3.0V TO 3.6V, VOUT = 5.0V, ILOAD = 200mA VOUT WITH 5.0V OFFSET(200mV/DIV) VIN(1.0V/DIV) FIGURE 23. LINE TRANSIENT FN7602 Rev.4.00 Page 13 of 15 Jun 4, 2012

ISL9111, ISL9111A Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE May 16, 2012 FN7602.4 Corrected y-axis scale on Figures 2, 7, 8 and 16. Updated evaluation board part numbers in the “Ordering Information” table on page5. December 7, 2011 FN7602.3 Initial release to web. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets. For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information page found at www.intersil.com. For a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary. You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. © Copyright Intersil Americas LLC 2011-2012. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7602 Rev.4.00 Page 14 of 15 Jun 4, 2012

ISL9111, ISL9111A Package Outline Drawing P6.064 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 4, 2/10 1.90 0-8° 0.95 0.08-0.22 D A 6 5 4 1.60 +0.15/-0.10 2.80 3 3 PIN 1 (0.60) INDEX AREA 1 2 3 0.20 C 2x B 0.40 ±0.10 3 SEE DETAIL X 0.20 M C A-B D END VIEW TOP VIEW 10° TYP (2 PLCS) 3 2.90 ±0.10 (0.25) 1.45 MAX 1.15 +0.15/-0.25 C GAUGE PLANE 0.10 C SEATING PLANE 0.00-0.15 0.45±0.1 4 SIDE VIEW DETAIL "X" (0.95) (0.60) (1.20) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. (2.40) 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. Package conforms to JEDEC MO-178AB. TYPICAL RECOMMENDED LAND PATTERN FN7602 Rev.4.00 Page 15 of 15 Jun 4, 2012