DATASHEET ISL83070E/71E/72E/73E/75E/76E/77E/78E FN6115 ±15kV ESD Protected, 3.3V, Full Fail-safe, Low Power, High Speed or Slew Rate Rev 5.00 Limited, RS-485/RS-422 Transceivers October 5, 2012 The Intersil ISL8307XE are BiCMOS 3.3V powered, single Features transceivers that meet both the RS-485 and RS-422 • Pb-Free (RoHS Compliant) standards for balanced communication. These devices have very low bus currents (+125mA/-100mA), so they present a • RS-485 I/O Pin ESD Protection 15kV HBM true “1/8 unit load” to the RS-485 bus. This allows up to 256 - Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM transceivers on the network without violating the RS-485 • Full Fail-safe (Open, Short, Terminated/Floating) specification’s 32 unit load maximum, and without using Receivers repeaters. For example, in a remote utility meter reading system, individual meter readings are routed to a • Hot Plug - Tx and Rx Outputs Remain Three-state During concentrator via an RS-485 network, so the high allowed Power-up (Only Versions with Output Enable Pins) node count minimizes the number of repeaters required. • True 1/8 Unit Load Allows up to 256 Devices on the Bus Receiver (Rx) inputs feature a “Full Fail-Safe” design, which • Single 3.3V Supply ensures a logic high Rx output if Rx inputs are floating, • High Data Rates. . . . . . . . . . . . . . . . . . . . . .up to 20Mbps shorted, or terminated but undriven. • Low Quiescent Supply Current . . . . . . . . . . .800A (Max) Hot Plug circuitry ensures that the Tx and Rx outputs remain - Ultra Low Shutdown Supply Current . . . . . . . . . . .10nA in a high impedance state while the power supply stabilizes. • -7V to +12V Common Mode Input/Output Voltage Range The ISL83070E through ISL83075E utilize slew rate limited drivers which reduce EMI, and minimize reflections from • Half and Full Duplex Pinouts improperly terminated transmission lines, or unterminated • Three State Rx and Tx Outputs Available stubs in multidrop and multipoint applications. Slew rate limited versions also include receiver input filtering to enhance noise • Current Limiting and Thermal Shutdown for driver Overload Protection immunity in the presence of slow input signals. The ISL83070E, ISL83071E, ISL83073E, ISL83076E, • Tiny MSOP package offering saves 50% board space ISL83077E are configured for full duplex (separate Rx input Applications and Tx output pins) applications. The half duplex versions multiplex the Rx inputs and Tx outputs to allow transceivers • Automated Utility Meter Reading Systems with output disable functions in 8 lead packages. • High Node Count Systems • Field Bus Networks • Security Camera Networks • Building Environmental Control/ Lighting Systems • Industrial/Process Control Networks TABLE 1. SUMMARY OF FEATURES PART HALF/FULL DATA RATE SLEW-RATE HOT # DEVICES RX/TX QUIESCENT LOW POWER PIN NUMBER DUPLEX (Mbps) LIMITED? PLUG? ON BUS ENABLE? ICC (A) SHUTDOWN? COUNT ISL83070E FULL 0.25 YES YES 256 YES 510 YES 14 ISL83071E FULL 0.25 YES NO 256 NO 510 NO 8 ISL83072E HALF 0.25 YES YES 256 YES 510 YES 8 ISL83073E FULL 0.5 YES YES 256 YES 510 YES 14 ISL83075E HALF 0.5 YES YES 256 YES 510 YES 8 ISL83076E FULL 20 NO YES 256 YES 510 YES 14 ISL83077E FULL 20 NO NO 256 NO 510 NO 8 ISL83078E HALF 20 NO YES 256 YES 510 YES 8 FN6115 Rev 5.00 Page 1 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Pinouts ISL83072E, ISL83075E, ISL83078E ISL83071E, ISL83077E ISL83070E, ISL83073E, ISL83076E (8 LD MSOP, SOIC) (8 LD SOIC) (14 LD SOIC) TOP VIEW TOP VIEW TOP VIEW RO 1 R 8 VCC VCC 1 R 8 A NC 1 14 VCC RO 2 13 NC RE 2 7 B/Z RO 2 7 B R RE 3 12 A DE 3 6 A/Y DI 3 6 Z DI 4 D 5 GND GND 4 D 5 Y DE 4 11 B DI 5 D 10 Z GND 6 9 Y GND 7 8 NC Ordering Information Truth Tables TEMP. PART NUMBER PART RANGE PACKAGE PKG. TRANSMITTING (Notes 1, 2, 3) MARKING (°C) (Pb-Free) DWG. # INPUTS OUTPUTS ISL83070EIBZA 83070EIBZ -40 to 85 14 Ld SOIC M14.15 RE DE DI Z Y ISL83071EIBZA 83071 EIBZ -40 to 85 8 Ld SOIC M8.15 X 1 1 0 1 ISL83072EIBZA 83072 EIBZ -40 to 85 8 Ld SOIC M8.15 X 1 0 1 0 ISL83072EIUZA 3072Z -40 to 85 8 Ld MSOP M8.118 0 0 X High-Z High-Z ISL83073EIBZA 83073EIBZ -40 to 85 14 Ld SOIC M14.15 1 0 X High-Z* High-Z* ISL83075EIBZA 83075 EIBZ -40 to 85 8 Ld SOIC M8.15 ISL83075EIUZA 3075Z -40 to 85 8 Ld MSOP M8.118 NOTE: *Shutdown Mode (See Note 10), except for ISL83071E/77E ISL83076EIBZA 83076EIBZ -40 to 85 14 Ld SOIC M14.15 ISL83077EIBZA 83077 EIBZ -40 to 85 8 Ld SOIC M8.15 RECEIVING ISL83078EIBZA 83078 EIBZ -40 to 85 8 Ld SOIC M8.15 INPUTS OUTPUT ISL83078EIUZA 3078Z -40 to 85 8 Ld MSOP M8.118 RE DE DE A-B RO NOTES: Half Duplex Full Duplex 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details 0 0 X  -0.05V 1 on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special 0 0 X  -0.2V 0 Pb-free material sets, molding compounds/die attach materials, 0 0 X Inputs 1 and 100% matte tin plate plus anneal (e3 termination finish, Open/Shorted which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL 1 0 0 X High-Z* classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 1 1 X High-Z 3. For Moisture Sensitivity Level (MSL), please see device NOTE: *Shutdown Mode (See Note 10), except for ISL83071E/77E information page for ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E. For more information on MSL please see tech brief TB363. FN6115 Rev 5.00 Page 2 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Pin Descriptions PIN FUNCTION RO Receiver output: If A - B  -50mV, RO is high; If A - B  -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted. RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t required, connect RE directly to GND or through a 1k to 3k resistor to GND. DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and are high impedance when DE is low. If the Tx enable function isn’t required, connect DE to VCC through a 1k to 3k resistor. DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. GND Ground connection. A/Y 15kV HBM ESD Protected RS-485/RS-422 level, noninverting receiver input and noninverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. B/Z 15kV HBM ESD Protected RS-485/RS-422 level, Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. A 15kV HBM ESD Protected RS-485/RS-422 level, noninverting receiver input. B 15kV HBM ESD Protected RS-485/RS-422 level, inverting receiver input. Y 15kV HBM ESD Protected RS-485/RS-422 level, noninverting driver output. Z 15kV HBM ESD Protected RS-485/RS-422 level, inverting driver output. VCC System power supply input (3.0V to 3.6V). NC No Connection. FN6115 Rev 5.00 Page 3 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Typical Operating Circuits +3.3V +3.3V + + 0.1µF 0.1µF 8 8 VCC VCC 1 RO R D DI 4 2 RE B/Z 7 RT RT 7 B/Z DE 3 3 DE A/Y 6 6 A/Y RE 2 4 DI RO 1 D R GND GND 5 5 ISL83072E, ISL83075E, ISL83078E +3.3V +3.3V + + 0.1µF 0.1µF 1 1 VCC VCC A 8 RT 5 Y 2 RO DI 3 R B 7 6 Z D Z 6 RT 7 B 3 DI RO 2 D Y 5 8 A R GND GND 4 4 ISL83071E, ISL83077E +3.3V +3.3V + + 0.1µF 0.1µF 14 14 VCC A 12 RT 9 Y VCC 2 RO DI 5 R B 11 10 Z D 3 RE DE 4 4 DE RE 3 Z 10 RT 11 B 5 DI RO 2 D Y 9 12 A R GND GND 6, 7 6, 7 ISL83070E, ISL83073E, ISL83076E FN6115 Rev 5.00 Page 4 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Thermal Resistance (Typical, Note 4) JA (°C/W) Input Voltages 8 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . 105 DI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 140 DE, RE (Note 20). . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V 14 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . 128 Input/Output Voltages Maximum Junction Temperature (Plastic Package) . . . . . . +150°C A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V) Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below Short Circuit Duration http://www.intersil.com/pbfree/Pb-FreeReflow.asp Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table Operating Conditions Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C (Note 5). TEMP MIN MAX PARAMETER SYMBOL TEST CONDITIONS (°C) (Note 19) TYP (Note 19) UNITS DC CHARACTERISTICS Driver Differential VOUT VOD RL = 100 (RS-422) (Figure 1A, Note 16) Full 2 2.3 - V RL = 54 (RS-485) (Figure 1A) Full 1.5 2 VCC V No Load - - VCC RL = 60, -7V  VCM  12V (Figure 1B) Full 1.5 2.2 - V Change in Magnitude of Driver VOD RL = 54 or 100 (Figure 1A) Full - 0.01 0.2 V Differential VOUT for Complementary Output States Driver Common-Mode VOUT VOC RL = 54 or 100 (Figure 1A) Full - 2 3 V Change in Magnitude of Driver VOC RL = 54 or 100 (Figure 1A) Full - 0.01 0.2 V Common-Mode VOUT for Complementary Output States Logic Input High Voltage VIH DI, DE, RE Full 2 - - V Logic Input Low Voltage VIL DI, DE, RE Full - - 0.8 V Logic Input Hysteresis VHYS DE, RE, (Note 15) 25 - 100 - mV Logic Input Current IIN1 DI = DE = RE = 0V or VCC, (Note 18) Full -2 - 2 A Input Current (A, B, A/Y, B/Z) IIN2 DE = 0V, VCC = 0V or VIN = 12V Full - 80 125 A 3.6V VIN = -7V Full -100 -50 - A Output Leakage Current (Y, Z) (Full IIN3 RE = 0V, DE = 0V, VIN = 12V Full - 10 40 A Duplex Versions Only, Note 13) VCC = 0V or 3.6V VIN = -7V Full -40 -10 - A Output Leakage Current (Y, Z) IIN4 RE = VCC, DE = 0V, VIN = 12V Full - 10 40 A iNno Steh u1t3d)own Mode (Full Duplex, VCC = 0V or 3.6V VIN = -7V Full -40 -10 - A Driver Short-Circuit Current, IOSD1 DE = VCC, -7V  VY or VZ  12V (Note 7) Full - - 250 mA VO = High or Low Receiver Differential Threshold VTH -7V  VCM  12V Full -200 -125 -50 mV Voltage Receiver Input Hysteresis VTH VCM = 0V 25 - 15 - mV FN6115 Rev 5.00 Page 5 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C (Note 5). (Continued) TEMP MIN MAX PARAMETER SYMBOL TEST CONDITIONS (°C) (Note 19) TYP (Note 19) UNITS Receiver Output High Voltage VOH IO = -4mA, VID = -50mV Full VCC - 0.6 - - V Receiver Output Low Voltage VOL IO = -4mA, VID = -200mV Full - 0.17 0.4 V Three-State (high impedance) IOZR 0.4V  VO  2.4V Full -1 0.015 1 A Receiver Output Current (Note 13) Receiver Input Resistance RIN -7V  VCM  12V Full 96 150 - k Receiver Short-Circuit Current IOSR 0V  VO  VCC Full 7 30 60 mA Thermal Shutdown Threshold TSD Full - 150 - °C SUPPLY CURRENT No-Load Supply Current (Note 6) ICC DI = 0V or VCC DE = VCC, Full - 510 800 A RE = 0V or VCC DE = 0V, RE = 0V Full - 480 700 A Shutdown Supply Current ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full - 0.01 1 A (Note 13) ESD PERFORMANCE RS-485 Pins (A, Y, B, Z) Human Body Model (HBM), Pin to GND 25 - 15 - kV All Other Pins HBM, per MIL-STD-883 Method 3015 25  7 - kV DRIVER SWITCHING CHARACTERISTICS (ISL83070E, ISL83071E, ISL83072E, 250kbps) Maximum Data Rate fMAX VOD = 1.5V, CD = 820pF (Figure 4, Note 17) Full 250 800 - kbps Driver Differential Output Delay tDD RDIFF = 54, CD = 50pF (Figure 2) Full 250 1100 1500 ns Driver Differential Output Skew tSKEW RDIFF = 54, CD = 50pF (Figure 2) Full - 6 100 ns Driver Differential Rise or Fall Time tR, tF RDIFF = 54, CD = 50pF (Figure 2) Full 350 960 1600 ns Driver Enable to Output High tZH RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 26 600 ns (Notes 8, 13) Driver Enable to Output Low tZL RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 200 600 ns (Notes 8, 13) Driver Disable from Output High tHZ RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 28 55 ns (Note 13) Driver Disable from Output Low tLZ RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 30 55 ns (Note 13) Time to Shutdown tSHDN (Notes 10, 13) Full 50 200 600 ns Driver Enable from Shutdown to tZH(SHDN) RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 180 700 ns Output High (Notes 10, 11, 13) Driver Enable from Shutdown to tZL(SHDN) RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 100 700 ns Output Low (Notes 10, 11, 13) DRIVER SWITCHING CHARACTERISTICS (ISL83073E, ISL83075E, 500kbps) Maximum Data Rate fMAX VOD = 1.5V, CD = 820pF (Figure 4, Note 17) Full 500 1600 - kbps Driver Differential Output Delay tDD RDIFF = 54, CD = 50pF (Figure 2) Full 180 350 800 ns Driver Differential Output Skew tSKEW RDIFF = 54, CD = 50pF (Figure 2) Full - 1 30 ns Driver Differential Rise or Fall Time tR, tF RDIFF = 54, CD = 50pF (Figure 2) Full 200 380 800 ns Driver Enable to Output High tZH RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 26 350 ns (Notes 8, 13) Driver Enable to Output Low tZL RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 100 350 ns (Notes 8, 13) FN6115 Rev 5.00 Page 6 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C (Note 5). (Continued) TEMP MIN MAX PARAMETER SYMBOL TEST CONDITIONS (°C) (Note 19) TYP (Note 19) UNITS Driver Disable from Output High tHZ RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 28 55 ns (Note 13) Driver Disable from Output Low tLZ RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 30 55 ns (Note 13) Time to Shutdown tSHDN (Notes 10, 13) Full 50 200 600 ns Driver Enable from Shutdown to tZH(SHDN) RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 180 700 ns Output High (Notes 10, 11, 13) Driver Enable from Shutdown to tZL(SHDN) RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 100 700 ns Output Low (Notes 10, 11, 13) DRIVER SWITCHING CHARACTERISTICS (ISL83076E, ISL83077E, ISL83078E, 20Mbps) Maximum Data Rate fMAX VOD = 1.5V, CD = 350pF (Figure 4, Note 17) Full 20 28 - Mbps Driver Differential Output Delay tDD RDIFF = 54, CD = 50pF (Figure 2) Full - 27 40 ns Driver Differential Output Skew tSKEW RDIFF = 54, CD = 50pF (Figure 2) Full - 1 3 ns Driver Output Skew, Part-to-Part tDSKEW RDIFF = 54, CD = 50pF (Figure 2, Note 14) Full - - 11 ns Driver Differential Rise or Fall Time tR, tF RDIFF = 54, CD = 50pF (Figure 2) Full - 9 15 ns Driver Enable to Output High tZH RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 17 50 ns (Notes 8, 13) Driver Enable to Output Low tZL RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 16 40 ns (Notes 8, 13) Driver Disable from Output High tHZ RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 25 40 ns (Note 13) Driver Disable from Output Low tLZ RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 28 50 ns (Note 13) Time to Shutdown tSHDN (Notes 10, 13) Full 50 200 600 ns Driver Enable from Shutdown to tZH(SHDN) RL = 500, CL = 50pF, SW = GND (Figure 3), Full - 180 700 ns Output High (Notes 10, 11, 13) Driver Enable from Shutdown to tZL(SHDN) RL = 500, CL = 50pF, SW = VCC (Figure 3), Full - 90 700 ns Output Low (Notes 10, 11, 13) RECEIVER SWITCHING CHARACTERISTICS (All Versions) Maximum Data Rate fMAX VID = 1.5V (Note 17) ISL83070E-75E Full 12 20 - Mbps ISL83076E-78E Full 20 35 - Mbps Receiver Input to Output Delay tPLH, tPHL (Figure 5) ISL83070E-75E Full 25 70 120 ns ISL83076E-78E Full 25 33 60 ns Receiver Skew | tPLH - tPHL | tSKD (Figure 5) Full - 1.5 4 ns Receiver Skew, Part-to-Part tRSKEW (Figure 5, Note 14) Full - - 15 ns Receiver Enable to Output High tZH RL = 1k, CL = 15pF, ISL83070E-75E Full 5 15 20 ns SW= GND (Figure 6), ISL83076E-78E Full 5 11 17 ns (Notes 9, 13) Receiver Enable to Output Low tZL RL = 1k, CL = 15pF, ISL83070E-75E Full 5 15 20 ns SW= VCC (Figure 6), ISL83076E-78E Full 5 11 17 ns (Notes 9, 13) Receiver Disable from Output High tHZ RL = 1k, CL = 15pF, ISL83070E-75E Full 5 12 20 ns SW= GND (Figure 6), ISL83076E-78E Full 4 7 15 ns (Note 13) FN6115 Rev 5.00 Page 7 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C (Note 5). (Continued) TEMP MIN MAX PARAMETER SYMBOL TEST CONDITIONS (°C) (Note 19) TYP (Note 19) UNITS Receiver Disable from Output Low tLZ RL = 1k, CL = 15pF, ISL83070E-75E Full 5 13 20 ns SW= VCC (Figure 6), ISL83076E-78E Full 4 7 15 ns (Note 13) Time to Shutdown tSHDN (Notes 10, 13) Full 50 180 600 ns Receiver Enable from Shutdown to tZH(SHDN) RL = 1k, CL = 15pF, SW = GND (Figure 6), Full - 240 500 ns Output High (Notes 10, 12, 13) Receiver Enable from Shutdown to tZL(SHDN) RL = 1k, CL = 15pF, SW = VCC (Figure 6), Full - 240 500 ns Output Low (Notes 10, 12, 13) NOTES: 5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 6. Supply current specification is valid for loaded drivers when DE = 0V. 7. Applies to peak current. See “Typical Performance Curves” for more information. 8. When testing devices with the shutdown feature, keep RE = 0 to prevent the device from entering SHDN. 9. When testing devices with the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 10. Versions with a shutdown feature are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on page11. 11. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 12. Set the RE signal high time >600ns to ensure that the device enters SHDN. 13. Does not apply to the ISL83071E and ISL83077E. 14. tSKEW is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (VCC, temperature, etc.). Only applies to the ISL83076E - 78E. 15. ISL83070E - ISL83075E only. 16. VCC 3.15V 17. Limits established by characterization and are not production tested. 18. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” table) through a 1k to 3k resistor. 19. Parts are 100% tested at +25°C. Full temperature limits are guaranteed by bench and tester characterization. 20. If the DE or RE input voltage exceeds the VCC voltage by more than 500mV, then current will flow into the logic pin. The current is limited by a 340Ω resistor (so ≈13mA with VIN = 5V and VCC = 0V) so no damage will occur if VCC ≤ VIN ≤ 7V for short periods of time. Test Circuits and Waveforms RL/2 375Ω DE DE VCC VCC DI Z DI Z VCM D VOD D VOD RL = 60Ω -7V TO +12V Y Y RL/2 VOC 375Ω FIGURE 1A. VOD AND VOC FIGURE 1B. VOD WITH COMMON MODE LOAD FIGURE 1. DC DRIVER TEST CIRCUITS FN6115 Rev 5.00 Page 8 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Test Circuits and Waveforms (Continued) 3V DI 1.5V 1.5V 0V DE tPLH tPHL VCC OUT (Z) VOH DI Z D RDIFF CD OUT (Y) VOL Y SIGNAL GENERATOR 90% 90% +VOD DIFF OUT (Y - Z) 10% 10% -VOD tR tF SKEW = |tPLH - tPHL| FIGURE 2A. TEST CIRCUIT FIGURE 2B. MEASUREMENT POINTS FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES DE DI Z 500Ω VCC 3V D SIGNAL Y SW GND DE NOTE 10 1.5V 1.5V GENERATOR 50pF 0V tZH, tZH(SHDN) tHZ NOTE 10 OUTPUT HIGH PARAMETER OUTPUT RE DI SW VOH - 0.25VVOH tHZ Y/Z X 1/0 GND OUT (Y, Z) 50% tLZ Y/Z X 0/1 VCC 0V tZH Y/Z 0 (Note 8) 1/0 GND tZL, tZL(SHDN) tLZ tZL Y/Z 0 (Note 8) 0/1 VCC NOTE 10 VCC tZH(SHDN) Y/Z 1 (Note 11) 1/0 GND OUT (Y, Z) 50% tZL(SHDN) Y/Z 1 (Note 11) 0/1 VCC VOL + 0.25VVOL OUTPUT LOW FIGURE 3A. TEST CIRCUIT FIGURE 3B. MEASUREMENT POINTS FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCEPT ISL83071E, ISL83077E) DE VCC + 3V DI Z DI D 54Ω CD VOD 0V Y - SGIEGNNEARLATOR DIFF OUT (Y - Z) +VOD 0V -VOD FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS FIGURE 4. DRIVER DATA RATE FN6115 Rev 5.00 Page 9 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Test Circuits and Waveforms (Continued) RE +1.5V 15pF A 0V 0V B GND A R RO -1.5V tPLH tPHL SIGNAL VCC GENERATOR RO 1.5V 1.5V 0V FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS FIGURE 5. RECEIVER PROPAGATION DELAY RE GND AB R RO 1kΩ VCC NOTE 10 3V SIGNAL SW GND RE 1.5V 1.5V GENERATOR 15pF 0V tZH, tZH(SHDN) tHZ NOTE 10 OUTPUT HIGH PARAMETER DE A SW VOH - 0.25VVOH tHZ X +1.5V GND RO 1.5V 0V tLZ X -1.5V VCC tZH (Note 9) 0 +1.5V GND tZL, tZL(SHDN) tLZ tZL (Note 9) 0 -1.5V VCC NOTE 10 VCC tZH(SHDN) (Note 12) 0 +1.5V GND RO 1.5V tZL(SHDN) (Note 12) 0 -1.5V VCC VOL + 0.25VVOL OUTPUT LOW FIGURE 6A. TEST CIRCUIT FIGURE 6B. MEASUREMENT POINTS FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES (EXCEPT ISL83071E, ISL83077E) Application Information Receiver Features RS-485 and RS-422 are differential (balanced) data These devices utilize a differential input receiver for maximum transmission standards for use in long haul or noisy noise immunity and common mode rejection. Input sensitivity environments. RS-422 is a subset of RS-485, so RS-485 is better than 200mV, as required by the RS-422 and RS-485 transceivers are also RS-422 compliant. RS-422 is a point- specifications. to-multipoint (multidrop) standard, which allows only one Receiver input resistance of 96k surpasses the RS-422 driver and up to 10 (assuming one unit load devices) spec of 4k, and is eight times the RS-485 “Unit Load (UL)” receivers on each bus. RS-485 is a true multipoint standard, requirement of 12k minimum. Thus, these products are which allows up to 32 one unit load devices (any known as “one-eighth UL” transceivers, and there can be up combination of drivers and receivers) on each bus. To allow to 256 of these devices on a network while still complying for multipoint operation, the RS-485 spec requires that with the RS-485 loading spec. drivers must handle bus contention without sustaining any Receiver inputs function with common mode voltages as great damage. as +9V/-7V outside the power supplies (i.e., +12V and -7V), Another important advantage of RS-485 is the extended making them ideal for long networks where induced voltages, common mode range (CMR), which specifies that the driver and ground potential differences, are realistic concerns. outputs and receiver inputs withstand signals that range from All the receivers include a “full fail-safe” function that +12V to -7V. RS-422 and RS-485 are intended for runs as guarantees a high level receiver output if the receiver inputs long as 4000’, so the wide CMR is necessary to handle are unconnected (floating) or shorted. Fail-safe with shorted ground potential differences, as well as voltages induced in inputs is achieved by setting the Rx upper switching point to the cable by external fields. -50mV, thereby ensuring that the Rx sees 0V differential as a high input level. FN6115 Rev 5.00 Page 10 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Receivers easily meet the data rates supported by the versions can operate at full data rates with lengths of several corresponding driver, and all receiver outputs (except on the thousand feet. ISL83071E and ISL83077E) are tri-statable via the active Twisted pair is the cable of choice for RS-485, RS-422 low RE input. networks. Twisted pair cables tend to pick up noise and Driver Features other electromagnetically induced voltages as common The RS-485, RS-422 driver is a differential output device mode signals, which are effectively rejected by the that delivers at least 1.5V across a 54 load (RS-485), and differential receivers in these ICs. at least 2V across a 100 load (RS-422). The drivers feature Proper termination is imperative, when using the 20Mbps low propagation delay skew to maximize bit width, and to devices, to minimize reflections. Short networks using the minimize EMI. 250kbps versions need not be terminated, but, terminations All drivers are tri-statable via the active high DE input, except are recommended unless power dissipation is an overriding on the ISL83071E and ISL83077E. concern. The 250kbps and 500kbps driver outputs are slew rate In point-to-point, or point-to-multipoint (single driver on bus) limited to minimize EMI, and to reduce reflections in networks, the main cable should be terminated in its unterminated or improperly terminated networks. Outputs of characteristic impedance (typically 120) at the end farthest the ISL83076E through ISL83078E drivers are not limited, from the driver. In multi-receiver applications, stubs so faster output transition times allow data rates of at least connecting receivers to the main cable should be kept as 20Mbps. short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic Hot Plug Function impedance at both ends. Stubs connecting a transceiver to When apiece of equipment powers up, there is a period of the main cable should be kept as short as possible. time where the processor or ASIC driving the RS-485 control Built-In Driver Overload Protection lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx outputs are kept disabled. If the equipment is connected As stated previously, the RS-485 spec requires that drivers to the bus, a driver activating prematurely during power up survive worst case bus contentions undamaged. These may crash the bus. To avoid this scenario, the ISL8307XE devices meet this requirement via driver output short circuit versions with output enable pins incorporate a “Hot Plug” current limits, and on-chip thermal shutdown circuitry. function. During power up, circuitry monitoring VCC ensures The driver output stages incorporate short circuit current that the Tx and Rx outputs remain disabled for a period of time, limiting circuitry which ensures that the output current never regardless of the state of DE and RE. This gives the exceeds the RS-485 spec, even at the common mode processor/ASIC a chance to stabilize and drive the RS-485 voltage range extremes. Additionally, these devices utilize a control lines to the proper states. foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage ESD Protection exceeds either supply. All pins on these devices include class 3 (>7kV) Human In the event of a major short circuit condition, devices also Body Model (HBM) ESD protection structures, but the include a thermal shutdown feature that disables the drivers RS-485 pins (driver outputs and receiver inputs) whenever the die temperature becomes excessive. This incorporate advanced structures allowing them to survive eliminates the power dissipation, allowing the die to cool. The ESD events in excess of 15kV HBM. The RS-485 pins are drivers automatically re-enable after the die temperature particularly vulnerable to ESD damage because they drops about +15°. If the contention persists, the thermal typically connect to an exposed port on the exterior of the shutdown/re-enable cycle repeats until the fault is cleared. finished product. Simply touching the port pins, or Receivers stay operational during thermal shutdown. connecting a cable, can cause an ESD event that might Low Power Shutdown Mode destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect These CMOS transceivers all use a fraction of the power without allowing any latchup mechanism to activate, and required by their bipolar counterparts, but some also include a without degrading the RS-485 common mode range of -7V shutdown feature that reduces the already low quiescent ICC to to +12V. This built-in ESD protection eliminates the need a 10nA trickle. These devices enter shutdown whenever the for board level protection structures (e.g., transient receiver and driver are simultaneously disabled (RE=VCC suppression diodes), and the associated, undesirable and DE=GND) for a period of at least 600ns. Disabling both capacitive load they present. the driver and the receiver for less than 50ns guarantees that the transceiver will not enter shutdown. Data Rate, Cables, and Terminations Note that receiver and driver enable times increase when the RS-485, RS-422 are intended for network lengths up to transceiver enables from shutdown. Refer to Notes 8 through 4000’, but the maximum system data rate decreases as the 12, at the end of the “Electrical Specifications” table on page8 transmission length increases. Devices operating at 20Mbps for more information. are limited to lengths less than 100’, while the 250kbps FN6115 Rev 5.00 Page 11 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Typical Performance Curves VCC = 3.3V, TA = +25°C; Unless Otherwise Specified 120 2.35 T (mA) 100 TAGE (V) 22..2350 RDIFF = 100Ω REN 80 VOL 2.20 R T 2.15 U U C P UT 60 UT 2.10 R OUTP 40 NTIAL O 22..0005 VE RE 1.95 RDIFF = 54Ω RI 20 E D FF 1.90 DI 0 1.85 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -40 -25 0 25 50 75 85 DIFFERENTIAL OUTPUT VOLTAGE (V) TEMPERATURE (°C) FIGURE 7. DRIVER OUTPUT CURRENT vs DIFFERENTIAL FIGURE 8. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT VOLTAGE TEMPERATURE 200 0.52 ISL83076E/77/78E ISL83072/75/78E, DE = VCC, RE = X 150 0.51 Y OR Z = LOW ISL83070E THRU ISL83075E A)100 m 0.50 T ( EN 50 A) ISL83070/73/76E, DE = X, RE = 0V; ISL83071/77E R m 0.49 CUR 0 (CC T I U 0.48 P T -50 U O Y OR Z = HIGH -100 0.47 ISL83072/75/78E, DE = 0V, RE = 0V ISL8307XE -150 0.46 -7 -6 -4 -2 0 2 4 6 8 10 12 -40 -25 0 25 50 75 85 OUTPUT VOLTAGE (V) TEMPERATURE (°C) FIGURE 9. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT FIGURE 10. SUPPLY CURRENT vs TEMPERATURE VOLTAGE 1220 8.0 1200 7.5 s) n 1180 Y ( A EL 1160 s) 7.0 D n N W ( O E TI 1140 K A S 6.5 G A P RO 1120 tPHL P 6.0 1100 tPLH |CROSS PT. OF Y AND Z - CROSS PT. OF Y AND Z| 1080 5.5 -40 -25 0 25 50 75 85 -40 -25 0 25 50 75 85 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 11. DRIVER DIFFERENTIAL PROPAGATION DELAY FIGURE 12. DRIVER DIFFERENTIAL SKEW vs vs TEMPERATURE (ISL83070E, ISL83071E, TEMPERATURE (ISL83070E, ISL83071E, ISL83072E) ISL83072E) FN6115 Rev 5.00 Page 12 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Typical Performance Curves VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued) 370 1.4 365 1.2 s) n Y ( 360 1.0 A EL s) D n N 355 W ( 0.8 O E TI K A S G A 350 0.6 OP tPHL R P 345 0.4 tPLH |CROSS PT. OF Y AND Z - CROSS PT. OF Y AND Z| 340 0.2 -40 -25 0 25 50 75 85 -40 -25 0 25 50 75 85 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 13. DRIVER DIFFERENTIAL PROPAGATION DELAY FIGURE 14. DRIVER DIFFERENTIAL SKEW vs vs TEMPERATURE (ISL83073E, ISL83075E) TEMPERATURE (ISL83073E, ISL83075E) 32 0.95 31 0.90 30 s) Y (n 29 0.85 A N DEL 2278 W (ns) 0.80 O E TI K 0.75 A 26 tPHL S G A OP 25 tPLH 0.70 R P 24 0.65 23 |CROSS PT. OF Y AND Z - CROSS PT. OF Y AND Z| 22 0.60 -40 -25 0 25 50 75 85 -40 -25 0 25 50 75 85 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 15. DRIVER DIFFERENTIAL PROPAGATION DELAY FIGURE 16. DRIVER DIFFERENTIAL SKEW vs vs TEMPERATURE (ISL83076E, ISL83077E, TEMPERATURE (ISL83076E, ISL83077E, ISL83078E) ISL83078E) CEIVER OUTPUT (V) 05 DI RO RDIFF = 54Ω, CD = 50pF 05 DRIVER INPUT (V) CEIVER OUTPUT (V) 05 DI RORDIFF = 54Ω, CD = 50pF 05 DRIVER INPUT (V) E E R R V)3.0 V)3.0 PUT (22..05 B/Z PUT (22..05 A/Y UT1.5 UT1.5 R O1.0 A/Y R O1.0 B/Z VE0.5 VE0.5 DRI 0 DRI 0 TIME (400ns/DIV) TIME (400ns/DIV) FIGURE 17. DRIVER AND RECEIVER WAVEFORMS, FIGURE 18. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83070E, ISL83071E, HIGH TO LOW (ISL83070E, ISL83071E, ISL83072E) ISL83072E) FN6115 Rev 5.00 Page 13 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Typical Performance Curves VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued) EIVER OUTPUT (V) 05 DI RO RDIFF = 54Ω, CD = 50pF 05 DRIVER INPUT (V) EIVER OUTPUT (V) 05 DI RORDIFF = 54Ω, CD = 50pF 05 DRIVER INPUT (V) C C E E R R V)3.0 V)3.0 T (2.5 B/Z T (2.5 A/Y PU2.0 PU2.0 T T U1.5 U1.5 O A/Y O B/Z R 1.0 R 1.0 E E V0.5 V0.5 DRI 0 DRI 0 TIME (200ns/DIV) TIME (200ns/DIV) FIGURE 19. DRIVER AND RECEIVER WAVEFORMS, FIGURE 20. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83073E, ISL83075E) HIGH TO LOW (ISL83073E, ISL83075E) EIVER OUTPUT (V) 05 DI RORDIFF = 54Ω, CD = 50pF 05 DRIVER INPUT (V) EIVER OUTPUT (V) 05 DI RDIFF = 5R4OΩ, CD = 50pF 05 DRIVER INPUT (V) C C E E R R V)3.0 V)3.0 T (2.5 B/Z T (2.5 A/Y PU2.0 PU2.0 T T U1.5 U1.5 O A/Y O B/Z R 1.0 R 1.0 E E V0.5 V0.5 RI RI D 0 D 0 TIME (10ns/DIV) TIME (10ns/DIV) FIGURE 21. DRIVER AND RECEIVER WAVEFORMS, FIGURE 22. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL83076E, ISL83077E, HIGH TO LOW (ISL83076E, ISL83077E, ISL83078E) ISL83078E) FN6115 Rev 5.00 Page 14 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Typical Performance Curves VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued) 35 mA) 30 VOL, +25°C Die Characteristics T ( N E 25 SUBSTRATE POTENTIAL (POWERED UP): R R VOL, +85°C CU 20 VOH, +25°C GND T U TP 15 TRANSISTOR COUNT: OU VOH, +85°C 535 R 10 E V PROCESS: EI C 5 E Si Gate BiCMOS R 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 RECEIVER OUTPUT VOLTAGE (V) FIGURE 23. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE © Copyright Intersil Americas LLC 2005-2012. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6115 Rev 5.00 Page 15 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Package Outline Drawing M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 4, 7/11 5 3.0±0.05 A DETAIL "X" D 8 1.10 MAX SIDE VIEW 2 0.09 - 0.20 4.9±0.15 3.0±0.05 5 0.95 REF PIN# 1 ID 1 2 B 0.65 BSC GAUGE TOP VIEW PLANE 0.25 3°±3° 0.55 ± 0.15 0.85±010 H DETAIL "X" C SEATING PLANE 0.25 - 0.36 0.08MCA-BD 0.10 ± 0.05 0.10C SIDE VIEW 1 (5.80) NOTES: (4.40) (3.00) 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. (0.65) 4. Plastic interlead protrusions of 0.15mm max per side are not (0.40) included. (1.40) 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only. TYPICAL RECOMMENDED LAND PATTERN FN6115 Rev 5.00 Page 16 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Package Outline Drawing M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) AREA 5.80 (0.228) 0.50 (0.20) x 45° 4.00 (0.157) 0.25 (0.01) 3.80 (0.150) 8° 1 2 3 0° 0.25 (0.010) 0.19 (0.008) TOP VIEW SIDE VIEW “B” 2.20 (0.087) 1 8 SEATING PLANE 0.60 (0.023) 5.00 (0.197) 1.75 (0.069) 2 7 4.80 (0.189) 1.35 (0.053) 1.27 (0.050) 3 6 -C- 4 5 1.27 (0.050) 0.25(0.010) 0.10(0.004) 0.51(0.020) 5.20(0.205) 0.33(0.013) SIDE VIEW “A TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1994. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEDEC publication MS-012-AA ISSUE C. FN6115 Rev 5.00 Page 17 of 18 October 5, 2012

ISL83070E/71E/72E/73E/75E/76E/77E/78E Package Outline Drawing M14.15 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 1, 10/09 4 0.10CA-B2X 8.65 A 3 6 DETAIL"A" 0.22±0.03 14 8 D 6.0 3.9 4 0.10CD2X PIN NO.1 7 0.20C2X ID MARK (0.35) x 45° 4° ± 4° 5 0.31-0.51 B 3 6 0.25MCA-B D TOP VIEW 0.10C 1.75 MAX H 1.25 MIN 0.25 GAUGE PLANE C 1.27 0.10-0.25 SEATING PLANE 0.10C SIDE VIEW DETAIL "A" (1.27) (0.6) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSEY14.5m-1994. 3. Datums A and B to be determined at Datum H. (5.40) 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 indentifier may be either a mold or mark feature. 6. Does not include dambar protrusion. Allowable dambar protrusion (1.50) shall be 0.10mm total in excess of lead width at maximum condition. 7. Reference to JEDEC MS-012-AB. TYPICAL RECOMMENDED LAND PATTERN FN6115 Rev 5.00 Page 18 of 18 October 5, 2012