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  • 型号: ISL4241EIRZ-T
  • 制造商: Intersil
  • 库位|库存: xxxx|xxxx
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ISL4241EIRZ-T产品简介:

ICGOO电子元器件商城为您提供ISL4241EIRZ-T由Intersil设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 ISL4241EIRZ-T价格参考。IntersilISL4241EIRZ-T封装/规格:接口 - 驱动器,接收器,收发器, 全 收发器 3/5 RS232 32-QFN(5x5)。您可以下载ISL4241EIRZ-T参考资料、Datasheet数据手册功能说明书,资料中有ISL4241EIRZ-T 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC XMITTER/RCVR ESD RS232 32-QFN

产品分类

接口 - 驱动器,接收器,收发器

品牌

Intersil

数据手册

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产品图片

产品型号

ISL4241EIRZ-T

PCN组件/产地

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rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

产品目录页面

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供应商器件封装

32-QFN(5x5)

其它名称

ISL4241EIRZ-TCT
ISL4241EIRZT

包装

剪切带 (CT)

协议

RS232

双工

安装类型

表面贴装

封装/外壳

32-VFQFN 裸露焊盘

工作温度

-40°C ~ 85°C

接收器滞后

500mV

数据速率

250kbps

标准包装

1

电压-电源

2.7 V ~ 5.5 V

类型

收发器

驱动器/接收器数

3/5

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PDF Datasheet 数据手册内容提取

DATASHEET ISL4241E, ISL4243E FN8037 QFN Packaged, ±15kV ESD Protected, +2.7V to +5.5V, 10Nanoamp, 250kbps, Rev 7.00 RS-232 Transmitters/Receivers Jun 10, 2010 Intersil’s ISL4241E, ISL4243E devices are 2.7V to 5.5V Features powered RS-232 transmitters/receivers which meet • Pb-Free Available (RoHS compliant) ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Additionally, they provide ±15kV ESD protection • Parameters Fully Specified for 10% Tolerance Supplies (IEC61000-4-2 Air Gap and Human Body Model) on and Full Industrial Temp Range transmitter outputs and receiver inputs (RS-232 pins). • Available in Small QFN (5mmx5mm) Package which is Targeted applications are PDAs, Palmtops, and notebook 60% Smaller than a 28 Lead TSSOP and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient • ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000) on-chip charge pumps, coupled with manual and automatic • Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V power-down functions, reduce the standby supply current to a 10nA trickle. Tiny 5mmx5mm Quad Flat No-Lead (QFN) • RS-232 Compatible with VCC = 2.7V packaging and the use of small, low value capacitors ensure • On-Chip Voltage Converters Require Only Four External board space savings as well. Data rates greater than 0.1µF Capacitors 250kbps are guaranteed at worst case load conditions. • Manual and Automatic Power-down Features The ISL4241E, ISL4243E’s are 3 driver, 5 receiver devices • Receiver Hysteresis For Improved Noise Immunity that, coupled with the 5x5 QFN package, provide the • Guaranteed Minimum Data Rate. . . . . . . . . . . . . 250kbps industry’s smallest, lowest power complete serial port suitable for PDAs, and laptop or notebook computers. The • Wide Power Supply Range . . . . . . Single +2.7V to +5.5V 32 Ld 5X5 QFN requires 60% less board area than a 28 Ld • Low Supply Current in Power-down State . . . . . . . . .10nA TSSOP, and is nearly 20% thinner. The devices also include a noninverting always-active receiver for “wake-up” Applications capability. • Any Space Constrained System Requiring RS-232 Ports The ISL4243E features an automatic power-down function - Battery Powered, Hand-Held, and Portable Equipment that powers down the on-chip power-supply and driver - Laptop Computers, Notebooks circuits. This occurs when an attached peripheral device is - PDAs and Palmtops, Data Cables shut off or the RS-232 cable is removed, conserving system - Cellular/Mobile Phones, Digital Cameras, GPS power automatically without changes to the hardware or Receivers operating system. It powers up again when a valid RS-232 voltage is applied to any receiver input. Related Literature Table 1 summarizes the features of both the ISL4241E and • Technical Brief TB363 “Guidelines for Handling and ISL4243E, while Application Note AN9863 summarizes the Processing Moisture Sensitive Surface Mount Devices features of each device comprising the 3V RS-232 family. • ”Technical Brief TB379 “Thermal Characterization of Packages for ICs” • Technical Brief TB389 “PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages” TABLE 1. SUMMARY OF FEATURES AUTOMATIC NO. OF DATA MANUAL POWER- NO. OF NO. OF QFN PKG. MONITOR Rx. RATE Rx. ENABLE READY POWER- DOWN PART NUMBER Tx. Rx. AVAILABLE? (ROUTB) (kbps) FUNCTION? OUTPUT? DOWN? FUNCTION? ISL4241E 3 5 YES 2 250 YES NO YES NO ISL4243E 3 5 YES 1 250 NO NO YES YES FN8037 Rev 7.00 Page 1 of 14 Jun 10, 2010

ISL4241E, ISL4243E Ordering Information PART TEMP. RANGE NUMBER PART MARKING (°C) PACKAGE PKG. DWG. # ISL4241EIR ISL 4241EIR -40 to +85 32 Ld QFN L32.5x5B ISL4241EIR-T* ISL 4241EIR -40 to +85 32 Ld QFN L32.5x5B Tape & Reel ISL4241EIRZ (Note) ISL4241 EIRZ -40 to +85 32 Ld QFN (Pb-Free) L32.5x5B ISL4241EIRZ-T* (Note) ISL4241 EIRZ -40 to +85 32 Ld QFN L32.5x5B Tape & Reel (Pb-Free) ISL4243EIR ISL 4243EIR -40 to +85 32 Ld QFN L32.5x5B ISL4243EIR-T* ISL 4243EIR -40 to +85 32 Ld QFN L32.5x5B Tape & Reel ISL4243EIRZ (Note) ISL4243 EIRZ -40 to +85 32 Ld QFN (Pb-Free) L32.5x5B ISL4243EIRZ-T* (Note) ISL4243 EIRZ -40 to +85 32 Ld QFN L32.5x5B Tape & Reel (Pb-Free) *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinouts ISL4241E ISL4243E (32 LD QFN) (32 LD QFN) TOP VIEW TOP VIEW NC V- C2- C2+ C1+ V+ VCC NC NC V- C2- C2+ C1+ V+ VCC NC 32 31 30 29 28 27 26 25 32 31 30 29 28 27 26 25 R1IN 1 24 GND R1IN 1 24 GND R2IN 2 23 C1- R2IN 2 23 C1- R3IN 3 22 EN R3IN 3 22 FORCEON R4IN 4 21 SHDN R4IN 4 21 FORCEOFF R5IN 5 PD 20 R1OUTB R5IN 5 PD 20 INVALID T1OUT 6 19 R2OUTB T1OUT 6 19 R2OUTB T2OUT 7 18 R1OUT T2OUT 7 18 R1OUT T3OUT 8 17 R2OUT T3OUT 8 17 R2OUT 9 10 11 12 13 14 15 16 9 10 11 12 13 14 15 16 NC T3IN T2IN T1IN R5OUT R4OUT R3OUT NC NC T3IN T2IN T1IN R5OUT R4OUT R3OUT NC FN8037 Rev 7.00 Page 2 of 14 Jun 10, 2010

ISL4241E, ISL4243E Pin Descriptions PIN FUNCTION VCC System power supply input (2.7V to 5.5V). V+ Internally generated positive transmitter supply (+5.5V). V- Internally generated negative transmitter supply (-5.5V). GND Ground connection. This is also the potential of the thermal pad (PD). C1+ External capacitor (voltage doubler) is connected to this lead. C1- External capacitor (voltage doubler) is connected to this lead. C2+ External capacitor (voltage inverter) is connected to this lead. C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. TOUT ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs. RIN ±15kV ESD Protected, RS-232 compatible receiver inputs. ROUT TTL/CMOS level receiver outputs. ROUTB TTL/CMOS level, noninverting, always enabled receiver outputs. INVALID Active low output that indicates if no valid RS-232 levels are present on any receiver input. FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2). FORCEON Active high input to override automatic power-down circuitry thereby keeping transmitters active. (FORCEOFF must be high). EN Active low receiver enable control. SHDN Active low input to shut down transmitters and on-board power supply, to place device in low power mode. NC No Connection PD Exposed Thermal Pad. Connect to GND. FN8037 Rev 7.00 Page 3 of 14 Jun 10, 2010

ISL4241E, ISL4243E Typical Operating Circuits ISL4241E ISL4243E +3.3V + +3.3V + 0.1µF 0.1µF 26 26 0.1CµF1 +2283 C1+ VCC V+ 27 +0C.31µF 0.1CµF1 +2283 C1+ VCC V+ 27 +0C.31µF C1- C1- 0.1CµF2 +2390 C2+ V- 31 C0.41µF 0.1CµF2 +2390 C2+ V- 31 C4 C2- + C2- 0.1µF 12 T1 6 + T1IN 12 T1 6 11 T2 7 T1OUT T1IN T1OUT TT23IINN 1200 T3 8 TT23OOUUTT RLESV-2E3L2S TT23IINN 1110 TT23 87 T2OUT RLESV-2E3L2S R1OUTB T3OUT 19 19 R2OUTB R2OUTB 18 1 TTL/CMOS R1OUT 18 1 LOGIC R1 5k R1IN R1OUT R1IN LEVELS 17 2 TTL/CMOS R1 5k LOGIC R2OUT R2IN LEVELS 17 2 R2 5k R2OUT R2IN 15 3 R2 5k R3OUT RS-232 R3 5k R3IN LEVELS R3OUT 15 3 R3IN RLESV-2E3L2S 14 4 R3 5k R4OUT R4 5k R4IN R4OUT 14 4 R4IN 13 5 R4 5k R5OUT 22 EN R5 5k R5IN 13 5 R5OUT R5IN 21 22 R5 5k VCC SHDN GND FORCEON 24 21 VCC FORCEOFF TO POWER 20 INVALID GND CONTROL LOGIC 24 FN8037 Rev 7.00 Page 4 of 14 Jun 10, 2010

ISL4241E, ISL4243E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V Thermal Resistance (Typical, Notes 1, 2) JA (°C/W) JC (°C/W) V+ to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V 32 Ld QFN Package. . . . . . . . . . . . . . . 32 2.0 V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below Input Voltages http://www.intersil.com/pbfree/Pb-FreeReflow.asp TIN, FORCEOFF, FORCEON, EN, SHDN. . . . . . . . . -0.3V to 6V RIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Operating Conditions Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V Temperature Range ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V ISL4241EIR, ISL4243EIR . . . . . . . . . . . . . . . . . . .-40°C to +85°C Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . See “ESD PERFORMANCE” on page7 CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379, and Tech Brief TB389. 2. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 to C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = +25°C TEMP MIN MAX PARAMETER TEST CONDITIONS (°C) (Note 4) TYP (Note 4) UNITS DC CHARACTERISTICS Operating Voltage Range Full 2.7 - 5.5 V Supply Current, Automatic All RIN Open, FORCEON = GND, FORCEOFF = VCC 25 - 3 300 nA Power-down (ISL4243E Only) Full - 50 300 nA Supply Current, Power-down All RIN Open, FORCEOFF = SHDN = GND 25 - 3 300 nA Full - 50 300 nA Supply Current, All Outputs Unloaded, 25 - 0.3 1.0 mA Automatic Power-down Disabled FORCEON = FORCEOFF = SHDN = VCC, VCC = 3.0V Full - 0.3 1.5 mA LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low TIN, FORCEON, FORCEOFF, EN, SHDN Full - - 0.8 V Input Logic Threshold High TIN, FORCEON, FORCEOFF, EN, SHDN, VCC = 3.6V Full 2.0 - - V Input Leakage Current TIN, FORCEON, FORCEOFF, EN, SHDN Full - ±0.01 ±1.0 µA Output Leakage Current FORCEOFF = GND (ISL4243E) or EN = VCC (ISL4241E) Full - ±0.05 ±10 µA Transmitter Input Hysteresis 25 - 0.5 - V Output Voltage Low IOUT = 1.6mA Full - - 0.4 V Output Voltage High IOUT = -1.0mA Full VCC - 0.6 VCC - 0.1 - V AUTOMATIC POWER-DOWN (ISL4243E Only, FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to ISL4243E Powers Up (see Figure 7) Full -2.7 - 2.7 V Enable Transmitters Receiver Input Thresholds to ISL4243E Powers Down (see Figure7) Full -0.3 - 0.3 V Disable Transmitters INVALID Output Voltage Low IOUT = 1.6mA Full - - 0.4 V INVALID Output Voltage High IOUT = -1.0mA Full VCC - 0.6 - - V Receiver Threshold to Transmitters Full - 20 100 µs Enabled Delay (tWU) FN8037 Rev 7.00 Page 5 of 14 Jun 10, 2010

ISL4241E, ISL4243E Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 to C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = +25°C (Continued) TEMP MIN MAX PARAMETER TEST CONDITIONS (°C) (Note 4) TYP (Note 4) UNITS Receiver Positive or Negative 25 - 0.5 1 µs Threshold to INVALID High Delay Full - 0.9 1.5 µs (tINVH) Receiver Positive or Negative 25 - 30 50 µs Threshold to INVALID Low Delay Full - 40 60 µs (tINVL) RECEIVER INPUTS Input Voltage Range Full -25 - 25 V Input Threshold Low VCC = 3.0V Full - 1.0 0.6 V Input Threshold High VCC = 3.6V Full 2.4 1.5 - V Input Hysteresis 25 - 0.5 - V Input Resistance Full 3 5 7 k TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with 3k to Ground Full ±5.0 ±5.4 - V Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M -  Output Short-Circuit Current Full - ±35 ±60 mA Output Leakage Current VOUT = ±12V, VCC = 0V or 3V to 5.5V, Full - - ±25 µA Automatic Power-down or FORCEOFF = SHDN = GND TIMING CHARACTERISTICS Maximum Data Rate RL = 3kCL = 1000pF, One Transmitter Switching Full 250 500 - kbps Receiver Propagation Delay Receiver Input to Receiver Output, tPHL 25 - 0.15 0.3 µs CL = 150pF Full - 0.2 0.35 µs tPLH 25 - 0.3 0.5 µs Full - 0.35 0.55 µs Receiver Skew tPHL - tPLH, CL = 150pF 25 - 120 250 ns Full - 150 300 ns Transmitter Propagation Delay Transmitter Input to Transmitter Output, tPHL 25 - 0.75 1 µs CL = 1000pF, RL = 3k Full - 0.85 1.1 µs tPLH 25 - 0.8 1 µs Full - 0.9 1.1 µs Transmitter Skew tPHL - tPLH (Note 3), RL = 3k, CL = 1000pF 25 - 50 200 ns Full - 100 250 ns Receiver Output Enable Time Normal Operation, RL = 1k to 0.5VCC, CL = 15pF 25 - 200 350 ns Full - 200 400 ns Receiver Output Disable Time Normal Operation, RL = 1k to 0.5VCC, CL = 15pF 25 - 350 500 ns Full - 400 600 ns Transmitter Output Enable Time Normal Operation, RL = 3k, CL = 1000pF 25 - 25 40 µs Full - 30 50 µs Transmitter Output Disable Time Normal Operation, RL = 3k, CL = 1000pF 25 - 2.5 4 µs Full - 2.7 4 µs FN8037 Rev 7.00 Page 6 of 14 Jun 10, 2010

ISL4241E, ISL4243E Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 to C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = +25°C (Continued) TEMP MIN MAX PARAMETER TEST CONDITIONS (°C) (Note 4) TYP (Note 4) UNITS Transition Region Slew Rate VCC = 3V to 3.6V, RL = 3kto 7k CL = 150pF to 25 4 9 30 V/µs Measured From 3V to -3V or -3V to 3V 2500pF Full 4 8 30 V/µs CL = 150pF to 25 6 11 30 V/µs 1000pF Full 6 10 30 V/µs ESD PERFORMANCE RS-232 Pins (TOUT, RIN) Human Body Model 25 - ±15 - kV IEC61000-4-2 Contact Discharge 25 - ±8 - kV IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV All Other Pins Human Body Model 25 - ±2 - kV NOTE: 3. Transmitter skew is measured at the transmitter zero crossing points. 4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Detailed Description transmitter operating at full speed. Under more typical The ISL4241E and ISL4243E both operate from a single conditions of VCC  3.3V, RL = 3k, and CL = 250pF, one transmitter easily operates at 900kbps. +2.7V to +5.5V supply, guarantee a 250kbps minimum data rate, require only four small external 0.1µF capacitors, Transmitter inputs float if left unconnected, and may cause feature low power consumption, and meet all ElA RS-232C ICC increases. Connect unused inputs to GND for the best and V.28 specifications even with VCC = 3.0V. The circuit is performance. divided into three sections: The charge pump, the Receivers transmitters, and the receivers. All the ISL4241E, ISL4243E’s devices contain standard Charge-Pump inverting receivers that are three-state via the EN or Intersil’s new ISL4241E, ISL4243E devices utilize regulated FORCEOFF control lines. Additionally, the ISL4241E, on-chip dual charge pumps as voltage doublers, and voltage ISL4243E’s products include noninverting (monitor) inverters to generate ±5.5V transmitter supplies from a VCC receivers (denoted by the ROUTB label) that are always supply as low as 3.0V. This allows them to maintain RS-232 active, regardless of the state of any control lines. All the compliant output levels over the ±10% tolerance range of receivers convert RS-232 signals to CMOS output levels and 3.3V powered systems. The efficient on-chip power supplies accept inputs up to 25V while presenting the required 3k require only four small, external 0.1µF capacitors for the to 7k input impedance (see Figure 1) even if the power is voltage doubler and inverter functions. The charge pumps off (VCC= 0V). The receivers’ Schmitt trigger input stage operate discontinuously (i.e., they turn off as soon as the V+ uses hysteresis to increase noise immunity and decrease and V- supplies are pumped up to the nominal values), errors due to slow input signal transitions. resulting in significant power savings. VCC Transmitters RXIN RXOUT The transmitters are proprietary, low dropout, inverting -25V  VRIN  +25V 5k GND  VROUT  VCC drivers that translate TTL/CMOS inputs to EIA/TIA-232 GND output levels. Coupled with the on-chip ±5.5V supplies, FIGURE 1. INVERTING RECEIVER CONNECTIONS these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. The ISL4241E inverting receivers disable only when EN is All transmitter outputs disable and assume a high driven high. ISL4243E receivers disable during forced (manual) power-down, but not during automatic power-down impedance state when the device enters the power-down (see Table 2). mode (see Table 2). These outputs may be driven to ±12V when disabled. The devices guarantee a 250kbps data rate for full load conditions (3k and 1000pF), VCC  3.0V, with one FN8037 Rev 7.00 Page 7 of 14 Jun 10, 2010

ISL4241E, ISL4243E TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE RS-232 SIGNAL PRESENT AT SHDN OR RECEIVER FORCEOFF FORCEON EN TRANSMITTER RECEIVER ROUTB INVALID INPUT? INPUT INPUT INPUT OUTPUTS OUTPUTS OUTPUTS OUTPUT MODE OF OPERATION ISL4241E N.A. L N/A L High-Z Active Active N/A Manual Power-down N.A. L N/A H High-Z High-Z Active N/A Manual Power-down w/Receiver Disabled N.A. H N/A L Active Active Active N/A Normal Operation N.A. H N/A H Active High-Z Active N/A Normal Operation w/Receiver Disabled ISL4243E NO H H N/A Active Active Active L Normal Operation (Auto Power-down Disabled) YES H L N/A Active Active Active H Normal Operation (Auto Power-down Enabled) NO H L N/A High-Z Active Active L Power-down Due to Auto Power-down Logic YES L X N/A High-Z High-Z Active H Manual Power-down NO L X N/A High-Z High-Z Active L Manual Power-down ISL4241E and ISL4243E monitor receivers remain active VCC even during manual power-down, making them extremely VCC useful for Ring Indicator monitoring. Standard receivers CURRENT driving powered down peripherals must be disabled to VCC FLOW prevent current flow through the peripheral’s protection diodes (see Figures 2 and 3). This renders them useless for VOUT = VCC wake-up functions, but the corresponding monitor receiver Rx can be dedicated to this task as shown in Figure 3. POWERED DOWN Low Power Operation UART Tx These 3V devices require a nominal supply current of SHDN = GND OLD 0.3mA, even at VCC=5.5V, during normal operation (not in GND RS-232 CHIP power-down mode). This is considerably less than the 5mA to 11mA current required by comparable 5V RS-232 devices, allowing users to reduce system power simply by switching FIGURE 2. POWER DRAIN THROUGH POWERED DOWN to this new family. PERIPHERAL Power-down Functionality The already low current requirement drops significantly when the device enters power-down mode. In power-down, supply current drops to 10nA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs three-state. Inverting receiver outputs disable only in manual power-down; refer to Table 2 for details. This micro-power mode makes the ISL4241E and ISL4243E ideal for battery powered and portable applications. FN8037 Rev 7.00 Page 8 of 14 Jun 10, 2010

ISL4241E, ISL4243E VCC FORCEOFF PWR MGT FORCEON TRANSITION LOGIC DETECTOR TO ISL4241E INVALID WAKE-UP ISL4243E ISL4243E LOGIC VCC R2OUTB RX VOUT = HI-Z I/O UART POWERED R2OUT R2IN CPU DOWN UART TX T1IN T1OUT FORCEOFF = GND OR SHDN = GND, EN = VCC FIGURE 4. CONNECTIONS FOR MANUAL POWER-DOWN WHEN NO VALID RECEIVER SIGNALS ARE FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN PRESENT Software Controlled (Manual) Power-down Most devices in the ISL4241E, ISL4243E family provide pins With any of the previous mentioned control schemes, the that allow the user to force the IC into the low power, standby time required to exit power-down, and resume transmission state. is only 100µs. A mouse, or other application, may need more time to wake up from shutdown. If automatic power-down is On the ISL4241E, the power-down control is via a simple being utilized, the RS-232 device will reenter power-down if shutdown (SHDN) pin. Driving this pin high enables normal valid receiver levels aren’t reestablished within 30µs of the operation, while driving it low forces the IC into it’s ISL4243E powering up. Figure 5 illustrates a circuit that power-down state. Connect SHDN to VCC if the power-down keeps the ISL4243E from initiating automatic power-down function isn’t needed. Note that all the receiver outputs for 100ms after powering up. This gives the slow-to-wake remain enabled during shutdown (see Table 2). For the peripheral circuit time to reestablish valid RS-232 output lowest power consumption during power-down, the receivers levels. should also be disabled by driving the EN input high (see next section, and Figures 2 and 3). POWER MASTER POWER-DOWN LINE MANAGEMENT The ISL4243E utilize a two pin approach where the UNIT 0.1µF 1M FORCEON and FORCEOFF inputs determine the IC’s mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. To switch between FORCEOFF FORCEON active and power-down modes, under logic or software ISL4243E control, only the FORCEOFF input need be driven. The FORCEON state isn’t critical, as FORCEOFF dominates over FORCEON. Nevertheless, if strictly manual control over FIGURE 5. CIRCUIT TO PREVENT AUTO POWER-DOWN power-down is desired, the user must strap FORCEON high FOR 100ms AFTER FORCED POWERUP to disable the automatic power-down circuitry. The ISL4243E inverting (standard) receiver outputs also disable when the INVALID Output (ISL4243E Only) device is in manual power-down, thereby eliminating the The INVALID output always indicates whether or not a valid possible current path through a shutdown peripheral’s input RS-232 signal (see Figure 6) is present at any of the protection diode (see Figures 2 and 3). receiver inputs (see Table 2), giving the user an easy way to determine when the interface block should power down. Connecting FORCEOFF and FORCEON together disables Invalid receiver levels occur whenever the driving the automatic power-down feature, enabling them to function peripheral’s outputs are shut off (powered down) or when the as a manual SHUTDOWN input (see Figure 4). RS-232 interface cable is disconnected. In the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic FN8037 Rev 7.00 Page 9 of 14 Jun 10, 2010

ISL4241E, ISL4243E then uses this indicator to power down the interface block. peripheral’s outputs are shut off (powered down) or when the Reconnecting the cable restores valid levels at the receiver RS-232 interface cable is disconnected. The ISL4243E inputs, INVALID switches high, and the power management powers back up whenever it detects a valid RS-232 voltage logic wakes up the interface block. INVALID can also be level on any receiver input. This automatic power-down used to indicate the DTR or RING INDICATOR signal, as feature provides additional system power savings without long as the other receiver inputs are floating, or driven to changes to the existing operating system. GND (as in the case of a powered down driver). Automatic power-down operates when the FORCEON input is low, and the FORCEOFF input is high. Tying FORCEON VALID RS-232 LEVEL - ISL4243E IS ACTIVE high disables automatic power-down, but manual 2.7V power-down is always available via the overriding INDETERMINATE - POWER-DOWN MAY OR FORCEOFF input. Table 2 summarizes the automatic MAY NOT OCCUR power-down functionality. 0.3V INVALID LEVEL - POWER-DOWN OCCURS AFTER 30µs The time to recover from automatic power-down mode is -0.3V typically 100µs. INDETERMINATE - POWER-DOWN MAY OR Capacitor Selection MAY NOT OCCUR The charge pumps require 0.1µF, or greater, capacitors for -2.7V VALID RS-232 LEVEL - ISL4243E IS ACTIVE proper operation. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS slightly reduces power consumption. INVALID switches low after invalid levels have persisted on When using minimum required capacitor values, make sure all of the receiver inputs for more than 30µs (see Figure 7). that capacitor values do not degrade excessively with INVALID switches back high 1µs after detecting a valid temperature. If in doubt, use capacitors with a larger nominal RS-232 level on a receiver input. INVALID operates in all value. The capacitor’s equivalent series resistance (ESR) modes (forced or automatic power-down, or forced on), so it usually rises at low temperatures and it influences the is also useful for systems employing manual power-down amount of ripple on V+ and V-. circuitry. When automatic power-down is utilized, INVALID = 0 Power Supply Decoupling indicates that the ISL4243E is in power-down mode. In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to RECINEPIVUETRS }IRNEVGAILOIND power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC. TRANSMITTER OUTPUTS Transmitter Outputs when Exiting Power-down INVALID VCC tINVL tINVH OUTPUT Figure 8 shows the response of two transmitter outputs 0 AUTOPWDN PWR UP when exiting power-down mode. As they activate, the two V+ transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each VCC transmitter is loaded with 3kin parallel with 2500pF. Note 0 that the transmitters enable only when the magnitude of the supplies exceed approximately 3V. V- FIGURE 7. AUTOMATIC POWER-DOWN AND INVALID TIMING DIAGRAMS Automatic Power-down (ISL4243E Only) Even greater power savings is available by using the ISL4243E which features an automatic power-down function. When no valid RS-232 voltages (see Figure 5) are sensed on any receiver input for 30µs, the charge pump and transmitters power-down, thereby reducing supply current to 10nA. Invalid receiver levels occur whenever the driving FN8037 Rev 7.00 Page 10 of 14 Jun 10, 2010

ISL4241E, ISL4243E 5V/DIV 5V/DIV. FORCEOFF T1 T1IN T1OUT 2V/DIV. T2 R1OUT VCC = +3.3V VCC = +3.3V C1 to C4 = 0.1µF C1 to C4 = 0.1 µF TIME (20µs/DIV) 5µs/DIV FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING FIGURE 10. LOOPBACK TEST AT 120kbps POWER-DOWN Operation Down to 2.7V 5V/DIV. The ISL4241E, ISL4243E transmitter outputs meet RS-562 levels (±3.7V), at the full data rate, with VCC as low as 2.7V. T1IN RS-562 levels typically ensure inter operability with RS-232 devices. High Data Rates T1OUT The ISL4241E, ISL4243E maintain the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 9 details a transmitter loopback test circuit, and Figure 10 illustrates the loopback test result at 120kbps. For R1OUT this test, all transmitters were simultaneously driving RS-232 VCC = +3.3V loads in parallel with 1000pF, at 120kbps. Figure 11 shows C1 - C4 = 0.µF the loopback results for a single transmitter driving 1000pF 2µs/DIV and an RS-232 load at 250kbps. The static transmitters were FIGURE 11. LOOPBACK TEST AT 250kbps also loaded with an RS-232 receiver. VCC Interconnection with 3V and 5V Logic + 0.1µF The ISL4241E, ISL4243E directly interface with 5V CMOS and TTL logic families. Nevertheless, with the ISL4241E, + C1+ VCC V+ ISL4243E at 3.3V, and the logic supply at 5V, AC, HC, and C1 +C3 CD4000 outputs can drive ISL4241E, ISL4243E inputs, but C1- ISL4241E, ISL4243E outputs do not reach the minimum VIH ISL4241E for these logic families. See Table 3 for more information. + C2+ ISL4243E V- C2 +C4 TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS C2- SUPPLY VOLTAGES TIN TOUT SYSTEM VCC POWER-SUPPLY SUPPLY ROUT RIN 1000pF VOLTAGE VOLTAGE (V) (V) COMPATIBILITY FORCEON 5k 3.3 3.3 Compatible with all CMOS families. VCC FORCEOFF or SHDN 5 5 Compatible with all TTL and FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT CMOS logic families. FN8037 Rev 7.00 Page 11 of 14 Jun 10, 2010

ISL4241E, ISL4243E TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS respect to all other pins. The RS-232 pins on “E” family SUPPLY VOLTAGES (Continued) devices can withstand HBM ESD events to 15kV. SYSTEM VCC IEC61000-4-2 Testing POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE The IEC61000 test method applies to finished equipment, (V) (V) COMPATIBILITY rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the 5 3.3 Compatible with ACT and HCT CMOS, and with TTL. ISL4241E, outside world (the RS-232 pins in this case), and the IC is ISL4243E outputs are tested in its typical application configuration (power applied) incompatible with AC, HC, and rather than testing each pin-to-pin combination. The lower CD4000 CMOS inputs. current limiting resistor coupled with the larger charge ±15kV ESD Protection storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this All pins on ISL4241E, ISL4243E devices include ESD device’s RS-232 pins allows the design of equipment protection structures, but the RS-232 pins (transmitter meeting level 4 criteria without the need for additional board outputs and receiver inputs) incorporate advanced level protection on the RS-232 port. structures which allow them to survive ESD events up to ±15kV. The RS-232 pins are particularly vulnerable to ESD AIR-GAP DISCHARGE TEST METHOD damage because they typically connect to an exposed port For this test method, a charged probe tip moves toward the on the exterior of the finished product. Simply touching the IC pin until the voltage arcs to it. The current waveform port pins, or connecting a cable, can cause an ESD event delivered to the IC pin depends on approach speed, that might destroy unprotected ICs. These new ESD humidity, temperature, etc., so it is difficult to obtain structures protect the device whether or not it is powered up, repeatable results. The “E” device RS-232 pins withstand protect without allowing any latchup mechanism to activate, 15kV air-gap discharges. and don’t interfere with RS-232 signals as large as ±25V. CONTACT DISCHARGE TEST METHOD Human Body Model (HBM) Testing During the contact discharge test, the probe contacts the As the name implies, this test method emulates the ESD tested pin before the probe tip is energized, thereby event delivered to an IC during human handling. The tester eliminating the variables associated with the air-gap delivers the charge through a 1.5k current limiting resistor, discharge. The result is a more repeatable and predictable making the test less severe than the IEC61000 test which test, but equipment limits prevent testing devices at voltages utilizes a 330 limiting resistor. The HBM method higher than 8kV. All “E” family devices survive 8kV contact determines an ICs ability to withstand the ESD transients discharges on the RS-232 pins. typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with Typical Performance Curves VCC = 3.3V, TA = +25°C 6 25 V) E ( VOUT+ G 4 A T 20 L VO 2 s) T 1 TRANSMITTER AT 250kbps V/ PU OTHER TRANSMITTERS AT 30kbps E ( UT 0 AT 15 O R R W -SLEW TTE -2 SLE +SLEW MI 10 S N -4 VOUT - A R T -6 5 0 1000 2000 3000 4000 5000 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) LOAD CAPACITANCE (pF) FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD FIGURE 13. SLEW RATE vs LOAD CAPACITANCE CAPACITANCE FN8037 Rev 7.00 Page 12 of 14 Jun 10, 2010

ISL4241E, ISL4243E Typical Performance Curves VCC = 3.3V, TA = +25°C (Continued) 45 3.5 NO LOAD ALL OUTPUTS STATIC 40 3.0 250kbps mA) 35 mA) 2.5 UPPLY CURRENT ( 223050 120kbps UPPLY CURRENT ( 112...050 S 20kbps S 15 0.5 10 0 0 1000 2000 3000 4000 5000 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 LOAD CAPACITANCE (pF) SUPPLY VOLTAGE (V) FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE WHEN TRANSMITTING DATA Die Characteristics SUBSTRATE AND QFN THERMAL PAD POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL4241E, ISL4243E: 464 PROCESS: Si Gate BiCMOS © Copyright Intersil Americas LLC 2002-2010. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8037 Rev 7.00 Page 13 of 14 Jun 10, 2010

ISL4241E, ISL4243E Package Outline Drawing L32.5x5B 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 11/07 4X 3.5 5.00 A 28X 0.50 6 B 25 32 PIN #1 INDEX AREA 6 PIN 1 24 1 INDEX AREA 0 5.0 3 .30 ± 0 . 15 17 8 (4X) 0.15 16 9 0.10MC AB + 0.07 32X 0.40 ± 0.10 4 32X 0.23 - 0.05 TOP VIEW BOTTOM VIEW SEE DETAIL "X" 0.10 C 0 . 90 ± 0.1 C BASE PLANE SEATING PLANE 0.08 C ( 4. 80 TYP ) ( 28X 0 . 5 ) SIDE VIEW ( 3. 30 ) (32X 0 . 23 ) C 0 . 2 REF 5 ( 32X 0 . 60) 0 . 00 MIN. 0 . 05 MAX. TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN8037 Rev 7.00 Page 14 of 14 Jun 10, 2010