DATASHEET ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, FN6543 ISL3285E Rev 4.00 July 27, 2015 The Intersil ISL3280E, ISL3281E, ISL3282E, ISL3283E, Features ISL3284E, ISL3285E are ±16.5kV IEC61000 ESD Protected, 3.0V to 5.5V powered, single receivers that meet both the • IEC61000 ESD protection on RS-485 inputs . . . . . . . ±16.5kV RS-485 and RS-422 standards for balanced communication. - Class 3 ESD level on all other pins. . . . . . . . . . . .>5kV HBM These receivers have very low bus currents (+125µA/-100µA), • Pb-free (RoHS compliant) so they present a true “1/8 unit load” to the RS-485 bus. This allows up to 256 receivers on the network without violating the • Wide supply range. . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V RS-485 specification’s 32 unit load maximum and without using • Specified for +125°C operation repeaters. • Logic supply pin (VL) eases operation in mixed supply Receiver inputs feature a “Full Fail-Safe” design, which ensures systems (ISL3282E, ISL3284E, ISL3285E only) a logic high Rx output if Rx inputs are floating, shorted, or • Full fail-safe (open, short, terminated/undriven) terminated but undriven. • True 1/8 unit load allows up to 256 devices on the bus The ISL3280E and ISL3284E feature an always enabled Rx; the ISL3281E and ISL3285E feature an active high Rx enable • High data rates. . . . . . . . . . . . . . . . . . . . . . . . . . up to 20Mbps pin and the ISL3282E and ISL3283E include an active low • Low quiescent supply current. . . . . . . . . . . . . . . 500µA (max) enable pin. All versions are offered in Industrial and Extended - Very low shutdown supply current. . . . . . . . . . 20µA (max) Industrial (-40°C to +125°C) temperature ranges. • -7V to +12V common mode input voltage range A 26% smaller footprint is available with the ISL3282E and • Tri-statable Rx available (active low or high EN input) ISL3285E TDFN package. These devices, plus the ISL3284E, also feature a logic supply pin (VL) that sets the VOH level of • 5V tolerant logic inputs when VCC ≤ 5V the RO output (and the switching points of the RE/RE input) to Applications be compatible with another supply voltage in mixed voltage systems. • Clock distribution For companion single RS-485 transmitters in micro packages, • High node count systems please see the ISL3293E datasheet. • Space constrained systems • Security camera networks • Building environmental control/lighting systems • Industrial/process control networks TABLE 1. SUMMARY OF FEATURES DATA RATE # DEVICES RX QUIESCENT ICC LOW POWER LEAD PART NUMBER FUNCTION (Mbps) ON BUS ENABLE? VL PIN? (µA) SHUTDOWN? COUNT ISL3280E 1 Rx 20 256 NO NO 350 NO 5-SOT ISL3281E 1 Rx 20 256 ACTIVE HIGH NO 350 YES 6-SOT ISL3282E 1 Rx 20 256 ACTIVE LOW YES 350 YES 8-TDFN ISL3283E 1 Rx 20 256 ACTIVE LOW NO 350 YES 6-SOT ISL3284E 1 Rx 20 256 NO YES 350 NO 6-SOT ISL3285E 1 Rx 20 256 ACTIVE HIGH YES 350 YES 8-TDFN (No longer available or supported) FN6543 Rev 4.00 Page 1 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Pin Configurations ISL3280E ISL3281E (5 LD SOT-23) (6 LD SOT-23) TOP VIEW TOP VIEW VCC 1 5 A VCC 1 6 A GND 2 R GND 2 R 5 RE RO 3 4 B RO 3 4 B ISL3282E ISL3283E (8 LD TDFN) (6 LD SOT-23) TOP VIEW TOP VIEW RO 1 8 B VCC 1 6 A GND 2 R 5 RE GND 2 7 RE R NC 3 6 VL RO 3 4 B VCC 4 5 A ISL3284E ISL3285E (6 LD SOT-23) (8 LD TDFN) TOP VIEW TOP VIEW GVRNCODC 123 R 654 AVBL GNRONNO CDLON231GER AVAILRABLE OR SU768PPOBRVLRETED VCC 4 5 A FN6543 Rev 4.00 Page 2 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Ordering Information PART NUMBER PART MARKING TEMP. RANGE PACKAGE PKG. (Notes1, 2, 3) (Note4) (°C) (RoHS Compliant) DWG. # ISL3280EFHZ-T 280F -40 to +125 5 Ld SOT-23 P5.064 ISL3280EIHZ-T 280I -40 to +85 5 Ld SOT-23 P5.064 ISL3281EFHZ-T 281F -40 to +125 6 Ld SOT-23 P6.064 ISL3281EIHZ-T 281I -40 to +85 6 Ld SOT-23 P6.064 ISL3282EFRTZ-T 82F -40 to +125 8 Ld TDFN L8.2x3A ISL3282EIRTZ-T 82I -40 to +85 8 Ld TDFN L8.2x3A ISL3283EFHZ-T 283F -40 to +125 6 Ld SOT-23 P6.064 ISL3283EIHZ-T 283I -40 to +85 6 Ld SOT-23 P6.064 ISL3284EFHZ-T 284F -40 to +125 6 Ld SOT-23 P6.064 ISL3284EIHZ-T 284I -40 to +85 6 Ld SOT-23 P6.064 ISL3285EFRTZ-T (No longer available or supported) 85F -40 to +125 8 Ld TDFN L8.2x3A ISL3285EIRTZ-T (No longer available or supported) 85I -40 to +85 8 Ld TDFN L8.2x3A NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Please refer to TB347 for details on reel specifications. 3. For Moisture Sensitivity Level (MSL), please see product information page for ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E. For more information on MSL, please see tech brief TB363. 4. SOT-23 “PART MARKING” is branded on the bottom side. FN6543 Rev 4.00 Page 3 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Truth Table RECEIVING INPUTS OUTPUT RE, RE A - B RO 1, 0 ≥ -0.05V 1 1, 0 ≤ -0.2V 0 1, 0 Inputs Open/Shorted 1 0, 1 X High-Z* NOTE: *Shutdown Mode, except for ISL3280E, ISL3284E Pin Descriptions PIN NAME FUNCTION RO Receiver output: If A - B  -50mV, RO is high; If A - B  -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted. RE, RE Receiver output enable. RO is enabled when RE/RE is high / low; RO is high impedance when RE/RE is low/high. If the Rx enable function is not used, connect RE directly to GND, or connect RE through a 1kΩ, or greater, resistor to VCC. RE/RE are internally pulled low/high. GND Ground connection. This is also the potential of the TDFN thermal pad. A ±16.5kV IEC61000 ESD protected RS-485, RS-422 level, noninverting receiver input. B ±16.5kV IEC61000 ESD protected RS-485, RS-422 level, inverting receiver input. VCC System power supply input (3.0V to 5.5V). On devices with a VL pin powered from a separate supply, power-up VCC first. VL Logic-level supply, which sets the VIL / VIH levels for the RE (ISL3282E only) and RE (ISL3285E only) pins and sets the VOH level of the RO output (ISL3282E, ISL3284E, ISL3285E only). If VL and VCC are different supplies, power-up this supply after VCC and keep VL ≤ VCC. NC No Connection. Typical Operating Circuits +3.3V TO 5V +3.3V + + 0.1µF 0.1µF 1 2 VCC VCC ISL3281E ISL329xE A 6 RT 6 Y 3 RO DI 1 R B 4 4 Z D 5 RE DE 3 GND GND 2 5 FIGURE 1. NETWORK WITH ENABLES FN6543 Rev 4.00 Page 4 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Typical Operating Circuits (Continued) +3.3V TO 5V +3.3V 1kΩ TO 3kΩ + + 0.1µF 0.1µF 1 2 3 VCC VCC ISL3280E ISL329xE DE A 5 RT 6 Y 3 RO DI 1 R B 4 4 Z D GND GND 2 5 FIGURE 2. NETWORK WITHOUT ENABLES 1.8V +3.3V TO 5V +3.3V 2.5V + + 0.1µF 0.1µF 6 4 8 1 VCC VL VCC VCC VL VCC ISL3282E ISL3298E LOGIC A 5 RT 6 Y LOGIC DEVICE 1 RO R B 8 7 Z D DI 3 DEVICE (µP, ASIC, 7 RE DE 2 (P, ASIC, UART) UART) GND GND NOTE: IF POWERED FROM SEPARATE SUPPLIES, 2 POWER-UP VCC BEFORE VL 4, 5 FIGURE 3. NETWORK WITH VL PIN FOR INTERFACE TO LOWER VOLTAGE LOGIC DEVICES FN6543 Rev 4.00 Page 5 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Absolute Maximum Ratings Thermal Information VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V Thermal Resistance (Typical) JA (°C/W) JC (°C/W) VL to GND (ISL3282E, ISL3284E, ISL3285E Only). . . -0.3V to (VCC +0.3V) 5 Ld SOT-23 Package (Note5) . . . . . . . . . . 190 N/A Input Voltages 6 Ld SOT-23 Package (Note5) . . . . . . . . . . 177 N/A RE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V 8 Ld TDFN Package (Notes6, 7). . . . . . . . . 65 8 Input/Output Voltages Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C A, B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C RO (Not ISL3282E, ISL3284E, ISL3285E). . . . . . . . -0.3V to (VCC +0.3V) Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 RO (ISL3282E, ISL3284E, ISL3285E) . . . . . . . . . . . . -0.3V to (VL +0.3V) Short-circuit Duration Operating Conditions RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table Temperature Range F Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C I Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 7. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Test Conditions: VCC = 3.0V to 5.5V; VL = VCC (ISL3282E, ISL3284E, ISL3285E only); Typicals are at TA=+25°C (Note12); Unless Otherwise Specified (Note8). TEMP MIN TYP MAX PARAMETER SYMBOL TEST CONDITIONS (°C) (Note11) (Note12) (Note11) UNIT DC CHARACTERISTICS Input High Voltage (RE, RE) VIH1 VL = VCC if ISL3282E, or VCC  3.6V Full 2 - - V (Notes9, 10) ISL3285E VIH2 VCC  5.5V Full 2.4 - - V VIH3 2.7V  VL < 3.0V ISL3282E and Full 1.7 - - V ISL3285E only VIH4 2.3V  VL < 2.7V Full 1.6 - - V VIH5 1.6V  VL < 2.3V Full 0.72*VL - - V VIH6 1.35V  VL < 1.6V 25 - 0.5*VL - V Input Low Voltage (RE, RE) VIL1 VL = VCC if ISL3282E or ISL3285E Full - - 0.7 V (Notes9, 10) VIL2 VL  2.7V ISL3282E and Full - - 0.7 V ISL3285E only VIL3 2.3V  VL < 2.7V Full - - 0.6 V VIL4 1.6V  VL < 2.3V Full - - 0.25*VL V VIL5 1.35V  VL < 1.6V 25 - 0.33*VL - V Logic Input Current (Note9) IIN1 RE = RE = 0V or VCC Full -15 ±9 15 µA Input Current (A, B) IIN2 VCC = 0V, 3.6V, or 5.5V VIN = 12V Full - 80 125 µA VIN = -7V Full -100 -50 - µA Receiver Differential Threshold VTH -7V  VCM  12V Full -200 -125 -50 mV Voltage Receiver Input Hysteresis VTH VCM = 0V 25 - 15 - mV Receiver Input Resistance RIN -7V  VCM  12V Full - 150 - kΩ Receiver Short-Circuit Current IOSR 0V  VO  VCC Full ±7 ±30 ±85 mA Receiver Output High Voltage VOH1 IO = -3.5mA, VID = -50mV (VL = VCC if ISL3282E, Full VCC - 0.4 - - V ISL3284E, ISL3285E) VOH2 IO = -1mA, VL  1.6V ISL3282E, Full VL - 0.4 - - V ISL3284E and VOH3 IO = -500µA, VL = 1.5V Full 1.2 - - V ISL3285E only VOH4 IO = -150µA, VL = 1.35V Full 1.15 - - V VOH5 IO = -100µA, VL  1.35V Full VL - 0.1 - - V FN6543 Rev 4.00 Page 6 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Electrical Specifications Test Conditions: VCC = 3.0V to 5.5V; VL = VCC (ISL3282E, ISL3284E, ISL3285E only); Typicals are at TA=+25°C (Note12); Unless Otherwise Specified (Note8). (Continued) TEMP MIN TYP MAX PARAMETER SYMBOL TEST CONDITIONS (°C) (Note11) (Note12) (Note11) UNIT Receiver Output Low Voltage VOL1 IO = 4mA, VID = -200mV, VL  2.2V if ISL3282E, Full - 0.2 0.4 V ISL3284E, ISL3285E VOL2 IO = 2mA, VL  1.5V ISL3282E, Full - 0.2 0.4 V ISL3284E and VOL3 IO = 1mA, VL  1.35V Full - 0.1 0.4 V ISL3285E only VOL4 IO = 500µA, VL  1.35V 25 - 0.1 - V Three-state (high impedance) IOZR 0V  VO  VCC Full -1 0.015 1 µA Receiver Output Current (Notes9, 10) SUPPLY CURRENT No-Load Supply Current ICC RE/RE = VCC/0V Full - 400 500 µA Shutdown Supply Current ISHDN RE/RE = 0V/VCC Full - - 20 µA (Note9) ESD PERFORMANCE RS-485 Pins (A, B) IEC61000-4-2, Air-Gap Discharge Method 25 - ±16.5 - kV IEC61000-4-2, Contact Discharge Method 25 - ±9 - kV Human Body Model, from bus pins to GND 25 - ±16.5 - kV All Pins HBM, per MIL-STD-883 Method 3015 25 - ±5 - kV MM 25 - ±250 - V RECEIVER SWITCHING CHARACTERISTICS Maximum Data Rate fMAX VID = ±2V, VCM = 0V (Figure4 and Table2) Full 20 30, 24 - Mbps (Note12) Receiver Input to Output Delay tPLH, tPHL VID = ±2V, VCM = 0V (Figure4) Full 20 36 60 ns VL  1.5V (Figure4) ISL3282E, 25 - 44 - ns ISL3284E and ISL3285E only Receiver Skew | tPLH - tPHL | tSK1 VCC = 3.3V ±10% (Figure4) VL = VCC if Full - 1 5.5 ns ISL3282E, tSK2 VCC = 5V ±10% (Figure4) Full - 2 7.5 ns ISL3284E, or ISL3285E tSK3 VL  1.8V (Figure4) ISL3282E, 25 - 2 - ns ISL3284E and tSK4 VL = 1.5V (Figure4) 25 - 4 - ns ISL3285E only Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, (Note12) Full - 240, 90 500 ns (Note9) SW= GND (Figure5) VL  1.5V (Note12) 25 - 250, 120 - ns Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, (Note12) Full - 240, 90 500 ns (Note9) SW= VCC (Figure5) VL  1.5V (Note12) 25 - 250, 120 - ns Receiver Disable from Output tHZ RL = 1kΩ, CL = 15pF, Full - 10 20 ns High (Note9) SW= GND (Figure5) VL  1.5V (Note12) 25 - 24, 20 - ns Receiver Disable from Output tLZ RL = 1kΩ, CL = 15pF, Full - 10 20 ns Low (Note9) SW= VCC (Figure5) VL  1.5V (Note12) 25 - 24, 20 - ns NOTES: 8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 9. Does not apply to the ISL3280E or ISL3284E. 10. If the Rx enable function isn’t needed, connect the enable pin to the appropriate supply, as described in the “Pin Descriptions” table on page4 11. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. 12. Typical values are at 3.3V, 5V. Parameters with a single entry in the “TYP” column apply to 3.3V and 5V. FN6543 Rev 4.00 Page 7 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Test Circuits and Waveforms RE VCC B +1V RE GND 0V 0V B 15pF RO A -1V A R tPLH tPHL SIGNAL VCC OR VL GENERATORS RO 50% 50% 0V FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS FIGURE 4. RECEIVER PROPAGATION DELAY AND DATA RATE RE OR RE 3V B 1kΩ VCC OR VL RE 1.5V 1.5V GND RO (INVERT FOR RE) A R 0V SIGNAL SW GND GENERATOR 15pF tZH tHZ OUTPUT HIGH VOH - 0.25VVOH RO 50% PARAMETER A SW 0V tHZ +1.5V GND tZL tLZ VCC OR VL tLZ -1.5V VCC OR VL RO 50% tZH +1.5V GND VOL + 0.25VVOL OUTPUT LOW tZL -1.5V VCC OR VL FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCEPT ISL3280E AND ISL3284E) Application Information Receiver Features These devices utilize a differential input receiver for maximum RS-485 and RS-422 are differential (balanced) data transmission noise immunity and common mode rejection. Input sensitivity is standards for use in long haul or noisy environments. RS-422 is a better than ±200mV, as required by the RS-422 and RS-485 subset of RS-485, so RS-485 transceivers are also RS-422 specifications. compliant. RS-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load Receiver input resistance of 96kΩ surpasses the RS-422 devices) receivers on each bus. RS-485 is a true multipoint specification of 4kΩ and is eight times the RS-485 “Unit Load standard, which allows up to 32 one unit load devices (any (UL)” requirement of 12kΩ minimum. Thus, these products are combination of drivers and receivers) on each bus. known as “one-eighth UL” transceivers and there can be up to 256 of these devices on a network while still complying with Another important advantage of RS-485 is the extended the RS-485 loading specification. Common Mode Range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from Receiver inputs function with common mode voltages as great +12V to -7V. RS-422 and RS-485 are intended for runs as long as +9V/-7V outside the power supplies (i.e., +12V and -7V), as 4000’, so the wide CMR is necessary to handle ground making them ideal for long networks where induced voltages potential differences, as well as voltages induced in the cable and ground potential differences are realistic concerns. by external fields. FN6543 Rev 4.00 Page 8 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E All the receivers include a “full fail-safe” function that Wide Supply Range guarantees a high level receiver output if the receiver inputs are The ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, unconnected (floating), shorted together, or connected to a ISL3285E are designed to operate with a wide range of terminated but undriven bus. Fail-safe with shorted inputs is supply voltages from 3.0V to 5.5V. These devices meet the achieved by setting the Rx upper switching point to -50mV, RS-422 and RS-485 specifications over this full range. thereby ensuring that the Rx sees 0V differential as a high input level. Logic Supply (V Pin, ISL3282E, ISL3284E, L All receivers easily support a 20Mbps data rate and all receiver ISL3285E Only) outputs (except on the ISL3280E and ISL3284E) are tri-statable via the active low RE input or by the active high RE Note: If powered from separate supplies, power-up VCC before input. powering up the VL supply and keep VL ≤ VCC. The ISL3282E, ISL3284E and ISL3285E include a VL pin that TABLE 2. VIH, VIL AND DATA RATE vs VL FOR VCC = 3.3V OR 5V powers the logic input (RE or RE) and/or the Rx output. These VL VIH VIL DATA RATE pins interface with “logic” devices such as UARTs, ASICs and (V) (V) (V) (Mbps) microcontrollers and today most of these devices use power supplies significantly lower than 3.3V. Thus, a 3.3V output level 1.35 0.55 0.5 11 from a 3.3V powered RS-485 IC might seriously overdrive and 1.6 0.7 0.6 16 damage the logic device input. Similarly, the logic device’s low 1.8 0.8 0.7 23 VOH might not exceed the VIH of a 3.3V or 5V powered RE input. Connecting the VL pin to the power supply of the logic 2.3 1 0.9 27 device (as shown in Figure6) limits the ISL3282E, ISL3284E, 2.7 1.1 1 30 ISL3285E’s Rx output VOH to VL (see Figures9 through 13) and reduces the RE/RE input switching point to a value 3.3 1.3 1.2 30 compatible with the logic device’s output levels. Tailoring the logic pin input switching point and output levels to the supply 5.5 (i.e., VCC) 2 1.8 24 voltage of the UART, ASIC, or microcontroller eliminates the need for a level shifter/translator between the two ICs. VL can be anywhere from VCC down to 1.35V, but the input VCC = +3.3V VCC = +2V switching points may not provide enough noise margin when VL<1.6V. Table2 indicates typical VIH, VIL and data rate values for various VL settings so the user can ascertain ESD whether or not a particular VL voltage meets his/her needs. RO VOH = 3.3V RXD DIODE The quiescent, RO unloaded, VL supply current (IL) is typically less than 60µA for VL ≤ 3.3V, as shown in Figure8. VIH  2V ESD Protection RE RXEN VOH  2V GND GND All pins on these devices include class 3 (>4kV) Human Body Model (HBM) ESD protection structures, but the RS-485 pins (receiver inputs) incorporate advanced structures allowing ISL3283E UART/PROCESSOR them to survive ESD events in excess of ±16.5kV HBM and ±16.5kV IEC61000. The RS-485 pins are particularly VCC = +3.3V TO 5V VCC = +2V vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can VL ESD cause an ESD event that might destroy unprotected ICs. RO VOH = 2V RXD DIODE These new ESD structures protect the device whether or not it is powered up and without degrading the RS-485 common mode range of -7V to +12V. This built-in ESD protection VIH = 1V eliminates the need for board level protection structures RE RXEN VOH  2V (e.g., transient suppression diodes) and the associated, GND GND undesirable capacitive load they present. ISL3282E UART/PROCESSOR FIGURE 6. USING VL PIN TO ADJUST LOGIC LEVELS FN6543 Rev 4.00 Page 9 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E IEC61000-4-2 Testing Data Rate, Cables and Terminations The IEC61000 test method applies to finished equipment, rather RS-485, RS-422 are intended for network lengths up to 4000’, than to an individual IC. Therefore, the pins most likely to suffer but the maximum system data rate decreases as the an ESD event are those that are exposed to the outside world (the transmission length increases. Networks operating at 20Mbps RS-485 pins in this case) and the IC is tested in its typical are limited to lengths less than 100’, while a 250kbps network application configuration (power applied) rather than testing that uses slew rate limited transmitters can operate at that data each pin-to-pin combination. The lower current limiting resistor rate over lengths of several thousand feet. coupled with the larger charge storage capacitor yields a test Twisted pair is the cable of choice for RS-485, RS-422 networks. that is much more severe than the HBM test. The extra ESD Twisted pair cables tend to pick up noise and other protection built into this device’s RS-485 pins allows the design electromagnetically induced voltages as common mode signals, of equipment meeting level 4 criteria without the need for which are effectively rejected by the differential receiver in these additional board level protection on the RS-485 port. ICs. AIR-GAP DISCHARGE TEST METHOD To minimize reflections, proper termination is imperative for high For this test method, a charged probe tip moves toward the IC pin data rate networks. Short networks using slew rate limited until the voltage arcs to it. The current waveform delivered to the transmitters need not be terminated, but terminations are IC pin depends on approach speed, humidity, temperature, etc., recommended unless power dissipation is an overriding concern. so it is difficult to obtain repeatable results. The A and B RS-485 In point-to-point, or point-to-multipoint (single driver on bus) pins withstand ±16.5kV air-gap discharges. networks, the main cable should be terminated in its CONTACT DISCHARGE TEST METHOD characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi receiver applications, stubs connecting During the contact discharge test, the probe contacts the tested receivers to the main cable should be kept as short as possible. pin before the probe tip is energized, thereby eliminating the Multipoint (multi driver) systems require that the main cable be variables associated with the air-gap discharge. The result is a terminated in its characteristic impedance at both ends. Stubs more repeatable and predictable test, but equipment limits connecting a transmitter or receiver to the main cable should be prevent testing devices at voltages higher than ±9kV. The kept as short as possible. ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E survive ±9kV contact discharges on the RS-485 pins. Low Power Shutdown Mode These BiCMOS receivers all use a fraction of the power required by their bipolar counterparts and the versions with output enable functions include a shutdown feature that reduces the already low quiescent ICC to a 20µA trickle. These versions enter shutdown whenever the receiver disables (RE=VCC or RE=GND). Typical Performance Curves CL = 15pF, TA = +25°C; unless otherwise specified. 0.50 250 VCC = 5V OR 3.3V 0.45 VCC = VL = 5V 0.40 200 VCC = VL = 3.3V 0.35 mA) 0.30 A)150 I (CC 00..2205 I (L100 VL = 5V, VCC = 5V ONLY 0.15 VL  1.8V 0.10 50 VL = 3.3V 0.05 RE = VCC, RE = 0V VL = 2.5V 0 0 -40 -15 10 35 60 85 110 125 0 1 2 3 4 5 6 7 7.5 TEMPERATURE (°C) RE VOLTAGE (V) FIGURE 7. SUPPLY CURRENT vs TEMPERATURE FIGURE 8. VL SUPPLY CURRENT vs ENABLE PIN VOLTAGE FN6543 Rev 4.00 Page 10 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Typical Performance Curves CL = 15pF, TA = +25°C; unless otherwise specified. (Continued) 60 30 A) VCC = VL = 5V VOL, +25°C A) VOL, +25°C NT (m 50 VOH, +25°C VOL, +85°C NT (m 25 VOH, +25°C VOL, +85°C E E VOL, +125°C RR 40 VOL, +125°C RR 20 U VOH, +125°C U C C T T U 30 U 15 TP VOH, +85°C TP VOH, +125°C VOH, +85°C U U O O R 20 R 10 E E V V CEI 10 CEI 5 E E R R VCC = 5V OR 3.3V, VL = 3.3V 0 0 0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.3 RECEIVER OUTPUT VOLTAGE (V) RECEIVER OUTPUT VOLTAGE (V) FIGURE 9. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT FIGURE 10. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE VOLTAGE 20 9 A) 18 VCC = 5V OR 3.3V, VL = 2.5V VOL, +25°C A) 8 VCC = 5V OR 3.3V, VL = 1.8V VOL, +25°C NT (m 16 VOL, +85°C NT (m 7 VOL, +85°C URRE 1124 VOH, +25°C VOL, +125°C URRE 6 VOL, +125°C UT C 10 UT C 5 R OUTP 68 VOH, +125°C VOH, +85°C R OUTP 34 VOH, +25°C VOH, +85°C EIVE 4 EIVE 2 VOH, +125°C C C RE 2 RE 1 0 0 0 0.5 1.0 1.5 2.0 2.5 0 0.5 1.0 1.5 1.8 RECEIVER OUTPUT VOLTAGE (V) RECEIVER OUTPUT VOLTAGE (V) FIGURE 11. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT FIGURE 12. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE VOLTAGE 5.0 55 VCC = 5V or 3.3V, VL = 1.5V VCC = 5V mA) 4.5 VOL, +85°C VOL, +25°C T ( 4.0 s) 50 REN 3.5 VOL, +125°C AY (n VL = 1.5V UR 3.0 EL 45 C D UT 2.5 ON VL = 1.8V OUTP 2.0 VOH, +25°C VOH, +85°C GATI 40 R 1.5 PA EIVE 1.0 VOH, +125°C PRO 35 VL = 2.5V C E R 0.5 0 30 0 0.2 0.4 0.6 0.8 1.0 1.2 1.41.5 -40 -15 10 35 60 85 110 125 RECEIVER OUTPUT VOLTAGE (V) TEMPERATURE (°C) FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT FIGURE 14. RECEIVER PROPAGATION DELAY vs TEMPERATURE VOLTAGE FN6543 Rev 4.00 Page 11 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Typical Performance Curves CL = 15pF, TA = +25°C; unless otherwise specified. (Continued) 5.0 55 |tPLH - tPHL| VCC = 5V VCC = 3.3V 4.5 4.0 VL = 1.5V s) 50 n 3.5 Y ( LA VL = 1.5V ns) 3.0 DE 45 W ( 2.5 ON SKE 2.0 VL = 2.5V GATI 40 VL = 1.8V VL = 1.8V PA 1.5 O VL = 2.5V R P 1.0 35 0.5 0 30 -40 -15 10 35 60 85 110 125 -40 -15 10 35 60 85 110 125 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 15. RECEIVER SKEW vs TEMPERATURE FIGURE 16. RECEIVER PROPAGATION DELAY vs TEMPERATURE 4.0 V) |tPLH - tPHL| VCC = 3.3V T ( VCC = 5V 3.5 PU 2.0 N R I 0 3.0 VE A - B EI-2.0 C 2.5 VL = 1.5V E s) R n KEW ( 2.0 T (V) 5.0 VL = 5V S 1.5 VL = 1.8V PU 4.0 T OU 3.0 VL = 2.5V 1.0 VL = 2.5V ER 2.0 0.5 EIV 1.0 VL = 1.5V C 0 VL = 1.8V RE 0 -40 -15 10 35 60 85 110 125 TEMPERATURE (°C) TIME (20ns/DIV) FIGURE 17. RECEIVER SKEW vs TEMPERATURE FIGURE 18. RECEIVER WAVEFORMS V) Die Characteristics T ( VCC = 3.3V PU 2.0 N SUBSTRATE AND TDFN THERMAL PAD POTENTIAL R I 0 VE A - B (POWERED UP): EI-2.0 C GND E R TRANSISTOR COUNT: UT (V) 34..00 VL = 3.3V 140 P UT 2.0 VL = 2.5V PROCESS: O ER 1.0 VL = 1.5V Si Gate BiCMOS V CEI 0 E R TIME (20ns/DIV) FIGURE 19. RECEIVER WAVEFORMS FN6543 Rev 4.00 Page 12 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE July 27, 2015 FN6543.4 - Added “No longer available or supported” statement to ISL3285E in Table1 on page 1, Ordering Information table on page3 and ISL3285E pin configuration on page2. Replaced L8.2x3A package outline drawing with the newest revision. Changes from revision 1 to revision 2: Tiebar Note updated From: Tiebar shown (if present) is a non-functional feature. To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends). December 4, 2014 FN6543.3 -Updated datasheet to Intersil new standard. -Added text in several places to clarify that VL can be connected to Vcc. -Ordering information table on page 3: Added MSL note. -Electrical spec table on page6 under "Logic Input Current": Updated note reference. -Electrical spec table on page7 under "Shutdown Supply Current": Updated note reference. -Electrical spec table on page7 under "RECEIVER SWITCHING CHARACTERISTICS : Updated all the note references. -Updated POD P5.064 to new format: Moved dimensions from table onto drawing and added land pattern. -Updated POD P6.064 to new format: Same dimensions, added land pattern and moved dimensions from table onto drawing. - Updated POD L8.2X3A to new format: Added recommended land pattern. -Added revision history. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support © Copyright Intersil Americas LLC 2007-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6543 Rev 4.00 Page 13 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Package Outline Drawing P5.064 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 3, 4/11 3.00 3 8° 0° 2.80 0.22 (1.90) 0.08 5 5 4 3.00 1.70 2.60 1.50 3 2 (0.95) 0.50 SEE DETAIL X 0.30 0.20 (0.008)M C TOP VIEW END VIEW 0.25 0.10 0.10 MIN 1.30 1.45 SEATING 0.90 0.90 PLANE GAUGE PLANE C SEATING 4 PLANE 0.55 C 0.35 8° (0.25) 0.15 0° 0.10 (0.004) C (0.60) 0.00 SIDE VIEW DETAIL "X" 5x (0.60) 5x (1.2) 5 4 NOTES: (2.4) 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 3 3. Package length and width are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength measured at reference to gauge plane. 5. Lead thickness applies to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 6. Controlling dimension: MILLIMETER. (2x 0.95) Dimensions in ( ) for reference only. (1.90) TYPICAL RECOMMENDED LAND PATTERN FN6543 Rev 4.00 Page 14 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Package Outline Drawing P6.064 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 4, 2/10 1.90 0-8° 0.95 0.08-0.22 D A 6 5 4 1.60 +0.15/-0.10 2.80 3 3 PIN 1 (0.60) INDEX AREA 1 2 3 0.20 C 2x B 0.40 ±0.10 3 SEE DETAIL X 0.20 M C A-B D END VIEW TOP VIEW 10° TYP (2 PLCS) 3 2.90 ±0.10 (0.25) 1.45 MAX 1.15 +0.15/-0.25 C GAUGE PLANE 0.10 C SEATING PLANE 0.00-0.15 0.45±0.1 4 SIDE VIEW DETAIL "X" (0.95) (0.60) (1.20) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. (2.40) 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. Package conforms to JEDEC MO-178AB. TYPICAL RECOMMENDED LAND PATTERN FN6543 Rev 4.00 Page 15 of 16 July 27, 2015

ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E Package Outline Drawing L8.2x3A 8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE WITH E-PAD Rev 2, 05/15 6 0.25 2.00 A PIN #1 INDEX AREA B 0.50 5 1 0. INDEPXI6N A 1REA 3.00 80 +0.1/ - 2.20 1. (4X) 0.15 (8x0.40) 1.65 +0.1/ -0.15 TOP VIEW BOTTOM VIEW (8x0.25) PACKAGE (6x0.50) OUTLINE SEE DETAIL "X" 5 7 0. C BASE PLANE SEATING PLANE 0.05 SIDE VIEW 0.08C 0 0 0 8 3. 1. (8x0.40) C 0.20 REF 5 1.65 (8x0.20) 0.05 2.00 TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.20mm and 0.32mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends). 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 indentifier may be either a mold or mark feature. FN6543 Rev 4.00 Page 16 of 16 July 27, 2015