DATASHEET ISL28130, ISL28230, ISL28430 FN7623 Single, Dual, and Quad Micropower, Low Drift, RRIO Operational Amplifiers Rev 7.00 February 13, 2014 The ISL28130, ISL28230 and ISL28430 are single, dual and Features quad micropower, low offset drift operational amplifiers that are optimized for single and dual supply operation from 1.8V • Low input offset voltage . . . . . . . . . . . . . . . . . . . . . 40µV, Max. to 5.5V and ±0.9V to ±2.75V. Their low supply current of 20µA • Low offset drift. . . . . . . . . . . . . . . . . . . . . . . . .150nV/°C, Max. and rail-to-rail input/output enable the ISL28130, ISL28230, • Input bias current. . . . . . . . . . . . . . . . . . . . . . . . . .250pA, Max. and ISL28430 to be an excellent general-purpose op amp for a range of applications. The ISL28130, ISL28230 and ISL28430 • Quiescent current (per amplifier). . . . . . . . . . . . . . .20µA, Typ. are ideal for handheld devices that operate off 2AA or single • Single supply range . . . . . . . . . . . . . . . . . . . . . .+1.8V to +5.5V Li-ion batteries. • Dual supply range . . . . . . . . . . . . . . . . . . . . . .±0.9V to ±2.75V The ISL28130 is available in industry standard pinouts for 5 Ld • Low noise (0.01Hz to 10Hz) . . . . . . . . . . . . . . . .1.1µVP-P, Typ. SOT-23, 5 Ld SC70 and 8 Ld SOIC packages. The ISL28230 is available in industry standard pinouts for 8LdMSOP, 8Ld • Rail-to-rail inputs and output SOIC and 8 Ld DFN packages. The ISL28430 is available in Applications 14Ld TSSOP and 14 Ld SOIC packages. Commercial devices operate over the temperature range of 0°C to 70°C. Full • Bi-directional current sense temperature range devices operate over the temperature • Temperature measurement range of -40°C to 125°C. • Medical equipment • Electronic weigh scales • Precision/strain gauge sensor • Precision regulation • Low Ohmic current sense • High gain analog front ends I-SENSE+ V+ 400 +1.8V TO +5.5V VREF A) 300 499k p T ( 4.99k N E + V+ R 200 VSENSE UR VS = ±2.5V 0.1 - V- OUT S C A 100 VS = ±0.9V 4.99k 499k BI T U P N 0 I GND -100 I-SENSE- -50 -25 0 25 50 75 100 125 BI-DIRECTIONAL CURRENT SENSE AMPLIFIER TEMPERATURE (°C) FIGURE 1. TYPICAL APPLICATION DIAGRAM FIGURE 2. IB vs TEMPERATURE FN7623 Rev 7.00 Page 1 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Ordering Information PART NUMBER PART TEMP RANGE TEMPERATURE PACKAGE PKG. (Notes 3, 4) MARKING (°C) GRADE (Pb-Free) DWG. # ISL28130CHZ-T7 (Note 2) BDPA (Note 5) 0 to +70 Commercial 5 Ld SOT-23 P5.064A ISL28130CHZ-T7A (Note 2) BDPA (Note 5) 0 to +70 Commercial 5 Ld SOT-23 P5.064A ISL28130FHZ-T7 (Note 2) BEFA (Note 5) -40 to +125 Full 5 Ld SOT-23 P5.064A ISL28130FHZ-T7A (Note 2) BEFA (Note 5) -40 to +125 Full 5 Ld SOT-23 P5.064A ISL28130CEZ-T7 (Note 2) BLA (Note 5) 0 to +70 Commercial 5 Ld SC-70 P5.049 ISL28130CEZ-T7A (Note 2) BLA (Note 5) 0 to +70 Commercial 5 Ld SC-70 P5.049 ISL28130FEZ-T7 (Note 2) BNA (Note 5) -40 to +125 Full 5 Ld SC-70 P5.049 ISL28130FEZ-T7A (Note 2) BNA (Note 5) -40 to +125 Full 5 Ld SC-70 P5.049 ISL28230CUZ (Note 1) 8230Z 0 to +70 Commercial 8 Ld MSOP M8.118A ISL28230FUZ (Note 1) 8230F -40 to +125 Full 8 Ld MSOP M8.118A ISL28230CBZ (Note 1) 28230 CBZ 0 to +70 Commercial 8 Ld SOIC M8.15E ISL28230FBZ (Note 1) 28230 FBZ -40 to +125 Full 8 Ld SOIC M8.15E ISL28230CRZ (Note 1) 230Z 0 to +70 Commercial 8 Ld 3mmx3mm DFN L8.3x3J ISL28230FRZ (Note 1) 230F -40 to +125 Full 8 Ld 3mmx3mm DFN L8.3x3J ISL28430CBZ (Note 1) 28430 CBZ 0 to +70 Commercial 14 Ld SOIC MDP0027 ISL28430FBZ (Note 1) 28430 FBZ -40 to +125 Full 14 Ld SOIC MDP0027 ISL28430CVZ (Note 1) 28430 CVZ 0 to +70 Commercial 14 Ld TSSOP MDP0044 ISL28430FVZ (Note 1) 28430 FVZ -40 to +125 Full 14 Ld TSSOP MDP0044 NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), please see device information page for ISL28130, ISL28230, ISL28430. For more information on MSL please see Tech Brief TB363. 5. The part marking is located on the bottom of the part. FN7623 Rev 7.00 Page 2 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Pin Configurations ISL28130 ISL28130 (5 LD SOT-23) (8 LD SOIC) TOP VIEW TOP VIEW OUT 1 5 V+ NC 1 8 NC V- 2 IN- 2 7 V+ + - - + IN+ 3 4 IN- IN+ 3 6 OUT V- 4 5 NC ISL28130 ISL28230 (5 LD SC-70) (8 LD MSOP, SOIC) TOP VIEW TOP VIEW IN+ 1 5 V+ OUT_A 1 8 V+ + V- 2 - IN-_A 2 - + 7 OUT_B IN- 3 4 OUT IN+_A 3 + - 6 IN-_B V- 4 5 IN+_B ISL28230 ISL28430 (8 LD DFN) (14 LD TSSOP, SOIC) TOP VIEW TOP VIEW OUT_A 1 14 OUT_D OUT_A 1 8 V+ IN-_A 2 7 OUT_B IN-_A 2 - + + - 13 IN-_D PAD IN+_A 3 6 IN-_B IN+_A 3 12 IN+_D V- 4 5 IN+_B V+ 4 11 V- IN+_B 5 10 IN+_C IN-_B 6 - + + - 9 IN-_C OUT_B 7 8 OUT_C FN7623 Rev 7.00 Page 3 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Pin Descriptions ISL28230 ISL28430 ISL28130 ISL28130 ISL28130 (8 Ld MSOP, (14 Ld PIN (5 Ld SOT-23) (8 Ld SOIC) (5 LD SC-70) SOIC, DFN) TSSOP, SOIC) NAME FUNCTION EQUIVALENT CIRCUIT 3 3 1 IN+ Non-inverting input 3 3 IN+_A V+ 5 5 IN+_B - 10 IN+_C - IN- - 12 IN+_D + IN+ V- Circuit 1 2 4 2 4 11 V- Negative supply 4 2 3 IN- Inverting input (See “Circuit 1”) 2 2 IN-_A 6 6 IN-_B - 9 IN-_C - 13 IN-_D 1 6 4 OUT Output V+ 1 1 OUT_A 7 7 OUT_B - 8 OUT_C OUT - 14 OUT_D V- Circuit 2 5 7 5 8 4 V+ Positive supply - 1, 5, 8 - - - NC Not Connected – This pin is not electrically connected internally. - - - PAD - Paddle Thermal Pad. Connect to most negative supply. DFN packages only. FN7623 Rev 7.00 Page 4 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Absolute Maximum Ratings Thermal Information Max Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V Thermal Resistance (Typical) JA (°C/W) JC (°C/W) Max Voltage VIN to GND . . . . . . . . . . . . . . . . . . . .(V- - 0.3V) to (V+ + 0.3V)V 5 Ld SOT-23 (Notes 6, 8) . . . . . . . . . . . . . . . 225 110 Max Input Differential Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V 5 Ld SC70 (Notes 6, 8). . . . . . . . . . . . . . . . . 206 146 Max Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA 8 Ld SOIC (ISL28130) (Notes 6, 8). . . . . . . 135 95 Max Voltage VOUT to GND (10s). . . . . . . . . . . . . .(V- - 0.5V) to (V+ + 0.5V)V 8 Ld MSOP (Notes 6, 8). . . . . . . . . . . . . . . . 180 65 ESD Tolerance (ISL28130) 8 Ld SOIC (ISL28230) (Notes 6, 8). . . . . . . 125 90 Human Body Model (Tested at JESD22-A114F). . . . . . . . . . . . . . .3000V 8 Ld DFN (Notes 7, 9). . . . . . . . . . . . . . . . . . 53 12 Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . .200V 14 Ld TSSOP (Notes 6, 8) . . . . . . . . . . . . . . 110 40 Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . .1500V 14 Ld SOIC (Notes 6, 8). . . . . . . . . . . . . . . . 75 47 ESD Tolerance (ISL28230, ISL28430) Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C Human Body Model (Tested at JESD22-A114F). . . . . . . . . . . . . . .4000V Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . .400V http://www.intersil.com/pbfree/Pb-FreeReflow.asp Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . .2000V Latch-Up (Passed Per JESD78B). . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C Operating Conditions Temperature Range Full Grade Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C Commercial Grade Devices. . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 6. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 7. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 8. For JC, the “case temp” location is taken at the package top center. 9. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, TA = +25°C, RL = 10kΩ, unless otherwise specified. Boldface limits apply over the entire operating temperature range. MIN MAX PARAMETER DESCRIPTION CONDITIONS (Note 10) TYP (Note 10) UNIT DC SPECIFICATIONS VOS Input Offset Voltage Vs = 1.8V to 5.5V -40 ±5 40 µV Vs = 1.8 to 5.5V; -46.8 46.8 µV T = 0°C to +70°C Vs = 1.8V to 5.5V; -55 55 µV T = -40°C to +125°C TCVOS Input Offset Voltage Temperature Coefficient -150 20 150 nV/°C IOS Input Offset Current -60 pA TCIOS Input Offset Current Temperature Coefficient 0.11 pA/°C IB Input Bias Current T = 0°C to +70°C -250 250 pA T = -40°C to +125°C -700 700 pA Common Mode Input Guaranteed by CMRR -0.1 5.1 V Voltage Range CMRR Common Mode Rejection Ratio VCM = -0.1V to 5.1V 110 125 dB 105 dB PSRR Power Supply Rejection Ratio Vs = 2.0V to 5.5V 105 138 dB 105 dB VOH Output Voltage Swing, High 4.950 4.981 V VOL Output Voltage Swing, Low 18 50 mV FN7623 Rev 7.00 Page 5 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, TA = +25°C, RL = 10kΩ, unless otherwise specified. Boldface limits apply over the entire operating temperature range. (Continued) MIN MAX PARAMETER DESCRIPTION CONDITIONS (Note 10) TYP (Note 10) UNIT AOL Open Loop Gain RL = 1MΩ 150 dB V+ Supply Voltage Guaranteed by VOS 1.8 5.5 V IS Supply Current, Per Amplifier RL = OPEN 20 25 µA 35 µA ISC+ Output Source Short Circuit Current RL = Short V- 15 mA ISC- Output Sink Short Circuit Current RL = Short V+ -15 mA AC SPECIFICATIONS GBWP Gain Bandwidth Product AV = 100, RF = 100kΩRG=1kΩ, 400 kHz RL = 10kΩto VCM eN VP-P Peak-to-Peak Input Noise Voltage f = 0.01Hz to 10Hz 1.1 µVP-P eN Input Noise Voltage Density f = 1kHz 65 nV/(Hz) iN Input Noise Current Density f = 1kHz 72 fA/(Hz) f = 10Hz 80 fA/(Hz) Cin Differential Input Capacitance f = 1MHz 1.6 pF Common Mode Input Capacitance 1.12 pF TRANSIENT RESPONSE SR Positive Slew Rate VOUT = 1V to 4V, RL = 10kΩ 0.2 V/µs Negative Slew Rate 0.1 V/µs tr, tf, Small Signal Rise Time, tr 10% to 90% AV = +1, VOUT = 0.1VP-P RF= 0Ω, 1.1 µs RL = 10kΩ,CL=1.2pF Fall Time, tf 10% to 90% 1.1 µs tr, tf Large Signal Rise Time, tr 10% to 90% AV = +1, VOUT = 2VP-P RF=0Ω, 20 µs RL= 10kΩ, CL=1.2pF Fall Time, tf 10% to 90% 30 µs ts Settling Time to 0.1%, 2VP-P Step AV = +1, RF = 0Ω,RL=10kΩ, 35 µs CL = 1.2pF trecover Output Overload Recovery Time, Recovery to AV = +2, RF = 10kΩ, RL=Open 10.5 µs 90% of Output Saturation CL = 3.7pF NOTE: 10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN7623 Rev 7.00 Page 6 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 nTypical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified. 400 400 A) 300 A) 300 NT (p NT (p RE 200 RE 200 UR VS = ±2.5V UR VS = ±2.5V C C BIAS 100 VS = ±0.9V BIAS 100 VS = ±0.9V UT UT P P IN 0 IN 0 -100 -100 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 3. IB+ vs TEMPERATURE FIGURE 4. IB- vs TEMPERATURE 40 40 PER AMPLIFIER PER AMPLIFIER 35 35 A) A) NT (µ 30 NT (µ 30 E E R R UR 25 UR 25 C C PLY 20 PLY 20 P P U U S 15 S 15 10 10 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 5. SUPPLY CURRENT vs TEMPERATURE, Vs = ±0.9V FIGURE 6. SUPPLY CURRENT vs TEMPERATURE, Vs = ±2.5V 21 200 A) 20 ASE (°) 150 PHASE T (µ PH 100 EN 19 B)/ CURR AIN (d 50 LY 18 P G GAIN P O 0 P O SU 17 N L RL = 10M VIN = 0V PE -50 CL = 100pF RL = OPEN O SIMULATION 16 -100 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M SUPPLY VOLTAGE (V) FREQUENCY (Hz) FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 8. FREQUENCY RESPONSE vs OPEN LOOP GAIN, RL=10MΩ FN7623 Rev 7.00 Page 7 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified. 1 1 0 RL = 100k 0 RL = 100k B) -1 B) -1 RL = 1k GAIN (d --32 RL = 1k RL = 10k RL = OPEN GAIN (d --32 RL = 10k RL = OPEN ZED -4 RL = 49.9k ZED -4 RL = 49.9k LI -5 LI -5 A A RM -6 VS = ±0.9V RM -6 VS = ±2.5V NO -7 ACVL == +3.17pF NO -7 ACVL == +3.17pF -8 VOUT = 10mVP-P -8 VOUT = 10mVP-P -9 -9 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. GAIN vs FREQUENCY vs RL, VS = ±0.9V FIGURE 10. GAIN vs FREQUENCY vs RL, VS = ±2.5V 10 1 9 0 78 RF = RG = 1k N (dB) --21 VOUT = 1V 6 AI -3 dB) 5 RF = RG = 10k ED G -4 VOUT = 500mV GAIN ( 34 VS = ±2.5V RF = RG = 100k RMALIZ --65 VOUT = 250mV 2 RCLL == 130.70pkF NO -7 VRSL == ±O2P.5EVN VOUT = 100mV 1 AVVO U=T + =2 10mVP-P -8 ACVL == 13.7pF VOUT = 10mV 0 -9 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 11. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES FIGURE 12. GAIN vs FREQUENCY vs VOUT RF/RG 70 1 60 AV = 1000 RG = 100, RF = 100k 0 -1 50 B) B) 40 AV = 100 RG = 1k, RF = 100k GAIN (d --32 VS = ±0.9V GAIN (d 123000 AV = 10 RG = 10k, RF = 100k VVCRO+LL U===T 513 =V0.7 01pk0FmVP-P ORMALIZED ---654 RL = 100k VVSS == ±±21..755VV 0 AV = 1 N --87 ACVL == +31.7pF RG = OPEN, RF = 0 VOUT = 10mVP-P -10 -9 10 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 13. FREQUENCY RESPONSE vs CLOSED LOOP GAIN FIGURE 14. GAIN vs FREQUENCY vs SUPPLY VOLTAGE FN7623 Rev 7.00 Page 8 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified. 8 5.0 6 CL = 824pF 4.5 B) 4 CL = 474pF 4.0 N (d 2 CL = 224pF 3.5 AI V) 3.0 RMALIZED G --420 CL C=L 1 =0 45p1FpF SIGNAL ( 122...505 RCLL == 130.70pkF NO --86 VRAVSL === +±1120.05kV CL = 3.7pF 01..50 AVVO U=T 1 = 4VP-P -10 VOUT = 10mVP-P 0 100 1k 10k 100k 1M 10M 0 50 100 150 200 250 300 350 400 FREQUENCY (Hz) TIME (µs) FIGURE 15. GAIN vs FREQUENCY vs CL FIGURE 16. LARGE SIGNAL STEP RESPONSE (4V) 1.2 0.14 0.12 1.0 0.10 0.8 L (V) L (V) 0.08 A 0.6 A N N G G 0.06 SI SI 0.4 RL = 100k RL = 100k 0.04 CL = 3.7pF CL = 3.7pF 0.2 AV = 1 AV = 1 VOUT = 1VP-P 0.02 VOUT = 100mVP-P 0 0 0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 35 40 TIME (µs) TIME (µs) FIGURE 17. LARGE SIGNAL STEP RESPONSE (1V) FIGURE 18. SMALL SIGNAL STEP RESPONSE (100mV) 5.000 40 VS = 5V VS = 5V RL = 10kΩ RL = 10kΩ 4.995 35 V) 4.990 V) 30 (OH (mL V 4.985 VO 25 4.980 20 4.975 15 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 19. VOH vs TEMPERATURE FIGURE 20. VOL vs TEMPERATURE FN7623 Rev 7.00 Page 9 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified. -20 -20 Vs = ±0.9V Vs = ±2.5V -40 RCLL == O3.P7pEFN -40 RCLL == O3.P7pEFN AV = 1 AV = 1 dB) -60 VOUT = 1VP-P dB) -60 VOUT = 1VP-P K ( K ( L L TA -80 TA -80 S S S S O O R -100 R -100 C C -120 -120 -140 -140 1k 10k 100k 1M 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 21. CROSSTALK vs FREQUENCY, VS = ±0.9V FIGURE 22. CROSSTALK vs FREQUENCY, VS = ±2.5V FN7623 Rev 7.00 Page 10 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Applications Information Layout Guidelines for High Impedance Inputs To achieve maximum performance from the high input impedance Functional Description and low offset voltage of the ISL28130, ISL28230 and ISL28430 The ISL28130, ISL28230 and ISL28430 are low offset and low amplifiers, care should be taken in the circuit board layout. The PC drift operational amplifiers with a very high open loop gain board surface must remain clean and free of moisture to avoid (150dB) and rail-to-rail input/output. They are designed to leakage currents between adjacent traces. Surface coating of the operate on a single supply range of 1.8V to 5.5V or a dual supply circuit board reduces surface moisture and provides a humidity range of ±0.9V to ±2.75V while consuming only 20µA of supply barrier, reducing parasitic resistance on the board. current per channel. The ISL28130, ISL28230 and ISL28430 have a 400kHz gain-bandwidth. High Gain, Precision DC-Coupled Amplifier The high open loop gain, low offset voltage, high bandwidth and The circuit in Figure 24 implements a single-stage DC-coupled low 1/f noise make the ISL28130, ISL28230 and ISL28430 amplifier with an input DC sensitivity of under 100nV that is only ideal for precision applications. possible using a low VOS amplifier with high open loop gain. High gain DC amplifiers operating from low voltage supplies are not Rail-to-rail Input and Output (RRIO) practical using typical low offset precision op amps. For example, The RRIO CMOS amplifier uses parallel input PMOS and NMOS consider a typical precision amplifier in a gain of 10kV/V. A low that enable the inputs to swing 100mV beyond either supply rail. offset op amp with ±100µV VOS and 0.5µV/°C offset drift yields The inverting and non-inverting inputs do not have back-to-back a DC error of >1V, with an additional 5mV/°C of input clamp diodes and are capable of maintaining high input temperature-dependent error. This amount of error makes it impedance at high differential input voltages. This is effective in difficult to resolve DC input voltage changes in the mV range. eliminating output distortion caused by high slew rate input signals. The ±40µV max VOS and 150nV/°C temperature drift of the ISL28130, ISL28230, and ISL28430 produce a The output stage uses common source connected PMOS and temperature-stable maximum DC output error of only ±400mV, NMOS devices to achieve rail-to-rail output drive capability with with a maximum output temperature drift of 1.5mV/°C. The 15mA current limit and the capability to swing to within 50mV of additional benefit of a very low 1/f noise corner frequency and either rail while driving a 10kΩ load. some feedback filtering allows DC voltages and voltage fluctuations well below 10µV to be easily detected with a simple, IN+ and IN- Protection single-stage amplifier. All input terminals have internal ESD protection diodes to both CF positive and negative supply rails, limiting the input voltage to 0.018µF within one diode beyond the supply rails. For applications in which 1MΩ either input is expected to exceed the rails by 0.5V, an external series resistor must be used to ensure the input currents never +2.5V exceed 20mA (see Figure 23). - 100Ω VOUT - VIN + RL RIN VOUT 1MΩ 100Ω VIN + RL -2.5V ACL = 10kV/V FIGURE 23. INPUT CURRENT LIMITING FIGURE 24. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER © Copyright Intersil Americas LLC 2010-2014. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7623 Rev 7.00 Page 11 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE February 13, 2014 FN7623.7 Ordering information table on page2: Added part number ISL28230FRZ - Absolute Maximum Ratings table on page5: changed Max Voltage VOUT to GND (10s) : from ±3.0V to: (V- - 0.5V) to (V+ + 0.5V)V.. November 22, 2013 FN7623.6 Removed “Coming Soon” from ISL28430FBZ in “Ordering Information” on page2. November 8, 2012 FN7623.5 Removed “Coming Soon” from ISL28130FHZ-T7, ISL28130FEZ-T7, ISL28130CBZ, ISL28130FBZ, ISL28230FUZ, ISL28230FRZ, ISL28430FVZ, ISL28230FRZ, ISL28130CBZ and ISL28130FBZ in “Ordering Information” on page2. February 10, 2012 FN7623.4 Removed “Coming Soon” from ISL28230FBZ in “Ordering Information” on page2. June 13, 2011 FN7623.3 • Changed minimum operating supply voltage from +1.65V to +1.8V throughout datasheet. Modified Electrical Specifications table, beginning on page5, for all specs related at +1.65V to +1.8V, and all other text references accordingly. • On page1, paragraph 2, last sentence: changed from “All devices operate over the temperature range of - 40°C to +125°C.” to “Commercial temp range devices operate over the temperature range of 0°C to 70°C. Full temp range devices operate over the temperature range of -40°C to 125°C.” • On page2, Ordering Information: added “Coming Soon” to all devices with -40°C to 125°C temp range and to ISL28130CBZ at 0°C to +70°C temp range. March 1, 2011 FN7623.2 -Ordering Information Table: Removed all 'Coming Soon' under part numbers (except for ISL28130FBZ and ISL28230FRZ), added part markings for all 125°C grade parts. Added new data column called 'TEMPERATURE GRADE' to distinguish between 'Commercial' and 'Full' temp grades. - Electrical Specifications Table: added new text to common conditions: “Boldface limits apply over the entire operating temperature range”. This note allows bold face limits to apply both to commercial and full grade temp devices. - Added over temperature 0°C to 70°C spec for Vos in addition to -40°C to 125°C Vos spec. Original Vos spec of 46.8µV for -40°C to 125°C is a typo based on a TCVos of 150nV/C. -40°C to 125°C limit corrected as 55µV over temp. December 7, 2010 FN7623.1 Corrected Thermals for DFN package in “Tja from 125 to 53, “Tjc from 90 to 12” December 3, 2010 Removed Part Markings from Full temp grade parts and changed to TBD until availability is validated. December 2, 2010 -Updated front page text to add DFN packaging and extended temp range -40°C to +125°C -Removed previous Ib vs Temp plot and added new -40°C to +125°C Ib vs Temp plot on front page. -Updated ordering information table by adding a full temp range option to all parts and temp range column. Also added in DFN part to ordering table. All full temp parts are stamped Coming Soon. -Added DFN package to Pin Configurations table. -Added -40°C to +125°C temp range under Operating Conditions page 5. -Added the testing standards performance information to the ESD ratings in Abs Max Table -Added new Input Bias Current Ib spec of 700pA MIN/MAX in Electrical Spec table for -40°C to +125°C temp range -Revised Note 10 for Electrical Spec table as: “Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.” -Updated all curves in the datasheet with 0°C to +70°C temp range to -40°C to +125°C temp range. -Added DFN package L8.3x3J outline drawing to the end of datasheet. October 19, 2010 On page6 changed “Supply Current, Per Amplifier” from a typical of 18µA to 20µA to comply with front page. August 17, 2010 FN7623.0 Initial Release About Intersil Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at http://www.intersil.com/en/support/qualandreliability.html#reliability FN7623 Rev 7.00 Page 12 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Small Outline Transistor Plastic Packages (SC70-5) P5.049 D VIEW C 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE e1 INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES 5 4 A 0.031 0.043 0.80 1.10 - E CL A1 0.000 0.004 0.00 0.10 - 1 2 3 CL E1 A2 0.031 0.039 0.80 1.00 - b 0.006 0.012 0.15 0.30 - b1 0.006 0.010 0.15 0.25 e b c 0.003 0.009 0.08 0.22 6 CL c1 0.003 0.009 0.08 0.20 6 0.20 (0.008) M C C D 0.073 0.085 1.85 2.15 3 CL E 0.071 0.094 1.80 2.40 - E1 0.045 0.053 1.15 1.35 3 A A2 A1 SPELAATNINEG e 0.0256 Ref 0.65 Ref - e1 0.0512 Ref 1.30 Ref - -C- L 0.010 0.018 0.26 0.46 4 L1 0.017 Ref. 0.420 Ref. - 0.10 (0.004) C L2 0.006 BSC 0.15 BSC  0o 8o 0o 8o - b WITH N 5 5 5 PLATING b1 R 0.004 - 0.10 - R1 0.004 0.010 0.15 0.25 c c1 Rev. 3 7/07 NOTES: BASE METAL 1. Dimensioning and tolerances per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC70 and JEDEC MO-203AA. 4X q1 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. R1 4. Footlength L measured at reference to gauge plane. 5. “N” is the number of terminal positions. R 6. These Dimensions apply to the flat section of the lead between GAUGE PLANE 0.08mm and 0.15mm from the lead tip. SEATING 7. Controlling dimension: MILLIMETER. Converted inch dimen- L PLANE sions are for reference only. C a L1 L2 4X q1 VIEW C 0.4mm 0.75mm 2.1mm 0.65mm TYPICAL RECOMMENDED LAND PATTERN FN7623 Rev 7.00 Page 13 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Package Outline Drawing P5.064A 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 0, 2/10 1.90 0-3° D A 0.08-0.20 5 4 PIN 1 INDEX AREA 2.80 3 1.60 3 5 0.15 CD 2x 2 0.20 C (0.60) 2x 0.95 SEE DETAIL X B 0.40 ±0.05 3 END VIEW 0.20M C A-B D TOP VIEW 10° TYP (2 PLCS) 5 0.15 C A-B H 2.90 2x 1.45 MAX C 1.14 ±0.15 (0.25)GAUGE 0.10 C SEATING PLANE PLANE 0.45±0.1 4 SIDE VIEW 0.05-0.15 DETAIL "X" (0.60) (1.20) NOTES: 1. Dimensions are in millimeters. (2.40) Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. This dimension is measured at Datum “H”. 6. Package conforms to JEDEC MO-178AA. (0.95) (1.90) TYPICAL RECOMMENDED LAND PATTERN FN7623 Rev 7.00 Page 14 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Package Outline Drawing M8.118A 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 A 3.0±0.1 8 0.25 CAB 4.9±0.15 DETAIL "X" 3.0±0.1 1.10 Max PIN# 1 ID B 0.18 ± 0.05 SIDE VIEW 2 1 2 0.65 BSC TOP VIEW 0.95 BSC 0.86±0.09 H GAUGE PLANE C 0.25 SEATING PLANE 0.33 +0.07/ -0.08 3°±3° 0.08 CAB 0.10 ± 0.05 0.10C 0.55 ± 0.15 DETAIL "X" SIDE VIEW 1 5.80 NOTES: 4.40 3.00 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not 0.65 included. 0.40 4. Plastic interlead protrusions of 0.25mm max per side are not included. 1.40 5. Dimensions “D” and “E1” are measured at Datum Plane “H”. TYPICAL RECOMMENDED LAND PATTERN 6. This replaces existing drawing # MDP0043 MSOP 8L. FN7623 Rev 7.00 Page 15 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Thin Shrink Small Outline Package Family (TSSOP) 0.25M C A B MDP0044 D A THIN SHRINK SMALL OUTLINE PACKAGE FAMILY N (N/2)+1 MILLIMETERS SYMBOL 14 LD 16 LD 20 LD 24 LD 28 LD TOLERANCE PIN #1 I.D. A 1.20 1.20 1.20 1.20 1.20 Max E E1 A1 0.10 0.10 0.10 0.10 0.10 ±0.05 A2 0.90 0.90 0.90 0.90 0.90 ±0.05 0.20 C B A b 0.25 0.25 0.25 0.25 0.25 +0.05/-0.06 1 (N/2) 2X N/2 LEAD TIPS B c 0.15 0.15 0.15 0.15 0.15 +0.05/-0.06 TOP VIEW D 5.00 5.00 6.50 7.80 9.70 ±0.10 E 6.40 6.40 6.40 6.40 6.40 Basic E1 4.40 4.40 4.40 4.40 4.40 ±0.10 e 0.05 H e 0.65 0.65 0.65 0.65 0.65 Basic C L 0.60 0.60 0.60 0.60 0.60 ±0.15 SEATING L1 1.00 1.00 1.00 1.00 1.00 Reference PLANE Rev. F 2/07 b 0.10M C A B NOTES: 0.10 C N LEADS SIDE VIEW 1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm per SEE DETAIL “X” side. 3. Dimensions “D” and “E1” are measured at dAtum Plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. c END VIEW L1 A2 A GAUGE PLANE 0.25 L A1 0° - 8° DETAIL X FN7623 Rev 7.00 Page 16 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Small Outline Package Family (SO) A D h X 45° NN (N/2)+1 A PIN #1 I.D. MARK E E1 c SEE DETAIL “X” 1 (N/2) B L1 0.010M C A B e H C A2 GAUGE SEATING PLANE 0.010 PLANE A1 L 4° ±4° 0.004 C 0.010M C A B b DETAIL X MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SO16 SO16 (0.300”) SO20 SO24 SO28 SYMBOL SO-8 SO-14 (0.150”) (SOL-16) (SOL-20) (SOL-24) (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - N 8 14 16 16 20 24 28 Reference - Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 FN7623 Rev 7.00 Page 17 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 ± 0.10 A DETAIL "A" 0.22 ± 0.03 B 6.0 ± 0.20 3.90 ± 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45° 4° ± 4° 0.43 ± 0.076 1.27 0.25MC AB SIDE VIEW “B” TOP VIEW 1.75 MAX 1.45 ± 0.1 0.25 GAUGE PLANE C 0.175 ± 0.075 SEATING PLANE 0.10C SIDE VIEW “A 0.63 ±0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 (5.40) 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. 6. Reference to JEDEC MS-012. TYPICAL RECOMMENDED LAND PATTERN FN7623 Rev 7.00 Page 18 of 19 February 13, 2014

ISL28130, ISL28230, ISL28430 Package Outline Drawing L8.3x3J 8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 0 9/09 2X 1.950 3.00 A 6X 0.65 (4X) 0.15 B 5 8 00 1.64 +0.10/ - 0.15 3. 6 PIN 1 INDEX AREA PIN #1 INDEX AREA 6 4 1 8X 0.30 4 TOP VIEW 8X 0.400 ± 0.10 0.10M C AB 2.38 +0.10/ - 0.15 BOTTOM VIEW SEE DETAIL "X" ( 2.38 ) ( 1.95) 0.10 C C Max 1.00 0.08 C SIDE VIEW ( 8X 0.60) (1.64) ( 2.80 ) PIN 1 C 0 . 2 REF 5 (6x 0.65) ( 8 X 0.30) 0 . 00 MIN. 0 . 05 MAX. DETAIL "X" TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN7623 Rev 7.00 Page 19 of 19 February 13, 2014