ISL21009 ® Data Sheet September 16, 2009 FN6327.7 High Voltage Input Precision, Low Noise Features FGA™ Voltage References • Output Voltages . . . . . . . .1.250V, 2.500V, 4.096V, 5.000V The ISL21009 FGA™ voltage references are extremely low • Initial Accuracy. . . . . . . . . . . . . .±0.5mV, ±1.0mV, ±2.0mV power, high precision, and low noise voltage references fabricated on Intersil’s proprietary Floating Gate Analog • Input Voltage Range. . . . . . . . . . . . . . . . . . .3.5V to 16.5V technology. The ISL21009 features very low noise (4.5µVP-P • Output Voltage Noise. . . . . . . . .4.5µVP-P (0.1Hz to 10Hz) for 0.1Hz to 10Hz), low operating current (180µA, Max), and • Supply Current. . . . . . . . . . . . . . . . . . . . . . . .180µA (Max) 3ppm/°C of temperature drift. In addition, the ISL21009 family features guaranteed initial accuracy as low as • Temperature Coefficient. . .3ppm/°C, 5ppm/°C, 10ppm/°C ±0.5mV. • Output Current Capability. . . . . . . . . . . . . . .Up to ±7.0mA This combination of high initial accuracy, low power and low • Operating Temperature Range. . . . . . . . .-40°C to +125°C output noise performance of the ISL21009 enables versatile high performance control and data acquisition applications • Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ld SOIC with low power consumption. • Pb-Free (RoHS Compliant) Available Options Applications • High Resolution A/Ds and D/As V INITIAL OUT OPTION ACCURACY TEMPCO. • Digital Meters PART NUMBER (V) (mV) (ppm/°C) • Bar Code Scanners ISL21009BFB812Z 1.250 ±0.5 3 • Basestations ISL21009CFB812Z 1.250 ±1.0 5 • Battery Management/Monitoring ISL21009DFB812Z 1.250 ±2.0 10 • Industrial/Instrumentation Equipment ISL21009BFB825Z 2.500 ±0.5 3 ISL21009CFB825Z 2.500 ±1.0 5 Pinout ISL21009DFB825Z 2.500 ±2.0 10 ISL21009 (8 LD SOIC) ISL21009BFB841Z 4.096 ±0.5 3 TOP VIEW ISL21009CFB841Z 4.096 ±1.0 5 ISL21009DFB841Z 4.096 ±2.0 10 GND OR NC 1 8 DNC ISL21009BFB850Z 5.000 ±0.5 3 VIN 2 7 DNC DNC 3 6 VOUT ISL21009CFB850Z 5.000 ±1.0 5 GND 4 5 TRIM OR NC ISL21009DFB850Z 5.000 ±2.0 10 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. FGA is a trademark of Intersil Corporation. Copyright Intersil Americas Inc. 2007, 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

ISL21009 Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION 1 GND or NC Can be either Ground or No Connect 2 VIN Power Supply Input Connection 4 GND Ground Connection 5 TRIM or NC Allows user trim typically ±2.5%. Leave Unconnected when unused. 6 VOUT Voltage Reference Output Connection 3, 7, 8 DNC Do Not Connect; Internal Connection – Must Be Left Floating Ordering Information PART NUMBER PART V OPTION TEMP. RANGE PACKAGE OUT (Notes 1, 2) MARKING (V) GRADE (°C) (Pb-Free) PKG. DWG.# ISL21009BFB812Z 21009BF Z12 1.250 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009CFB812Z 21009CF Z12 1.250 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009DFB812Z 21009DF Z12 1.250 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009BFB825Z 21009BF Z25 2.500 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009CFB825Z 21009CF Z25 2.500 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009DFB825Z 21009DF Z25 2.500 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009BFB841Z 21009BF Z41 4.096 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009CFB841Z 21009CF Z41 4.096 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009DFB841Z 21009DF Z41 4.096 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009BFB850Z 21009BF Z50 5.000 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009CFB850Z 21009CF Z50 5.000 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21009DFB850Z 21009DF Z50 5.000 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020. 2. Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2 FN6327.7 September 16, 2009

ISL21009 1 8 GND NC +5V 2 7 VIN NC 3 6 C1 NC VOUT 10µF 4 5 GND NC ISL21009-25 SPI BUS X79000 1 20 SCK CS 2 19 A0 CLR 3 18 A1 VCC 4 17 A2 VH 5 16 SI VL C1 6 15 SO VREF 0.001µF 7 14 RDY VSS 8 13 UP VOUT 9 12 LOW NOISE DAC OUTPUT DOWN VBUF 10 11 OE VFB FIGURE 1. TYPICAL APPLICATION PRECISION 12-BIT SUB-RANGING DAC 3 FN6327.7 September 16, 2009

ISL21009 Absolute Voltage Ratings Thermal Information Max Voltage V to GND . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +18V Thermal Resistance (Typical, Note 3) θ (°C/W) IN JA Max Voltage VOUT to GND (10s) . . . . . . . . . . . . . -0.5V to VOUT +1V 8 Ld SOIC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Voltage on “DNC” pins. . . . No connections permitted to these pins. Storage Temperature Range . . . . . . . . . . . . . . . . . -65°C to +150°C ESD Ratings Pb-free Reflow Profile (Note 4). . . . . . . . . . . . . . . . . . see link below Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6kV http://www.intersil.com/pbfree/Pb-FreeReflow.asp Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV Recommended Operating Conditions Temperature Range (Industrial) . . . . . . . . . . . . . . . -40°C to +125°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA NOTES: 3. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. JA 4. Post-reflow drift for the ISL21009 devices will range from 100µV to 1.0mV based on experimental results with devices tested in sockets and also on FR4 multi-layer PC boards. The design engineer must take this into account when considering the reference voltage after assembly. Common Electrical Specifications (ISL21009-12, -25, -41, -50) T = -40°C to +125°C, I = 0, unless otherwise specified. A OUT PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT V V Accuracy @ T = +25°C ISL21009B -0.5 +0.5 mV OA OUT A ISL21009C -1.0 +1.0 mV ISL21009D -2.0 +2.0 mV TC V Output Voltage Temperature ISL21009B 3 ppm/°C OUT Coefficient (Note 5) ISL21009C 5 ppm/°C ISL21009D 10 ppm/°C I Supply Current 95 180 µA IN ΔV / V Trim Range ±2.0 ±2.5 % OUT OUT I Short Circuit Current T = +25°C, V tied to GND 10 mA SC A OUT t Turn-on Settling Time V = ±0.1% 100 µs R OUT Ripple Rejection f = 10kHz 60 dB e Output Voltage Noise 0.1Hz ≤ f ≤ 10Hz 4.5 µV N P-P V Broadband Voltage Noise 10Hz ≤ f ≤ 1kHz 2.2 µV N RMS Electrical Specifications (ISL21009-12, V = 1.250V) V = 5.0V, T = -40°C to +125°C, I = 0, unless otherwise specified. OUT IN A OUT PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT V Output Voltage 1.250 V OUT V Input Voltage Range 3.5 16.5 V IN ΔV /ΔV Line Regulation 3.5V < V < 5.5V 50 150 µV/V OUT IN IN 5.5V < V < 16.5V 10 50 µV/V IN ΔV /ΔI Load Regulation Sourcing: 0mA ≤ I ≤ 7mA 10 50 µV/mA OUT OUT OUT Sinking: -7mA ≤ I ≤ 0mA 20 100 µV/mA OUT ΔV /ΔT Thermal Hysteresis (Note 6) ΔT = +165°C 50 ppm OUT A A ΔV /Δt Long Term Stability (Note 7) T = +25°C 50 ppm OUT A 4 FN6327.7 September 16, 2009

ISL21009 Electrical Specifications (ISL21009-25, V = 2.50V) V = 5.0V, T = -40°C to +125°C, I = 0, unless otherwise specified. OUT IN A OUT PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT V Output Voltage 2.500 V OUT V Input Voltage Range 3.5 16.5 V IN ΔV /ΔV Line Regulation 3.5V < V < 5.5V 50 150 µV/V OUT IN IN 5.5V < V < 16.5V 10 50 µV/V IN ΔV /ΔI Load Regulation Sourcing: 0mA ≤ I ≤ 7mA 10 50 µV/mA OUT OUT OUT Sinking: -7mA ≤ I ≤ 0mA 20 100 µV/mA OUT ΔV /ΔT Thermal Hysteresis (Note 6) ΔT = +165°C 50 ppm OUT A A ΔV /Δt Long Term Stability (Note 7) T = +25°C 50 ppm OUT A Electrical Specifications (ISL21009-41, V = 4.096V) V = 5.0V, T = -40°C to +125°C, I = 0 unless otherwise OUT IN A OUT specified. PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT V Output Voltage 4.096 V OUT V Input Voltage Range 4.5 16.5 V IN ΔV /ΔV Line Regulation 4.5V < V < 16.5V 50 200 µV/V OUT IN IN ΔV /ΔI Load Regulation Sourcing: 0mA ≤ I ≤ 5mA 20 100 µV/mA OUT OUT OUT Sinking: -5mA ≤ I ≤ 0mA 20 150 µV/mA OUT ΔV /ΔT Thermal Hysteresis (Note 6) ΔT = +165°C 50 ppm OUT A A ΔV /Δt Long Term Stability (Note 7) T = +25°C 50 ppm OUT A Electrical Specifications (ISL21009-50, V = 5.0V) V = 10.0V, T = -40°C to +125°C, I = 0 unless otherwise specified. OUT IN A OUT PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT V Output Voltage 5.000 V OUT V Input Voltage Range 5.5 16.5 V IN ΔV /ΔV Line Regulation 5.5V < V < 16.5V 20 90 µV/V OUT IN IN ΔV /ΔI Load Regulation Sourcing: 0mA ≤ I ≤ 7mA 10 100 µV/mA OUT OUT OUT Sinking: -7mA ≤ I ≤ 0mA 20 150 µV/mA OUT ΔV /ΔT Thermal Hysteresis (Note 6) ΔT = +165°C 50 ppm OUT A A ΔV /Δt Long Term Stability (Note 7) T = +25°C 50 ppm OUT A NOTES: 5. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in V is divided by the OUT temperature range; in this case, -40°C to +125°C = +165°C. 6. Thermal Hysteresis is the change of V measured @ T = +25°C after temperature cycling over a specified range, ΔT . V is read initially OUT A A OUT at T = +25°C for the device under test. The device is temperature cycled and a second V measurement is taken at +25°C. The difference A OUT between the initial V reading and the second V reading is then expressed in ppm. For Δ T = +165°C, the device under test is cycled OUT OUT A from +25°C to +125°C to -40°C to +25°C. 7. Long term drift is logarithmic in nature and diminishes over time. Drift after the first 1000 hours will be approximately 10ppm/√(1kHrs). 5 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-12) (R = 100kΩ) EXT 110 100 105 95 +25°C 100 UNIT 3 A) A) I (µIN 9905 UNIT 2 I (µIN 90 +125°C -40°C 85 UNIT 1 85 80 80 5 7 9 11 13 15 17 5 7 9 11 13 15 17 VIN (V) VIN (V) FIGURE 2. I vs V , 3 UNITS FIGURE 3. I vs V , 3 TEMPERATURES IN IN IN IN 60 60 V (µV)ΔOUTALIZED TO V= 5VIN -2240000 UNIT U1NIT 3 UNIT 2 V (µV)ΔOUT LIZED TO V = 5.0V)IN --244200000 +25°C+125°C -40°C RM MA -60 O-40 R N O -80 N ( -60 -100 3.5 5.5 7.5 9.5 11.5 13.5 15.5 3.5 5.5 7.5 9.5 11.5 13.5 15.5 VIN (V) VIN (V) FIGURE 4. LINE REGULATION, 3 UNITS FIGURE 5. LINE REGULATION OVER-TEMPERATURE 0.08 V 1.25020 00..0046 1.250 1.25015 UNIT 1 0.02 +25°C TO 1.25010 UNIT 2 mV) 0.00 +125°C -40°C ZED 1.25005 (UT -0.02 ALI 1.25000 VΔO --00..0064 ORM 1.24995 UNIT 3 N -0.08 V) 1.24990 -0.10 (T 1.24985 U O -0.12 V 1.24980 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 -40 -15 10 35 60 85 110 SINKING OUTPUT CURRENT (mA) SOURCING TEMPERATURE (°C) FIGURE 6. LOAD REGULATION FIGURE 7. V vs TEMPERATURE, 3 UNITS OUT 6 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-12) (R = 100kΩ) (Continued) EXT X = 10µs/DIV Y = 200mV/DIV 0 -10 500kHz PEAK NO LOAD -20 VIN (DC) = 10V -30 B) -40 d R ( -50 R PS -60 10nF -70 100nF 1nF -80 -90 -100 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 8. PSRR AT DIFFERENT CAPACITIVE LOADS FIGURE 9. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD X = 5µs/DIV VIN Y = 20mV/DIV VREF X = 100µs/DIV Y = 1V/DIV FIGURE 10. LINE TRANSIENT RESPONSE, 0.001µF LOAD FIGURE 11. TURN-ON TIME CAPACITANCE GAIN IS x1000, 200 NOISE IS 4.5µVP-P 180 160 140 1nF LOAD ( )ΩT 110200 NO LOAD V/DIV U m ZO 80 2 60 10nF LOAD 40 20 0 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 12. Z vs FREQUENCY FIGURE 13. V NOISE, 0.1Hz TO 10Hz OUT OUT 7 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-12) (R = 100kΩ) (Continued) EXT X = 5µs/DIV X = 10µs/DIV Y = 50mV/DIV Y = 500mV/DIV +7mA +50µA -50µA -7mA FIGURE 14. LOAD TRANSIENT RESPONSE FIGURE 15. LOAD TRANSIENT RESPONSE Typical Performance Curves (ISL21009-25) (R = 100kΩ) EXT 140 120 UNIT 1 UNIT 2 120 +125°C +25°C 100 110 A) 80 A) I (µIN 60 UNIT 3 I (µIN 100 -40°C 40 90 20 0 80 3.5 5.5 7.5 9.5 11.5 13.5 15.5 3.5 5.5 7.5 9.5 11.5 13.5 15.5 VIN (V) VIN (V) FIGURE 16. I vs V , 3 UNITS FIGURE 17. I vs V , 3 TEMPERATURES IN IN IN IN V)2.50010 60 5 (V)UTO 2.50V AT V = IN222...455900900900505 UNIT 2 UNIT 1 UNIT 3 (µV)UTD TO V = 5.0V)IN -2240000 +25°C+125°C -40°C OT OE VED 2.49990 VΔ LIZ -40 LIZ MA -60 A2.49985 R M O -80 R N O ( N2.49980 -100 ( 3.50 5.50 7.50 9.50 11.5 13.5 15.5 3.5 5.5 7.5 9.5 11.5 13.5 15.5 VIN (V) VIN (V) FIGURE 18. LINE REGULATION FIGURE 19. LINE REGULATION OVER-TEMPERATURE 8 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-25) (R = 100kΩ) (Continued) EXT 0.10 2.5002 0.08 2.5001 UNIT 3 0.06 2.5000 0.04 2.4999 (mV)OUT-000...000202 +125°C -40°C V (V)OUT 22..44999978 UNIT 2 V 2.4996 Δ -0.04 UNIT 1 +25°C -0.06 2.4995 -0.08 2.4994 -0.10 2.4993 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 -40 -20 0 20 40 60 80 100 120 140 SINKING OUTPUT CURRENT (mA) SOURCING TEMPERATURE (°C) FIGURE 20. LOAD REGULATION FIGURE 21. V vs TEMPERATURE OUT 0 500kHz PEAK NO LOAD -10 -20 VIN (DC) = 10V -30 B) -40 d R ( -50 R S -60 P 10nF -70 1nF -80 100nF -90 -100 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 22. PSRR AT DIFFERENT CAPACITIVE LOADS FIGURE 23. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD 5.2 4.8 4.4 4.0 VIN V) 3.6 (UT 3.2 HIGH IIN VO 2.8 D 2.4 AN 2.0 V IN 11..26 MEDIUM IIN 0.8 0.4 LOW IIN 0 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 TIME (ms) FIGURE 24. LINE TRANSIENT RESPONSE, 0.001µF LOAD FIGURE 25. TURN-ON TIME CAPACITANCE 9 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-25) (R = 100kΩ) (Continued) EXT GAIN IS x1000, NOISE IS 4.5µVP-P 160 140 10nF 120 1nF V ()ΩT 18000 NO LOAD mV/DI OU 2 Z 60 100nF 40 20 0 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 26. Z vs FREQUENCY FIGURE 27. V NOISE, 0.1Hz TO 10Hz OUT OUT NO OUTPUT CAPACITANCE NO OUTPUT CAPACITANCE 7mA +50µA -50µA -7mA FIGURE 28. LOAD TRANSIENT RESPONSE FIGURE 29. LOAD TRANSIENT RESPONSE Typical Performance Curves (ISL21009-41) (R = 100kΩ) EXT 110 100 105 95 +25°C 100 UNIT 3 A) A) I (µIN 9905 UNIT 2 I (µIN 90 +125°C -40°C UNIT 1 85 85 80 80 5 7 9 11 13 15 17 5 7 9 11 13 15 17 VIN (V) VIN (V) FIGURE 30. I vs V , 3 UNITS FIGURE 31. I vs V , 3 TEMPERATURES IN IN IN IN 10 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-41) (R = 100kΩ) (Continued) EXT V 04.0963 300 5. = 4.0962 V 250 V (V)OUTD TO 4.096V AT V IN44444.....00000999996666600112 UNIT 3 UNIT 1 UNIT 2 V(µV)ΔOUT ALIZED TO V = 5.0IN112-50505000000 +25°C +125°C -40°C E M LIZ4.0959 OR-100 MA4.0959 N-150 R O4.0958 -200 N 4.5 6.5 8.5 10.5 12.5 14.5 16.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 VIN (V) VIN (V) FIGURE 32. LINE REGULATION, 3 UNITS FIGURE 33. LINE REGULATION OVER-TEMPERATURE 0.10 V 4.0970 6 9 0.05 O 4.0 4.0965 (mV)UT -00..0050 -40°C +25°C ALIZED T 4.0960 UNIT 2 VΔO -0.10 +125°C ORM 4.0955 N UNIT 3 -0.15 V) 4.0950 (T UNIT 1 U O -0.20 V 4.0945 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 -40 -25 -10 5 20 35 50 65 80 95 110 125 SINKING OUTPUT CURRENT (mA) SOURCING TEMPERATURE (°C) FIGURE 34. LOAD REGULATION FIGURE 35. V vs TEMPERATURE OUT 00 --1100 VIN (DC) = 5V NNOO LLOOAADD VIN (AC) RIPPLE = 50mVP-P --2200 110000nnFF LLOOAADD B)B) --3300 dd R (R ( --4400 1100nnFF LLOOAADD RR SS --5500 PP --6600 --7700 11nnFF LLOOAADD --8800 X = 10µs/DIV 1 10 100 1k 10k 100k 1M 10M Y = 200mV/DIV FREQUENCY (Hz) FIGURE 36. PSRR AT DIFFERENT CAPACITIVE LOADS FIGURE 37. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD 11 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-41) (R = 100kΩ) (Continued) EXT VIN VREF X = 50µs/DIV X = 10µs/DIV Y = 2V/DIV Y = 200mV/DIV FIGURE 38. LINE TRANSIENT RESPONSE, 0.001µF LOAD FIGURE 39. TURN-ON TIME CAPACITANCE GAIN IS x10,000 NOISE IS 4.5µVP-P 200 180 160 140 1nF LOAD V )Ω 120 V/DI ( OUT 18000 NO LOAD 20m Z 60 10nF LOAD 40 20 0 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 1s/DIV FIGURE 40. Z vs FREQUENCY FIGURE 41. V NOISE, 0.1Hz TO 10Hz OUT OUT 7mA +50µA -50µA -7mA NO OUTPUT CAPACITANCE NO OUTPUT CAPACITANCE X = 5µs/DIV X = 5µs/DIV Y = 50mV/DIV Y = 500mA/DIV FIGURE 42. LOAD TRANSIENT RESPONSE FIGURE 43. LOAD TRANSIENT RESPONSE 12 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-50) (R = 100kΩ) EXT 140 110 112µA 104µA +25°C 120 100 100 µA) 80 95µA µA) +125°C I (IN 60 I (IN 90 40 -40°C 20 0 80 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5 VIN (V) VIN (V) FIGURE 44. I vs V , 3 UNITS FIGURE 45. I vs V , 3 TEMPERATURES IN IN IN IN V) 5.0001 100 0 AT V = 1IN45..90909090 = 10.0V)N -1000 +25°C -40°C +125°C V V)VI -200 V (V)OUTLIZED TO 5.0 444...999999999678 95µA104µA V (µΔOUTMALIZED TO ---543000000 A R M 4.9995 112µA O -600 R N O ( N 4.9994 -700 ( 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.516.5 5.50 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5 VIN (V) VIN (V) FIGURE 46. LINE REGULATION FIGURE 47. LINE REGULATION OVER-TEMPERATURE 0.10 -40°C 0.05 0.00 V) +25°C m -0.05 (T OU -0.10 V Δ +125°C -0.15 -0.20 -0.25 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 SINKING OUTPUT CURRENT (mA) SOURCING FIGURE 48. LOAD REGULATION 13 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-50) (R = 100kΩ) (Continued) EXT 5.001 0 NORMALIZED TO +25°C -10 VIN (DC) = 10V NO LOAD 5.001 -20 VIN (AC) RIPPLE = 50mVP-P -30 5.000 UNIT 1 V) UNIT 2 dB) -40 V (OUT 5.000 SRR ( --6500 10nF 4.999 P -70 -80 100nF 1nF 4.999 UNIT 3 -90 4.998 -100 -40 -20 0 20 40 60 80 100 120 140 1 10 100 1k 10k 100k 1M 10M TEMPERATURE (°C) FREQUENCY (Hz) FIGURE 49. V vs TEMPERATURE FIGURE 50. PSRR AT DIFFERENT CAPACITIVE LOADS OUT VIN = 10V DVIN = 1V VIN = 10V DVIN = 1V FIGURE 51. LINE TRANSIENT RESPONSE, NO CAPACITIVE FIGURE 52. LINE TRANSIENT RESPONSE, 0.001µF LOAD LOAD CAPACITANCE 12 120 1nF 10 100 V) (UT 8 VIN 80 VO W) ND 6 450nA (UT 60 V) A 4 ZO 40 NO LOAD (N VI 10nF 2 270nA 20 340nA 0 0 0 50 100 150 200 250 300 1 10 100 1k 10k 100k 1M TIME (µs) FREQUENCY (Hz) FIGURE 53. TURN-ON TIME FIGURE 54. Z vs FREQUENCY OUT 14 FN6327.7 September 16, 2009

ISL21009 Typical Performance Curves (ISL21009-50) (R = 100kΩ) (Continued) EXT GAIN IS x1000 NOISE IS 4.5µVP-P 50µA V DI V/ m 2 -50µA FIGURE 55. V NOISE, 0.1Hz TO 10Hz FIGURE 56. LOAD TRANSIENT RESPONSE OUT 7mA -7mA FIGURE 57. LOAD TRANSIENT RESPONSE Applications Information The process used for these reference devices is a floating gate CMOS process and the amplifier circuitry uses CMOS FGA Technology transistors for amplifier and output transistor circuitry. While The ISL21009 voltage reference uses floating gate providing excellent accuracy, there are limitations in output technology to create references with very low drift and supply noise level and load regulation due to the MOS device current. Essentially the charge stored on a floating gate cell is characteristics. These limitations are addressed with circuit set precisely in manufacturing. The reference voltage output techniques discussed in other sections. itself is a buffered version of the floating gate voltage. The Micropower Operation resulting reference device has excellent characteristics, which are unique in the industry: very low temperature drift, high The ISL21009 consumes extremely low supply current due initial accuracy, and almost zero supply current. Also, the to the proprietary FGA technology. Low noise performance is reference voltage itself is not limited by voltage bandgaps or achieved using optimized biasing techniques. Supply current zener settings, so a wide range of reference voltages can be is typically 95µA and noise is 4.5µVP-P benefitting precision, programmed (standard voltage settings are provided, but low noise portable applications such as handheld meters customer-specific voltages are available). and instruments. 15 FN6327.7 September 16, 2009

ISL21009 Data Converters in particular can utilize the ISL21009 as an plane underneath will effectively shield it from from 50 to 100 external voltage reference. Low power DAC and ADC passes through the machine. Since these machines vary in circuits will realize maximum resolution with lowest noise. X-ray dose delivered, it is difficult to produce an accurate maximum pass recommendation. Board Mounting Considerations Noise Performance and Reduction For applications requiring the highest accuracy, board mounting location should be reviewed. The device uses a The output noise voltage in a 0.1Hz to 10Hz bandwidth is plastic SOIC package, which will subject the die to mild typically 4.5µV . The noise measurement is made with a P-P stresses when the Printed Circuit (PC) board is heated and bandpass filter made of a 1-pole high-pass filter with a corner cooled, slightly changing the shape. Placing the device in frequency at 0.1Hz and a 2-pole low-pass filter with a corner areas subject to slight twisting can cause degradation of the frequency (3dB) at 8.2Hz to create a filter with a 9.9Hz accuracy of the reference voltage due to these die stresses. bandwidth. Noise in the 10Hz to 1kHz bandwidth is It is normally best to place the device near the edge of a approximately 2.2µV with no capacitance on the output. P-P board, or the shortest side, as the axis of bending is most This noise measurement is made with a 2 decade bandpass limited at that location. Mounting the device in a cutout also filter made of a 1-pole high-pass filter with a corner frequency minimizes flex. Obviously mounting the device on flexprint or at 1/10 of the center frequency and 1-pole low-pass filter with extremely thin PC material will likewise cause loss of a corner frequency at 10x the center frequency. Load reference accuracy. capacitance up to 1000pF can be added but will result in only marginal improvements in output noise and transient Board Assembly Considerations response. FGA references provide high accuracy and low temperature The output stage of the ISL21009 does not drive heavily drift but some PC board assembly precautions are capacitive loads well, so for load capacitances above necessary. Normal Output voltage shifts of 100µV to 1mV 0.001µF, the noise reduction network shown in Figure 58 is can be expected with Pb-free reflow profiles or wave solder recommended. This network reduces noise significantly over on multi-layer FR4 PC boards. Precautions should be taken the full bandwidth. Noise is reduced to less than 15µV from to avoid excessive heat or extended exposure to high reflow P-P 1Hz to 1kHz using this network with a 0.01µF capacitor and a or wave solder temperatures, this may reduce device initial 2kΩ resistor in series with a 10µF capacitor. Also, transient accuracy. response is improved. The 0.01µF value can be increased for Post-assembly x-ray inspection may also lead to permanent better load transient response with little sacrifice in output changes in device output voltage and should be minimized stability. or avoided. If x-ray inspection is required, it is advisable to Higher output capacitor values can be used without the RC monitor the reference output voltage to verify excessive shift network to address transient loads without stability has not occurred. If large amounts of shift are observed, it is problems, although there will be more overshoot an longer best to add an X-ray shield consisting of thin zinc (300µm) settling times with values up to 1.0µF. Output capacitor sheeting to allow clear imaging, yet block x-ray energy that values greater than 1.0µF are not recommended for the affects the FGA reference. ISL21009. Special Applications Considerations . In addition to post-assembly examination, there are also VIN = 5.0V other X-ray sources that may affect the FGA reference long 10µF VIN term accuracy. Airport screening machines contain X-rays VO 0.1µF ISL21009-25 and will have a cumulative effect on the voltage reference output accuracy. Carry-on luggage screening uses low level GND 2kΩ X-rays and is not a major source of output voltage shift, 0.01µF although if a product is expected to pass through that type of 10µF screening over 100 times it may need to consider shielding with copper or aluminum. Checked luggage X-rays are FIGURE 58. HANDLING HIGH LOAD CAPACITANCE higher intensity and can cause output voltage shift in much fewer passes, so devices expected to go through those Turn-On Time machines should definitely consider shielding. Note that just The ISL21009 devices have low supply current and thus, the two layers of 1/2 ounce copper planes will reduce the time to bias up internal circuitry to final values will be longer received dose by over 90%. The leadframe for the device than with higher power references. Normal turn-on time is which is on the bottom also provides similar shielding. typically 100µs, as shown in Figure 25. Circuit design must If a device is expected to pass through luggage X-ray take this into account when looking at power-up delays or machines numerous times, it is advised to mount a 2-layer sequencing. (minimum) PC board on the top, and along with a ground 16 FN6327.7 September 16, 2009

ISL21009 Temperature Coefficient Output Voltage Adjustment The limits stated for temperature coefficient (tempco) are The output voltage can be adjusted up or down by 2.5% by governed by the method of measurement. The overwhelming placing a potentiometer from V to GND and connecting the OUT standard for specifying the temperature drift of a reference is to wiper to the TRIM pin. The TRIM input is high impedance so no measure the reference voltage at two temperatures, take the series resistance is needed. The resistor in the potentiometer total variation, (V – V ), and divide by the temperature should be a low tempco (<50ppm/°C) and the resulting voltage HIGH LOW extremes of measurement (T –T ). The result is divider should have very low tempco <5ppm/°C. A digital HIGH LOW divided by the nominal reference voltage (at T = +25°C) and potentiometer such as the ISL95810 provides a low tempco multiplied by 106 to yield ppm/°C. This is the “Box” method for resistance and excellent resistor and tempco matching for trim specifying temperature coefficient. applications. Typical Application Circuits VIN = +5.0V R = 200Ω 2N2905 VIN VOUT 2.5V/50mA ISL21009 VOUT = 2.50V 0.001µF GND FIGURE 59. PRECISION 2.5V, 50mA REFERENCE +3.5V TO 16.5V 0.1µF 10µF VIN VOUT ISL21009-25 VOUT = 2.50V GND 0.001µF VCC RH VOUT X9119 (UNBUFFERED) SDA + 2-WIRE BUS SCL EL8178 VOUT – (BUFFERED) VSS RL FIGURE 60. 2.5V FULL SCALE LOW-DRIFT, LOW NOISE, 10-BIT ADJUSTABLE VOLTAGE SOURCE 17 FN6327.7 September 16, 2009

ISL21009 Typical Application Circuits (Continued) +3.5V TO 16.5V 0.1µF 10µF VIN EL8178 VOUT + VOUT SENSE – ISL21009-25 LOAD GND FIGURE 61. KELVIN SENSED LOAD 10µF +3.5V TO 16.5V 0.1µF VIN 2.5V ±2.5% VOUT ISL21009-25 TRIM GND VCC RH SDA I2C BUS SCL ISL95810 VSS RL FIGURE 62. OUTPUT ADJUSTMENT USING THE TRIM PIN 18 FN6327.7 September 16, 2009

ISL21009 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - 1 2 3 L B 0.013 0.020 0.33 0.51 9 SEATING PLANE C 0.0075 0.0098 0.19 0.25 - -A- D 0.1890 0.1968 4.80 5.00 3 D A h x 45° E 0.1497 0.1574 3.80 4.00 4 -C- e 0.050 BSC 1.27 BSC - α H 0.2284 0.2440 5.80 6.20 - e A1 C h 0.0099 0.0196 0.25 0.50 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M B S N 8 8 7 NOTES: a 0° 8° 0° 8° - 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Rev. 1 6/05 Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 FN6327.7 September 16, 2009