IS62WV25616ALL IS62WV25616BLL 256K x 16 LOW VOLTAGE, AUGUST 2014 ULTRA LOW POWER CMOS STATIC SRAM FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616ALL/IS62WV25616BLL are high- speed, low power, 4M bit SRAMs organized as 256K words • CMOS low power operation by 16 bits. It is fabricated using ISSI's high-performance 36 mW (typical) operating CMOS technology. This highly reliable process coupled with 9 µW (typical) CMOS standby innovative circuit design techniques, yields high-performance and low power consumption devices. • TTL compatible interface levels When CS1 is HIGH (deselected) or when CS1 is LOW and • Single power supply both LB and UB are HIGH, the device assumes a standby 1.65V--2.2V Vdd (IS62WV25616ALL) mode at which the power dissipation can be reduced down 2.5V--3.6V Vdd (IS62WV25616BLL) with CMOS input levels. • Fully static operation: no clock or refresh Easy memory expansion is provided by using Chip Enable required and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte • Three state outputs allows Upper Byte (UB) and Lower Byte (LB) access. • Data control for upper and lower bytes The IS62WV25616ALL/IS62WV25616BLL are packaged • Industrial temperature available in the JEDEC standard 44-Pin TSOP (TYPE II) and 48-pin • Lead-free available mini BGA (6mmx8mm). FUNCTIONAL BLOCK DIAGRAM 256K x 16 A0-A17 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 Lower Byte I/O DATA COLUMN I/O I/O8-I/O15 CIRCUIT Upper Byte CS1 OE CONTROL WE CIRCUIT UB LB Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat- est version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason- ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL PIN CONFIGURATIONS 44-Pin mini TSOP (Type II) 48- ball mini BGA (6mm x 8mm) (Package Code T) (Package Code B) A4 1 44 A5 1 2 3 4 5 6 A3 2 43 A6 A2 3 42 A7 A1 4 41 OE A0 5 40 UB CS1 6 39 LB I/O0 7 38 I/O15 I/O1 8 37 I/O14 A LB OE A0 A1 A2 NC I/O2 9 36 I/O13 I/O3 10 35 I/O12 B I/O8 UB A3 A4 CSI I/O0 VDD 11 34 GND GND 12 33 VDD C I/O9 I/O10 A5 A6 I/O1 I/O2 I/O4 13 32 I/O11 D GND I/O11 A17 A7 I/O3 VDD I/O5 14 31 I/O10 I/O6 15 30 I/O9 E VDD I/O12 NC A16 I/O4 GND I/O7 16 29 I/O8 WE 17 28 NC F I/O14 I/O13 A14 A15 I/O5 I/O6 A16 18 27 A8 A15 19 26 A9 G I/O15 NC A12 A13 WE I/O7 A14 20 25 A10 A13 21 24 A11 H NC A8 A9 A10 A11 NC A12 22 23 A17 44-Pin mini TSOP (Type II) 2 Chip Enable Option (Package Code T2) PIN DESCRIPTIONS A4 1 44 A5 A3 2 43 A6 A0-A17 Address Inputs A2 3 42 A7 I/O0-I/O15 Data Inputs/Outputs A1 4 41 OE CS1, CS2 Chip Enable Input A0 5 40 UB CS1 6 39 LB OE Output Enable Input I/O0 7 38 I/O15 WE Write Enable Input I/O1 8 37 I/O14 I/O2 9 36 I/O13 LB Lower-byte Control (I/O0-I/O7) I/O3 10 35 I/O12 UB Upper-byte Control (I/O8-I/O15) VDD 11 34 GND GND 12 33 VDD NC No Connection I/O4 13 32 I/O11 Vdd Power I/O5 14 31 I/O10 I/O6 15 30 I/O9 GND Ground I/O7 16 29 I/O8 WE 17 28 CS2 A16 18 27 A8 A15 19 26 A9 A14 20 25 A10 A13 21 24 A11 A12 22 23 A17 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL TRUTH TABLE I/O PIN Mode WE CS1 OE LB UB I/O0-I/O7 I/O8-I/O15 Vdd Current Not Selected X H X X X High-Z High-Z Isb1, Isb2 X X X H H High-Z High-Z Isb1, Isb2 Output Disabled H L H L X High-Z High-Z Icc H L H X L High-Z High-Z Icc Read H L L L H dout High-Z Icc H L L H L High-Z dout h l l l l dout dout Write L L X L H dIn High-Z Icc L L X H L High-Z dIn l l X l l dIn dIn ABSOLUTE MAXIMUM RATINGS(1) Symbol Parameter Value Unit Vterm Terminal Voltage with Respect to GND –0.2 to Vdd+0.3 V Vdd Vdd Related to GND –0.2 to Vdd+0.3 V tstg Storage Temperature –65 to +150 °C Pt Power Dissipation 1.0 W Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the op- erational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE (Vdd) Range Ambient Temperature IS62WV25616ALL IS62WV25616BLL Commercial 0°C to +70°C 1.65V - 2.2V 2.5V-3.6V Industrial –40°C to +85°C 1.65V - 2.2V 2.5V-3.6V DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol Parameter Test Conditions Vdd Min. Max. Unit Voh Output HIGH Voltage Ioh = -0.1 mA 1.65-2.2V 1.4 — V Ioh = -1 mA 2.5-3.6V 2.2 — V Vol Output LOW Voltage Iol = 0.1 mA 1.65-2.2V — 0.2 V Iol = 2.1 mA 2.5-3.6V — 0.4 V VIh Input HIGH Voltage 1.65-2.2V 1.4 Vdd + 0.2 V 2.5-3.6V 2.2 Vdd + 0.3 V VIl(1) Input LOW Voltage 1.65-2.2V –0.2 0.4 V 2.5-3.6V –0.2 0.8 V IlI Input Leakage GND ≤ VIn ≤ Vdd –1 1 µA Ilo Output Leakage GND ≤ Vout ≤ Vdd, Outputs Disabled –1 1 µA Notes: 1. VIl (min.) = –1.0V for pulse width less than 10 ns. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 3 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL IS62WV25616ALL, POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Test Conditions Max. Unit 70 Icc Vdd Dynamic Operating Vdd = Max., Com. 25 mA Supply Current Iout = 0 mA, f = fmaX Ind. 30 Icc1 Operating Supply Vdd = Max., CS1 = 0.2V Com. 10 mA Current WE = Vdd-0.2V Ind. 10 f=1mhz Isb1 TTL Standby Current Vdd = Max., Com. 0.35 mA (TTL Inputs) VIn = VIh or VIl Ind. 0.35 CS1 = VIh , f = 1 MHz OR ULB Control Vdd = Max., VIn = VIh or VIl CS1 = VIl, f = 0, UB = VIh, LB = VIh Isb2 CMOS Standby Vdd = Max., Com. 15 µA Current (CMOS Inputs) CS1 ≥ Vdd – 0.2V, Ind. 15 VIn ≥ Vdd – 0.2V, or VIn ≤ 0.2V, f = 0 OR ULB Control Vdd = Max., CS1 = VIl, VIn ≤ 0.2V, f = 0; UB / LB = Vdd – 0.2V IS62WV25616BLL, POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Test Conditions Max. Max. Unit 55 70 Icc Vdd Dynamic Operating Vdd = Max., Com. 40 35 mA Supply Current Iout = 0 mA, f = fmaX Ind. 45 40 Icc1 Operating Supply Vdd = Max., CS1 = 0.2V Com. 15 15 mA Current WE = Vdd-0.2V Ind. 15 15 f=1mhz Isb1 TTL Standby Current Vdd = Max., Com. 0.35 0.35 mA (TTL Inputs) VIn = VIh or VIl Ind. 0.35 0.35 CS1 = VIh, f = 1 MHz OR ULB Control Vdd = Max., VIn = VIh or VIl CS1 = VIl, f = 0, UB = VIh, LB = VIh Isb2 CMOS Standby Vdd = Max., Com. 15 15 µA Current (CMOS Inputs) CS1 ≥ Vdd – 0.2V, Ind. 15 15 VIn ≥ Vdd – 0.2V, or typ.(1) 3 VIn ≤ 0.2V, f = 0 OR ULB Control Vdd = Max., CS1 = VIl, VIn ≤ 0.2V, f = 0; UB / LB = Vdd – 0.2V Note: 1. Typical values are measured at Vdd = 3.0V, Ta = 25oC. Not 100% tested. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL CAPACITANCE(1) Symbol Parameter Conditions Max. Unit cIn Input Capacitance VIn = 0V 8 pF cout Input/Output Capacitance Vout = 0V 10 pF Note: 1. Tested initially and after any design or process changes that may affect these parameters. AC TEST CONDITIONS IS62WV25616ALL IS62WV25616BLL Parameter (Unit) (Unit) Input Pulse Level 0.4V to Vdd-0.2V 0.4V to Vdd-0.3V Input Rise and Fall Times 5 ns 5ns Input and Output Timing Vref Vref and Reference Level Output Load See Figures 1 and 2 See Figures 1 and 2 IS62WV25616ALL IS62WV25616BLL 1.65V-2.2V 2.5V - 3.6V R1(Ω) 3070 3070 R2(Ω) 3150 3150 VRef 0.9V 1.5V Vtm 1.8V 2.8V AC TEST LOADS R1 R1 VTM VTM OUTPUT OUTPUT R2 30 pF R2 5 pF Including Including jig and jig and scope scope Figure 1 Figure 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 5 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) 55 ns 70 ns Symbol Parameter Min. Max. Min. Max. Unit trc Read Cycle Time 55 — 70 — ns taa Address Access Time — 55 — 70 ns toha Output Hold Time 10 — 10 — ns tacs1 CS1 Access Time — 55 — 70 ns tdoe OE Access Time — 25 — 35 ns thzoe(2) OE to High-Z Output — 20 — 25 ns tlzoe(2) OE to Low-Z Output 5 — 5 — ns thzcs1 CS1 to High-Z Output 0 20 0 25 ns tlzcs1 CS1 to Low-Z Output 10 — 10 — ns tba LB, UB Access Time — 55 — 70 ns thzb LB, UB to High-Z Output 0 20 0 25 ns tlzb LB, UB to Low-Z Output 0 — 0 — ns Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to Vdd-0.2V/Vdd-0.3V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIl, WE = VIh, UB or LB = VIl) tRC ADDRESS tAA tOHA tOHA DOUT PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2(1,3) (CS1, OE, AND UB/LB Controlled) tRC ADDRESS tAA tOHA OE tDOE tHZOE CS1 tLZOE tACE1 tLZCE1 tHZCS1 LB, UB tBA tHZB tLZB DOUT HIGH-Z DATA VALID Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1, UB, or LB = VIl. WE=VIh. 3. Address is valid prior to or coincident with CS1 LOW transition. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 7 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range) 55 ns 70 ns Symbol Parameter Min. Max. Min. Max. Unit twc Write Cycle Time 55 — 70 — ns tscs1 CS1 to Write End 45 — 60 — ns taw Address Setup Time to Write End 45 — 60 — ns tha Address Hold from Write End 0 — 0 — ns tsa Address Setup Time 0 — 0 — ns tPwb LB, UB Valid to End of Write 45 — 60 — ns tPwe WE Pulse Width 40 — 50 — ns tsd Data Setup to Write End 25 — 30 — ns thd Data Hold from Write End 0 — 0 — ns thzwe(3) WE LOW to High-Z Output — 20 — 20 ns tlzwe(3) WE HIGH to Low-Z Output 5 — 5 — ns Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4V to Vdd-0.2V/Vdd-0.3V and output loading specified in Figure 1. 2. The internal write time is defined by the overlap of CS1 LOW and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. 3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL AC WAVEFORMS WRITE CYCLE NO. 1(1,2) (CS1 Controlled, OE = HIGH or LOW) tWC ADDRESS tSCS1 tHA CS1 tAW tPWE WE tPWB LB, UB tSA tHZWE tLZWE DOUT DATA UNDEFINED HIGH-Z tSD tHD DIN DATA-IN VALID Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 and WE inputs and at least one of the LB and UB inputs being in the LOW state. 2. WRITE = (CS1) [ (LB) = (UB) ] (WE). WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle) tWC ADDRESS OE tSCS1 tHA CS1 tAW tPWE WE LB, UB tSA tHZWE tLZWE HIGH-Z DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 9 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) tWC ADDRESS OE tSCS1 tHA CS1 tAW tPWE WE LB, UB tSA tHZWE tLZWE DOUT DATA UNDEFINED HIGH-Z tSD tHD DIN DATA-IN VALID WRITE CYCLE NO. 4 (UB/LB Controlled) t WC t WC ADDRESS ADDRESS 1 ADDRESS 2 OE t SA CS1 LOW t HA t HA WE t SA t PBW t PBW UB, LB WORD 1 WORD 2 t HZWE t LZWE HIGH-Z DOUT DATA UNDEFINED t HD t HD t SD t SD DIN DVAATLAIDIN DVAATLAIDIN UB_CSWR4.eps 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter Test Condition Min. Max. Unit Vdr Vdd for Data Retention See Data Retention Waveform 1.2 3.6 V Idr Data Retention Current Vdd = 1.2V, CS1 ≥ Vdd – 0.2V — 15 µA tsdr Data Retention Setup Time See Data Retention Waveform 0 — ns trdr Recovery Time See Data Retention Waveform trc — ns DATA RETENTION WAVEFORM (CS1 Controlled) tSDR Data Retention Mode tRDR VDD VDR CS1 ≥ VDD - 0.2V CS1 GND Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 11 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL ORDERING INFORMATION IS62WV25616ALL (1.65V-2.2V) Commercial Range: 0°C to +70°C Speed (ns) Order Part No. Package 70 IS62WV25616ALL-70T TSOP Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 70 IS62WV25616ALL-70TI TSOP 70 IS62WV25616ALL-70BI mini BGA (6mmx8mm) 70 IS62WV25616ALL-70BLI mini BGA (6mmx8mm), Lead-free IS62WV25616BLL (2.5V - 3.6V) Commercial Range: 0°C to +70°C Speed (ns) Order Part No. Package 55 IS62WV25616BLL-55T TSOP 70 IS62WV25616BLL-70T TSOP Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 55 IS62WV25616BLL-55TI TSOP 55 IS62WV25616BLL-55TLI TSOP, Lead-free 55 IS62WV25616BLL-55T2LI TSOP, Lead-free, 2 CS Option 55 IS62WV25616BLL-55BI mini BGA (6mmx8mm) 55 IS62WV25616BLL-55BLI mini BGA (6mmx8mm), Lead-free 12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL 8 0 0 2 / 4 0 / 6 N. 0 O SI U R N. NT SIO ON/I RU SI T U O R R T P O OLD R PR M A E MB CLUD E DA ne Θ N : MM NOT IN NCLUD Outli SIO DO OT I e N 1 N g ME D E ES ka DI N O c NG D A b D Pa LI N N L O O TE : ONTRO MENSI MENSI O C DI DI N 1. 2. 3. Θ Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 13 Rev. F 08/25/2014

IS62WV25616ALL, IS62WV25616BLL 8 0 0 7 2 0 2/ .2 1 M- / O 8 MM 0 N :C OE D I SE NJ E: Mt n DIe m Gu Nc o I Ld L e O : c E TRen ne OT ONefer utli CR O N 1. 2. e g a k c a P 14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 08/25/2014

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: I SSI: IS62WV25616BLL-55BLI IS62WV25616BLL-55TLI IS62WV25616BLL-55BLI-TR IS62WV25616BLL-55TLI-TR