Data Sheet No. PD60251 IRS2112(-1,-2,S)PbF HIGH AND LOW SIDE DRIVER Features • Product Summary Floating channel designed for bootstrap operation • Fully operational to +600 V • Tolerant to negative transient voltage, dV/dt VOFFSET 600 V max. immune • Gate drive supply range from 10 V to 20 V IO+/- 200 mA / 440 mA • Undervoltage lockout for both channels • 3.3 V logic compatible VOUT 10 V - 20 V • Separate logic supply range from 3.3 V to 20 V • Logic and power ground +/- 5 V offset ton/off (typ.) 135 ns & 105 ns • CMOS Schmitt-triggered inputs with pull-down • Cycle by cycle edge-triggered shutdown logic Delay Matching 30 ns • Matched propagation delay for both channels • Outputs in phase with inputs Packages • RoHS compliant Description 14-Lead PDIP IRS2112 The IRS2112 is a high voltage, high speed power 16-Lead PDIP MOSFET and IGBT driver with independent high- and (w/o leads 4 & 5) low-side referenced output channels. Proprietary HVIC IRS2112-2 and latch immune CMOS technologies enable rug- 14-Lead PDIP gedized monolithic construction. Logic inputs are com- (w/o lead 4) patible with standard CMOS or LSTTL outputs, down IRS2112-1 to 3.3 V logic. The output drivers feature a high pulse 16-Lead SOIC current buffer stage designed for minimum driver IRS2112S cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Typical Connection up to 600 V HO V V V DD DD B HIN HIN V S TO SD SD LOAD LIN LIN V CC V V COM SS SS V LO CC (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1

IRS2112(-1,-2,S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35. Symbol Definition Min. Max. Units VB High-side floating supply voltage -0.3 625 VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side fixed supply voltage -0.3 25 V VLO Low-side output voltage -0.3 VCC + 0.3 VDD Logic supply voltage -0.3 VSS + 25 VSS Logic supply offset voltage VCC - 25 VCC + 0.3 VIN Logic input voltage (HIN, LIN & SD) VSS - 0.3 VDD + 0.3 dVs/dt Allowable offset supply voltage transient (Fig. 2) — 50 V/ns (14 Lead DIP) — 1.6 PD Package power dissipation @ TA £ +25 °C W (16 Lead SOIC) — 1.25 (14 Lead DIP) — 75 RTHJA Thermal resistance, junction to ambient °C/W (16 Lead SOIC) — 100 TJ Junction temperature — 150 TS Storage temperature -55 150 °C TL Lead temperature (soldering, 10 seconds) — 300 Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15 V differential. Typical ratings at other bias conditions are shown in Figs. 36 and 37. Symbol Definition Min. Max. Units VB High-side floating supply absolute voltage VS + 10 VS + 20 VS High-side floating supply offset voltage Note 1 600 VHO High-side floating output voltage VS VB VCC Low-side fixed supply voltage 10 20 V VLO Low-side output voltage 0 VCC VDD Logic supply voltage VSS + 3 VSS + 20 VSS Logic supply offset voltage -5 (Note 2) 5 VIN Logic input voltage (HIN, LIN & SD) VSS VDD TA Ambient temperature -40 125 °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When VDD < 5 V, the minimum VSS offset is limited to -VDD. www.irf.com 2 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, CL = 1000 pF, TA = 25 °C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol Definition Min. Typ.Max.UnitsTest Conditions ton Turn-on propagation delay — 135 180 VS = 0 V toff Turn-off propagation delay — 130 160 VS = 600 V tsd Shutdown propagation delay — 130 160 ns tr Turn-on rise time — 75 130 tf Turn-off fall time — 35 65 MT Delay matching, HS & LS Turn-on/off — — 30 Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, TA = 25 °C and VSS = COM unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN, and SD. The V O and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min.Typ. Max.UnitsTest Conditions VIH Logic “1” input voltage 9.5 — — VIL Logic “0” input voltage — — 6.0 V VOH High level output voltage, VBIAS - VO — 0.05 0.2 IO = 2 mA VOL Low level output voltage, VO — 0.02 0.1 ILK Offset supply leakage current — — 50 VB = VS = 600 V IQBS Quiescent VBS supply current — 25 100 IQCC Quiescent VCC supply current — 80 180 VIN = 0 V or VDD µA IQDD Quiescent VDD supply current — 2.0 30 IIN+ Logic “1” input bias current — 20 40 VIN = VDD IIN- Logic “0” input bias current — — 1.0 VIN = 0 V VBS supply undervoltage positive going VBSUV+ 7.4 8.5 9.6 threshold VBS supply undervoltage negative going VBSUV- threshold 7.0 8.1 9.2 V VCC supply undervoltage positive going VCCUV+ 7.6 8.6 9.6 threshold VCC supply undervoltage negative going VCCUV- 7.2 8.2 9.2 threshold VO = 0 V, VIN = VDD IO+ Output high short circuit pulsed current 200 290 — PW £ 10 µs mA VO = 15 V, VIN = 0 V IO- Output low short circuit pulsed current 420 600 — PW £ 10 µs www.irf.com 3 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF Functional Block Diagram V B UV V DETECT DD R Q HV RSQ V /V LSEHVIFETL FPIULLTSEER RS HO DD CC HIN LEVEL SHIFT PULSE V S GEN SD V CC UV DETECT V /V DD CC LIN LEVEL LO S SHIFT R Q DELAY V COM SS Lead Definitions Symbol Description VDD Logic supply HIN Logic input for high-side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low-side gate driver output (LO), in phase VSS Logic ground VB High-side floating supply HO High-side gate drive output VS High-side floating supply return VCC Low-side supply LO Low-side gate drive output COM Low-side return www.irf.com 4 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IRS2112 IRS2112S 14 Lead PDIP w/o lead 4 16 Lead PDIP w/o leads 4 & 5 IRS2112-1 IRS2112-2 Part Number www.irf.com 5

IRS2112(-1,-2,S)PbF VCC = 15 V HV = 10 V to 600 V 10 k F6 HLIINN m10F 0m.F1 9 3 6 0m.F1 2m0H0 1F06 k 1m0F0 10 5 SD 7 11 1 HO dVs 12 10 k F6 ct OUTPUT HO MONITOR LO 13 2 IRF820 Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit V = 15 V CC HV = 10 V to 600 V 10 0.1 V m F m F 9 3 6 0m.F1 m1F0 1+-5 VB HLIINN 50% 50% 10 5 VS HIN 7 CL (0 V to 600 V) ton tr toff tf 11 HO 10 SD 1 m F 90% 90% 12 LO LIN C HO L LO 10% 10% 13 2 Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition HIN 50% 50% LIN 50% SD LO HO tsd 10% HO 90% LO MT MT 90% LO HO Figure 5. Shutdown Waveform Definitions Figure 6. Delay Matching Waveform Definitions www.irf.com 6 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF 250 250 e (ns) . 200 e (ns) . 200 Max m m Ti 150 Max. Ti 150 ay ay Typ. el el D 100 D 100 On Typ. On urn- 50 Turn- 50 T 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature(oC) VCC / VBS Supply Voltage (V) Figure 7A. Turn-On Propagation Delay Time Figure 7B. Turn-On Propagation Delay Time vs. Temperature vs. VCC /VBS Supply Voltage 400 . 250 ns) Max. me (300 (ns) 200 ay Ti200 Time 150 Max. Del Typ. Off 100 n n- Typ. n-O100 Tur 50 ur T 0 0 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature(oC) DD Figure 8A. Turn-Off Propagation Delay Time Figure 7C. Turn-On Propagation Delay Time vs. Temperature vs. V DD Supply Voltage 250 400 me (ns) 125000 Max. Time (ns) 300 Max. Ti Typ. ay 200 Off 100 Del Turn- 50 n-Off 100 Typ. ur T 0 0 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20 VCC/V BS Supply Voltage (V) VDD Supply Voltage (V) Figure 8B. Turn-Off Propagation Delay Time Figure 8C. Turn-Off Propagation Delay Time vs. V /V Supply Voltage vs. V Supply Voltage CC BS DD www.irf.com 7 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF 250 250 me (ns) 200 me (ns) 200 Max. wn Delay Ti 110500 MTaypx.. wn Delay Ti 110500 Typ. Shutdo 50 Shutdo 50 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature(oC) VCC/VBS Supply Voltage (V) Figure 9A. Shutdown Delay Time Figure 9B. Shutdown Delay Time vs. Temperature vs. VCC/VBS Supply Voltage 400 250 Time (ns) 300 Max. me (ns) . 200 y Ti 150 wn Dela200 Typ. n Rise 100 Max. o100 O hutd urn- 50 Typ. S T 0 0 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) DD Figure 9C. Shutdown Time vs. VDD Supply Voltage Figure 10A. Turn-On Rise Time vs. Temperature 250 125 me (ns) .200 Max me (ns) 100 Ti150 Ti 75 n Rise 100 Off Fall 50 Max. urn-O 50 Typ Turn- 25 Typ. T 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) V Supply Voltage (V) BIAS Figure 10B. Turn-On Rise Time vs. Voltage Figure 11A. Turn-Off Fall Time vs. Temperature www.irf.com 8 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF 125 15 me (ns) 100 Max hold (V) 12 Min. Ti 75 es 9 Off Fall 50 put Thr 6 urn- 25 Typ 1" In 3 T 0 gic " 0 Lo -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 VBIAS Supply Voltage (V) Temperature (°C) Figure 11B. Turn-Off Fall Time vs. Supply Voltage Figure 12A. Logic “I” Input Threshold vs. Temperature 15 15 V) V) hold ( 12 hold ( 12 Tres 9 hres 9 put Min. ut T Max. 1 " In 6 0" Inp 6 gic " 3 ogic " 3 o L L 0 0 2.5 5 7.5 10 12.5 15 17.5 20 -50 -25 0 25 50 75 100 125 V Logic Supply Voltage (V) Temperature (°C) DD Figure 13A. Logic “0” Input Threshold Figure 12B. Logic “I” Input Threshold vs. Temperature vs. Voltage V) 15 V) 1.0 d ( e ( ut Treshol 912 put Voltag 00..68 np ut 0 " I 6 Max. el O 0.4 gic " 3 h Lev 0.2 Max. o g L Hi 0 0.0 2.5 5 7.5 10 12.5 15 17.5 20 -50 -25 0 25 50 75 100 125 VDD Logic Supply Voltage (V) Temperature (oC) Figure 13B. Logic “0” Input Threshold Figure 14A. High Level Output Voltage vs. Voltage vs. Temperature (I o = 2 mA) www.irf.com 9 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF V) 1.0 V) 1.0 Voltage ( 0.8 Voltage ( 0.8 Output 00..46 Output 00..46 h Level 0.2 Max w Level 0.2 Max g o Hi 0.0 L 0.0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BAIS Figure 14B. High Level Output Voltage Figure 15A. Low Level Output Voltage vs. Supply Voltage (I o = 2 mA) vs. Temperature (I o = 2 mA) 1.0 200 e (V) A) ag 0.8 mnt ( 150 ut Volt 0.6 Curre utp ply 100 O 0.4 p Max. el Su w Lev 0.2 Max V BS 50 Typ. o L 0.0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VBAIS Supply Voltage (V) Temperature (oC) Figure 15B. Low Level Output Voltage vs. Supply Voltage (Io = 2 mA) Figure 16A. VBS Supply Current vs. Temperature 200 100 A) mupply Current (A) 11505000 Max. mSupply Current ( 468000 Max. SBS Typ. V BS 20 V Typ. 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VBS Supply Voltage (V) Temperature (°C) Figure 16B. VBS Supply Current vs. Figure 17A. VBS Supply Current vs. Temperature Voltage www.irf.com 10

IRS2112(-1,-2,S)PbF 100 300 A) mSupply Current (A) 468000 MTyapx.. m Supply Current (C 112205050000 Max. BS 20 VC 50 V Typ. 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 Temperature (°C) VBS Floating Supply Voltage (V) Figure 17B. V Supply Current vs. Voltage Figure 18A. V Supply Current vs. Temperature BS CC 300 12 A) 250 A)10 Max. mCurrent ( 125000 Max. mCurrent ( 68 upply 100 pply 4 Typ. S u V cc 50 Typ. SDD 2 V 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 Temper a t u r e ( ° C ) Vcc Fixed Supply Voltage (V) Figure 18B. VCC Supply Current vs. Voltage Figure 19A. VDD Supply Current vs. Temperature 12 100 mC u r r e n t ( A ) 180 mCurrent (A) 80 u p p ly 6 Max. ut Bias 4600 Max. V S D D 24 Typ. gic "1 " Inp 20 Typ. o 0 L 0 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VDD Logic Supply Voltage (V) Temperature (°C) Figure 19B. VDD Supply Current vs. VDD Voltage Figure 20A. Logic “I” Input Current vs. Temperature www.irf.com 11 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF A) 100 A) 6 u µ Current ( 6800 Current (45 Max nput Bias 40 Max. put Bias 23 Logic "1" I 200 Typ. ogic "0" In01 L 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VDD Logic Supply Voltage (V) Temperature (°C) Figure 20B. Logic “1” Input Current vs. V DD Voltage Figure 21A. Logic "0" Input Bias Current vs. Temperature µA) 6 V) 11 urrent ( 45 Max ckout +( 10 Max. C o Bias 3 age L 9 Typ. ut olt 8 0" Inp 2 nderv 7 Min. " 1 U ogic BS L 0 V 6 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 Supply Voltage (V) Temperature (°C) Figure 21B. Logic "0" Input Bias Current Figure 22. VBS Undervoltage (+) vs. Temperature vs. Voltage 11 11 ckout -(V) 10 Max. out +(V) 10 Max. o k L 9 c 9 ervoltage 8 Typ. oltage Lo 8 MTyinp.. UndS 7 Min. nderv 7 B U V 6 CC 6 -50 -25 0 25 50 75 100 125 V -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (oC) Figure 23. V BS Undervoltage (-) vs. Temperature Figure 24. VCC Undervoltage (-) vs. Temperature www.irf.com 12

IRS2112(-1,-2,S)PbF V) 11 500 ut - ( mA) cko 10 nt ( 400 ge Lo 9 Max. Curre 300 Typ. a VUndervoltCC 78 TMyipn.. utput Source 120000 Min. O 0 6 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 A ) Temperature (°C) Temperature ( o C) m Figure 25. V Undervoltage (-) vs. Temperature Figure 26A. Output Source Current vs. n t ( CC Temperature e 500 ) 750 C u r r 400 nt (mA 600 Typ. c e 300 urre 450 Min. u t p u t So u r 120000 TyMpin.. Output Sink C 135000 O 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BIAS Figure 26B. Output Source Current Figure 27A. Output Sink Current vs. Supply Voltage vs. Temperature A) 750 m ( nt 600 e r Cur 450 Typ. k n Si 300 ut Min. utp 150 O 0 10 12 14 16 18 20 V Supply Voltage (V) BIAS Figure 27B. Output Sink Current vs. Supply Voltage www.irf.com 13 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF 150 150 320 V C)125 320 V C)125 e (° e (° atur100 atur100 140 V er er p p m m Te 75 Te 75 n 140 V n o o ncti 50 10 V ncti 50 10 V u u J J 25 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 28. IRS2112 TJ vs. Frequency (IRFBC20) Figure 29. IRS2112 TJ vs. Frequency (IRFBC30) RGATE = 33 W , VCC = 15 V RGATE = 22 W , VCC = 15 V 320 V 320 V 140 V 10 V 150 150 C)125 C)125 e (° 140 V e (° eratur100 10 V eratur100 p p m m Te 75 Te 75 n n o o ncti 50 ncti 50 u u J J 25 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 30. IRS2112 T J vs. Frequency (IRFBC40) Figure 31. IRS2112 TJ vs. Frequency (IRFPE50) RGATE = 15 W , VCC = 15 V RGATE = 10 W , VCC = 15 V 320 V 140 V 150 320 V 150 C)125 C)125 e (° e (° atur100 atur100 er 140 V er p p m m n Te 75 10 V n Te 75 10 V o o ncti 50 ncti 50 u u J J 25 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 32. IRS2112S T J vs. Frequency (IRFBC20) Figure 33. IRS2112S T J vs. Frequency (IRFBC30) RGATE = 33 W , VCC = 15 V RGATE = 22 W , VCC = 15 V www.irf.com 14 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF 320 V 320 V140 V10 V 150 150 140 V C)125 10 V C)125 e (° e (° atur100 atur100 er er p p m m Te 75 Te 75 n n o o ncti 50 ncti 50 u u J J 25 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Frequency (Hz) Figure 34. IRS2112S TJ vs. Frequency (IRFBC40) Figure 35. IRS2112S TJ vs. Frequency (IRFPE50) RGATE = 15 W , VCC = 15 V RGATE = 10 W , VCC = 15 V 0.0 20.0 V) V) e ( -3.0 e (16.0 oltag Typ. Voltag ply V -6.0 Offset 12.0 et Sup -9.0 Supply 8.0 Typ. Offs ogic V S-12.0 LSS 4.0 V -15.0 0.0 10 12 14 16 18 20 10 12 14 16 18 20 VBS Floating Supply Voltage (V) VCC Fixed Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. Figure 37. Maximum VSS Positive Offset vs. VBS Supply Voltage VCC Supply Voltage www.irf.com 15 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF Case outline 01-6010 14-Lead PDIP 01-3002 03 (MS-001AC) 01-6010 14-Lead PDIP w/o Lead 4 01-3008 02 (MS-001AC) www.irf.com 16 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF 16 Lead PDIP w/o Leads 4 & 5 01-6015 01-3010 02 01 6015 16-Lead SOIC (wide body) 01-3014 03 (MS-013AA) www.irf.com 17 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF Tape & Reel LOADED TAPE FEED D IRECTION 16-Lead SOIC B AA H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 16SOICW Metric Imperial Code Min Max Min Max A 11.90 12.10 0.468 0.476 B 3.90 4.10 0.153 0.161 C 15.70 16.30 0.618 0.641 D 7.40 7.60 0.291 0.299 E 10.80 11.00 0.425 0.433 F 10.60 10.80 0.417 0.425 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D B C A E G H REEL DIMENSIONS FOR 16SOICW Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724 www.irf.com 18 PDF created with pdfFactory trial version www.pdffactory.com

IRS2112(-1,-2,S)PbF LEADFREE PART MARKING INFORMATION IRSxxxx Part number YWW? Date code IR logo ?XXXX Pin 1 Identifier Lot Code ? MARKING CODE (Prod mode - 4 digit SPN code) P Lead Free Released Non-Lead Free Released Assembly site code Per SCOP 200-002 ORDER INFORMATION 14-Lead PDIP IRS2112PbF 14-Lead PDIP IRS2112-1PbF 16-Lead PDIP IRS2112-2PbF 16-Lead SOIC IRS2112SPbF 16-Lead SOIC Tape & Reel IRS2112STRPbF The SOIC-16 is MSL3 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 11/27/2006 www.irf.com 19 PDF created with pdfFactory trial version www.pdffactory.com