ICGOO在线商城 > 集成电路(IC) > PMIC - 栅极驱动器 > IRS21091STRPBF
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IRS21091STRPBF产品简介:
ICGOO电子元器件商城为您提供IRS21091STRPBF由International Rectifier设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 IRS21091STRPBF价格参考。International RectifierIRS21091STRPBF封装/规格:PMIC - 栅极驱动器, Half-Bridge Gate Driver IC Non-Inverting 8-SOIC。您可以下载IRS21091STRPBF参考资料、Datasheet数据手册功能说明书,资料中有IRS21091STRPBF 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC DRIVER HALF BRIDGE 8-SOIC门驱动器 Hlf Brdg Drvr |
产品分类 | PMIC - MOSFET,电桥驱动器 - 外部开关集成电路 - IC |
品牌 | International Rectifier |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 电源管理 IC,门驱动器,International Rectifier IRS21091STRPBF- |
数据手册 | |
产品型号 | IRS21091STRPBF |
上升时间 | 220 ns |
下降时间 | 80 ns |
产品 | Half-Bridge Drivers |
产品目录页面 | |
产品种类 | 门驱动器 |
供应商器件封装 | 8-SOIC |
其它名称 | IRS21091STRPBFDKR |
包装 | Digi-Reel® |
商标 | International Rectifier |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 8-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SOIC-8 |
工作温度 | -40°C ~ 125°C |
工厂包装数量 | 2500 |
延迟时间 | 750ns |
最大关闭延迟时间 | 200 ns |
最大功率耗散 | 625 mW |
最大工作温度 | + 125 C |
最大开启延迟时间 | 750 ns |
最小工作温度 | - 40 C |
标准包装 | 1 |
激励器数量 | 2 Driver |
电压-电源 | 10 V ~ 20 V |
电流-峰值 | 290mA |
电源电压-最大 | 20 V |
电源电压-最小 | 10 V |
电源电流 | 1.6 mA |
类型 | High and Low Side |
输入类型 | 非反相 |
输出数 | 2 |
输出电流 | 290 mA |
输出端数量 | 2 |
配置 | Inverting, Non-Inverting |
配置数 | 1 |
高压侧电压-最大值(自举) | 600V |
Data Sheet No. PD60311 IRS21091(S)PbF HALF-BRIDGE DRIVER Features • Floating channel designed for bootstrap operation • Product Summary Fully operational to +600 V • Tolerant to negative transient voltage, dV/dt • iGmamteu dnreive supply range from 10 V to 20 V VO FFSET 600 V max. • • Undervoltage lockout for both channels IO+/- 120 mA / 250 mA 3.3 V, 5 V, and 15 V input logic compatible • Cross-conduction prevention logic VOUT 10 V - 20 V • Matched propagation delay for both channels • High-side output in phase with IN input t on/off (typ.) 750 ns & 200 ns • • Logic and power ground +/- 5 V offset Deadtime 540 ns Internal 500 ns deadtime, and programmable • up to 5 µs with one external RDT resistor Lower di/dt gate driver for better noise immunity • The dual function DT/SD input turns off both Packages channels • RoHS compliant Description The IRS21091 is a high voltage, high speed power MOSFET and IGBT driver with dependent high- and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is 8 Lead SOIC 8 Lead PDIP compatible with standard CMOS or LSTTL output, IRS21091S IRS21091 down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Typical Connection up to 600 V VCC V V CC B IN IN HO DT/SD DT/SD V TO S LOAD COM LO (Refer to Lead Assignments for correct configuration). These dia- grams show electrical connec- tions only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1
IRS21091(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VB High-side floating absolute voltage -0.3 625 VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side and logic fixed supply voltage -0.3 25 V VLO Low-side output voltage -0.3 VCC + 0.3 DT/SD Programmable deadtime and shutdown pin voltage VSS - 0.3 VCC + 0.3 VIN Logic input voltage (IN & DT/SD) VSS - 0.3 VCC + 0.3 dVS/dt Allowable offset supply voltage transient — 50 V/ns (8 Lead PDIP) — 1.0 PD Package power dissipation @ TA £ +25 °C (8 Lead SOIC) — 0.625 W (8 Lead PDIP) — 125 Rth Thermal resistance, junction to ambient °C/W JA (8 Lead SOIC) — 200 TJ Junction temperature — 150 TS Storage temperature -50 150 °C TL Lead temperature (soldering, 10 seconds) — 300 www.irf.com 2
IRS21091(S)PbF Recommended Operating Conditions The input/output logic timing diagram is shown in Fig.1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supply biased at a 15 V differential. Symbol Definition Min. Max. Units VB High-side floating supply absolute voltage VS + 10 VS + 20 VS High-side floating supply offset voltage (Note 1) 600 VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 V VLO Low-side output voltage 0 VCC VIN Logic input voltage (IN & DT/SD) VSS VCC DT/SD Programmable deadtime and shutdown pin voltage VSS VCC TA Ambient temperature -40 125 °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, CL = 1000 pF, TA = 25 °C, unless otherwise specified. Symbol Definition Min. Typ. Max.UnitsTest Conditions ton Turn-on propagation delay — 750 950 VS = 0 V toff Turn-off propagation delay — 200 280 VS = 0 V or 600 V tsd Shutdown propagation delay — 550 715 MT Delay matching, HS & LS turn-on/off — 0 70 ns tr Turn-on rise time — 100 220 VS = 0 V tf Turn-off fall time — 35 80 Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 400 540 680 RDT= 0 W DT HO turn-off to LO turn-on (DTHO-LO) 4 5 6 µs RDT = 200 kW — 0 60 RDT= 0 W MDT Deadtime matching = DTLO - HO - DTHO-LO ns — 0 600 RDT = 200 kW www.irf.com 3
IRS21091(S)PbF Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V, and TA = 25 °C unless otherwise specified. The VIL, VIH, and IIN parameters are referenced to COM and are applicable to the respective input leads: IN and DT/SD. The VO, IO, and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Min. Typ.Max.UnitsTest Conditions VIH Logic “1” input voltage for HO & logic “0” for LO 2.5 — — VIL Logic “0” input voltage for HO & logic “1” for LO — — 0.8 VCC = 10 V to 20 V VSD,TH DT/SD input threshold 11.5 13 14.5 V VOH High level output voltage, VBIAS - VO — 0.05 0.2 IO = 2 mA VOL Low level output voltage, VO — 0.02 0.1 ILK Offset supply leakage current — — 50 VB = VS = 600 V µA IQBS Quiescent VBS supply current 20 75 130 IN = 0 V or 5 V IN = 0 V or 5 V IQCC Quiescent VCC supply current 0.4 1.0 1.6 mA RDT = 0 W IIN+ Logic “1” input bias current — 5 20 µA IN = 5 V, DT/SD = 0 V IIN- Logic “0” input bias current — — 5 IN = 0 V, DT/SD = 5 V VCCUV+ VCC and VBS supply undervoltage positive going 8.0 8.9 9.8 VBSUV+ threshold VCCUV- VCC and VBS supply undervoltage negative going V 7.4 8.2 9.0 VBSUV- threshold VCCUVH Hysteresis 0.3 0.7 — VBSUVH IO+ Output high short circuit pulsed current 120 290 — VO = 0 V, PW £ 10 µs IO- Output low short circuit pulsed current 250 600 — mA VO = 15 V,PW £ 10 µs Lead Assignments 1 VCC VB 8 1 VCC VB 8 2 IN HO 7 2 IN HO 7 3 DT/SD VS 6 3 DT/SD VS 6 4 COM LO 5 4 COM LO 5 8 Lead PDIP 8 Lead SOIC IRS21091PbF IRS21091SPbF www.irf.com 4
IRS21091(S)PbF Functional Block Diagrams VB UV DETECT R HO LEHVVEL FPIULTLSERE RS Q IN VSLSESHV/CIFEOTLM GENPEURLSATEOR SHIFTER VS VCC DT/SD DEADTIME UV DETECT LO VSS/COM LEVEL DELAY COM SHIFT Lead Definitions SymbolDescription IN Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO DT/SD Programmable deadtime lead,disables input/output logic when tied to V CC VB High-side floating supply HO High-side gate drive output VS High-side floating supply return VCC Low-side and logic fixed supply LO Low-side gate drive output COM Low-side return www.irf.com 5
IRS21091(S)PbF IN(LO) IN 50% 50% IN(HO) DT/SD ton tr toff tf HO 90% 90% LO LO HO 10% 10% Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions 50% 50% IN 50% 90% DT/SD HO DTLO-HO 10% tsd 90% LO 90% DTHO-LO HO LO 10% MDT= DTLO-HO - DTHO-LO Figure 3. Shutdown Waveform Definitions Figure 4. Deadtime Waveform Definitions IN(LO) 50% 50% IN(HO) LO HO 10% MT MT 90% LO HO Figure 5. Delay Matching Waveform Definitions www.irf.com 6
IRS21091(S)PbF Note: For the following figures the VBIAS (VCC, VBS) = 15 V and TA = 25 OC unless otherwise specified. 1300 1300 s) s) n n y ( y ( Dela 1100 Dela 1100 Max. n n o o gati 900 Max gati 900 a a p . p Typ. o o Pr Pr on 700 Typ. on 700 n- n- ur ur T T 500 500 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) V Supply Voltage (V) BIAS Figure 6A. Turn-on Propagation Delay Figure 6A. Turn-On Propagation Delay Figure 6B. Turn-On Propagation Delay vs. Temperature vs. Supply Voltage 500 500 s) s) n n y ( 400 y ( 400 a a el el D D on 300 on 300 Max. ati ati g g Typ. a Max. a op 200 op 200 Pr Typ. Pr n-off 100 n-off 100 ur ur T T 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) V Supply Voltage (V) BIAS Figure 7A. Turn-off Propagation Delay Figure 7B. Turn-off Propagation Delay Figure 7A. Turn-Off Propagation Delay Figure 7B. Turn-Off Propagation Delay vs. Temperature vs. Supply Volta ge www.irf.com 7
IRS21091(S)PbF 500 500 ns) 400 ns) 400 ay ( ay ( Max. Del 300 Del 300 gation 200 Max. gation 200 Typ. a a p p Pro Typ. Pro D 100 D 100 S S 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) VBIAS Supply Voltage (V) Figure 8A. SD Propagation Delay Figure 8B. SD Propagation Delay vs. Temperature vs. Supply Voltage 500 500 Turn-On Rise Time (ns)Turn-On Rise Time (ns)123400000000 Max. Turn-On Rise Time (ns)Turn-On Rise Time (ns) 123400000000 TMyapx.. Typ. 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature(oC) VBIAS Supply Voltage (V) Figure 9A. Turn-On Rise Time Figure 9B. Turn-On Rise Time vs. Temperature vs. Supply Voltage www.irf.com 8
IRS21091(S)PbF 200 200 (ns)150 ns)e ns150 urn-Off Fall Time 15000 TMyapx.. rn-Off Fall Time (Turn-Off Fall Tim15000 MTyapx.. T u T 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) BIAS Temperature (oC) Figure 10A. Turn-Off Fall Time Figure 10B. Turn-Off Fall Time vs. Temperature vs. Supply Voltage 1000 1000 800 800 Max. s) s) n n e ( Max. e ( m 600 m 600 Typ. adti Typ. adti De De Min. 400 Min. 400 200 200 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) V Supply Voltage (V) BIAS Figure 11A. Deadtime vs. Temperature Figure 11B. Deadtime vs. Supply Volta ge www.irf.com 9
IRS21091(S)PbF 7 5 6 Max. V)4 )s) 5 Typ. ge ( m(sme ( 4 Min. olta3 eadtime Deadti 23 Input V2 Min. D 1 1 0 0 50 100 150 200 -50 -25 0 25 50 75 100 125 RRDDTT ((kKW W)) Temperature (°C) Figure 11C. Deadtime vs. R DT Figure 12A. Logic “1” Input Voltage vs. Temperature 5 6 A) µ V)4 nt (5 Max ge ( urre4 a C put Volt3 Min. put Bias 23 n2 n I " I 01 " c 1 gi o0 L 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VBIAS Supply Voltage (V) Temperature (°C) Figure 12B. Logic “1” Input Voltage Figure 13A. Logic "0" Input Bias Current vs. Supply Voltage vs. Temperature www.irf.com 10
IRS21091(S)PbF A) 6 18 µ s Current ( 45 Max hold (+) (V) 1146 Max. "0" Input Bia 123 D Input thres 1102 c S gi Lo 0 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 Supply Voltage (V) Temperature o(C) Figure 13B. Logic "0" Input Bias Current Figure 14A. SD Input Positive Going vs. Voltage Threshold (+) vs. Temperature 18 00..55 V) hold (+) (V) 1146 Max. ut Voltage ( 0000....3434 s p D Input thre 1102 h Level Out 0000....1212 MTyapx.. S 8 Hig 00..00 10 12 14 16 18 20 -1-55000 --2255 00 2255 5500 7755 110000 112255 VCC Supply Voltage (V) Temperature (oC) Temperatureo C() Figure 14B. SD Input Positive Going Figure 15A. High Level Output Voltage Threshold (+) vs. Supply Voltage vs. Temperature www.irf.com 11
IRS21091(S)PbF 0.5 0.5 ) ut Voltage (V) 00..34 Max. ut Voltage (V00..34 p p ut ut O 0.2 O0.2 el el v v e e L 0.1 L0.1 h w Max. Hig Typ. Lo Typ. 0.0 0.0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VBIAS Supply Voltage (V) Temperature o(C) Figure 15B. High Level Output Voltage Figure 16A. Low Level Output Voltage vs. Supply Volta ge vs. Temperature V)0.5 A)A) 500 ut Voltage (00..34 me Current (ge Current ( 340000 p ga ut kaak Low Level O00..012 MTyapx.. Offset Supply LeaOffset Supply Le 1200000 Max. 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BIAS Figure 16B. Low Level Output Voltage Figure 17A. Offset Supply Leakage Current vs. Supply Voltage vs. Temperature www.irf.com 12
IRS21091(S)PbF 500 400 A) m( ent 400 μA) 300 urr nt ( C e ge 300 urr a C 200 ak y e pl y L 200 up Max. pl S 100 up BS Typ. et S 100 Max. V Min. s 0 Off 0 -50 -25 0 25 50 75 100 125 0 100 200 300 400 500 600 Temperature o(C) V Boost Voltage (V) B Figure 17B. Offset Supply Leakage Current Figure 18A. V Supply Current vs. BS vs. Boost Voltage Temperature 400 3.0 A) ) 2.5 μy Current ( 230000 Current (mA)Curren (mA 12..50 Max. uppl Max. ply pply Typ. VS BS 100 Typ. Sup cc SuC 1.0 Min. Min. VVC 0.5 0 10 12 14 16 18 20 0.0 -50 -25 0 25 50 75 100 125 Supply Voltage (V) Temperature (oC) Figure 18B. V Supply Current vs. Supply Figure 19A. V Supply Current BS CC Voltage vs. Temperature www.irf.com 13
IRS21091(S)PbF 3.0 60 A) 2.5 A)A) 50 V Supply Current (mCC 0112....5050 MTMyainpx... (Logic "1" Input Current (Logic “1” Input Current m 12340000 Max. Typ. 0.0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 VCC Supply Voltage (V) Temperature (oC) Figure 20B. V Supply Current Figure 19B. VCC Supply Current Figure 20A. Logic “1” Input Current vs. VCC Supply Voltage vs. Temperature 10 60 A)A) 50 A) 8 m Current (Current ( 40 mCurrent ( 6 Max. Logic "1" Input Logic “1” Input 123000 MTyapx.. Logic 0” Input 24 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 V Supply Voltage (V) CC Temperatureo (C) Figure 21B. Logic "1" Input Current Figure 20B. Logic “1” Input Current Figure 21A. Logic “0” Input Current vs. Supply Voltage vs. Temperature www.irf.com 14
IRS21091(S)PbF 10 12 ment (A) 8 Max. d (+) (V) 11 urr 6 hol 10 Max. C s Input 4 O Thre 9 Typ. c 0” 2 UVL Min. Logi V CC 8 0 7 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) CC Figure 21B. Logic “0” Input Currentt Figure 22. VCC Undervoltage Threshold (+) vs. Supply Voltage vs. Temperature 11 12 V) V) old (-) ( 10 Max. old (+) ( 11 Max. h 9 h 10 es es O Thr 8 Typ. O Thr 9 Typ. L Min. L UV UV Min. V CC 7 V BS 8 6 7 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (oC) Temperature (oC) Figure 23. VCC Undervoltage Threshold (-) Figure 24. VBS Undervoltage Threshold (+) vs. Temperature vs. Temperature www.irf.com 15
IRS21091(S)PbF 11 500 ) A) V10 m 400 -) ( nt ( Typ. old ( 9 Max. urre 300 h C O Thres 8 Typ. Source 200 Min. UVLS 7 Min. Output 100 B V 0 6 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (oC) Temperature (oC) Figure 25. VBS Undervoltage Threshold (-) Figure 26A. Output Source Current vs. vs. Temperature Temperature 500 1000 mA) 400 )m A) 800 urce Current ( 230000 Sink CurrenSink Current ( 460000 Typ. put So 100 Typ. utput utput 200 Min. ut OO O Min. 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 V Supply Voltage (V) Temperatureo C() BIAS Figure 26B. Output Source Current Figure 27A. Output Sink Current vs. Supply Voltage vs. Temperature www.irf.com 16
IRS21091(S)PbF 1000 0 mA) 800 e (V) -2 n( g CurreCurrent 600 y Volta -4 Typ. Sink Sink 400 Suppl -6 ut ut Typ. et utpOutp 200 Offs -8 O Min. S V 0 -10 10 12 14 16 18 20 10 12 14 16 18 20 V Floating Supply Voltage (V) V Supply Voltage (V) BS BIAS Figure 27B. Output Sink Currentt Figure 28. Maximum V S Negative Offset vs. Supply Voltage vs. Supply Voltage www.irf.com 17
IRS21091(S)PbF Case Outlines 01-6014 8 Lead PDIP 01-3003 01 (MS-001AB) INCHES MILLIMETERS D B DIM MIN MAX MIN MAX A 5 FOOTPRINT A .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 8X 0.72 [.028] b .013 .020 0.33 0.51 8 7 6 5 c .0075 .0098 0.19 0.25 6 H D .189 .1968 4.80 5.00 E 0.25 [.010] A E .1497 .1574 3.80 4.00 1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC e1 .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 6X e 3X 1.27 [.050] 8X 1.78 [.070] y 0° 8° 0° 8° e1 K x 45° A C y 0.10 [.004] 8X b A1 8X L 8X c 7 0.25 [.010] C A B NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 01-6027 8 Lead SOIC 01-0021 11 (MS-012AA) www.irf.com18
IRS21091(S)PbF Tape & Reel LOADED TAPE FEED DI RECTION 8-lead SOIC B AA H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 8SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 11.70 12.30 0.46 0.484 D 5.45 5.55 0.214 0.218 E 6.30 6.50 0.248 0.255 F 5.10 5.30 0.200 0.208 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D B C A E G H REEL DIMENSIONS FOR 8SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 18.40 n/a 0.724 G 14.50 17.10 0.570 0.673 H 12.40 14.40 0.488 0.566 www.irf.com19
IRS21091(S)PbF LEADFREE PART MARKING INFORMATION Part number IRSxxxxxx YWW? Date code IR logo ?XXXX Pin 1 Identifier Lot Code ? MARKING CODE (Prod mode - 4 digit SPN code) P Lead Free Released Non-Lead Free Released Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead PDIP IRS21091PbF 8-Lead SOIC IRS21091SPbF 8-Lead SOIC Tape & Reel IRS21091STRPbF The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 Data and specifications subject to change without notice. 6/22/2007 www.irf.com20
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