Data Sheet No. PD60260 IRS2108/IRS21084(S)PbF HALF-BRIDGE DRIVER Features • Floating channel designed for bootstrap operation Packages • Fully operational to +600 V • Tolerant to negative transient voltage, dV/dt 8-Lead PDIP immune • Gate drive supply range from 10 V to 20 V • Undervoltage lockout for both channels 14-Lead PDIP • 3.3 V, 5 V, and 15 V input logic compatible • Cross-conduction prevention logic • Matched propagation delay for both channels • High-side output in phase with HIN input • Low-side output out of phase with (cid:7)(cid:9)(cid:10) input • Logic and power ground +/- 5 V offset • Internal 540 ns deadtime, and programmable up 8-Lead SOIC 14-Lead SOIC to 5 µs with oneexternal RDT resistor (IRS21084) • Lower di/dt gate driver for better noise immunity • RoHS compliant Description Feature Comparison The IRS2108/IRS21084 are high volt- age, high speed power MOSFET and (cid:2)(cid:24)(cid:15)(cid:30)(cid:30)(cid:31) IGBT drivers with dependent high- and (cid:22)(cid:23)(cid:24)(cid:14) (cid:9)(cid:26)(cid:25)(cid:15)(cid:12)(cid:27)(cid:11)(cid:28)(cid:29)(cid:14) (cid:29)(cid:12)(cid:15)(cid:24)"(cid:25)#!"(cid:11)(cid:25)(cid:29)(cid:14)(cid:14)(cid:28)(cid:28)(cid:15)(cid:15)(cid:25)(cid:25) (cid:20)"(cid:23)%(cid:25)!(cid:30)(cid:14)(cid:28)&$" ’(cid:24)(cid:15)(cid:11)(cid:25)!(cid:13)(cid:22)(cid:28)(cid:25)(cid:30) ton%(cid:25)/t(cid:30)o&ff low-side referenced output channels. (cid:26)(cid:15)(cid:27)(cid:28)(cid:29) 9:(cid:17)(cid:16)*9;(cid:17): (cid:2)(cid:6)(cid:8) Proprietary HVIC and latch immune (cid:5)(cid:9)(cid:10)*(cid:7)(cid:9)(cid:10) (cid:25)(cid:15) (cid:25)(cid:15)(cid:25)" 99(cid:17)*9(cid:17)(cid:17) 9:(cid:17)(cid:16)< (cid:1)(cid:4)(cid:4)*(cid:2)(cid:6)(cid:8) CMOS technologies enable ruggedized 9:(cid:17)= (cid:9)(cid:25)(cid:14)"(cid:24)(cid:25)(cid:23)(cid:26)(cid:13)><(cid:17) (cid:2)(cid:6)(cid:8) (cid:5)(cid:9)(cid:10)*(cid:7)(cid:9)(cid:10) ?"(cid:30) 99(cid:17)*9(cid:17)(cid:17) monolithic construction. The logic input 9:(cid:17)=< (cid:22)(cid:24)(cid:15)(cid:27)(cid:24)(cid:23)$$(cid:23)@(cid:26)"(cid:13)><(cid:17)(cid:13)(cid:31)(cid:13)>(cid:17)(cid:17)(cid:17) (cid:1)(cid:4)(cid:4)*(cid:2)(cid:6)(cid:8) is compatible with standard CMOS or 9:(cid:17)A*9;(cid:17)9 (cid:9)(cid:10)*(cid:4)(cid:20) ?"(cid:30) (cid:9)(cid:25)(cid:14)"(cid:24)(cid:25)(cid:23)(cid:26)(cid:13)><(cid:17) (cid:2)(cid:6)(cid:8) J>(cid:17)*9(cid:17)(cid:17) 9:(cid:17)A< (cid:22)(cid:24)(cid:15)(cid:27)(cid:24)(cid:23)$$(cid:23)@(cid:26)"(cid:13)><(cid:17)(cid:13)(cid:31)(cid:13)>(cid:17)(cid:17)(cid:17) (cid:1)(cid:4)(cid:4)*(cid:2)(cid:6)(cid:8) LSTTL output, down to 3.3 V logic. The 9;(cid:17)< (cid:5)(cid:9)(cid:10)*(cid:7)(cid:9)(cid:10) ?"(cid:30) (cid:9)(cid:25)(cid:14)"(cid:24)(cid:25)(cid:23)(cid:26)(cid:13):(cid:17)(cid:17) (cid:2)(cid:6)(cid:8) :(cid:16)(cid:17)*:<(cid:17) output drivers feature a high pulse cur- rent buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Typical Connection (cid:11)(cid:12)(cid:13)(cid:14)(cid:15)(cid:13)(cid:16)(cid:17)(cid:17)(cid:13)(cid:1) (cid:1)(cid:2)(cid:2) (cid:1) (cid:1) (cid:2)(cid:2) (cid:3) (cid:5)(cid:9)(cid:10) (cid:5)(cid:9)(cid:10) (cid:5)(cid:6) (cid:7)(cid:9)(cid:10) (cid:7)(cid:9)(cid:10) (cid:1)(cid:4) (cid:7)(cid:6)(cid:18)(cid:19)(cid:6)(cid:20) (cid:2)(cid:6)(cid:8) (cid:7)(cid:6) (cid:11)(cid:12)(cid:13)(cid:14)(cid:15)(cid:13)(cid:16)(cid:17)(cid:17)(cid:13)(cid:1) IRS21084 IRS2108 (cid:5)(cid:6) (cid:1) (cid:1) (cid:1) (cid:2)(cid:2) (cid:2)(cid:2) (cid:3) (cid:5)(cid:9)(cid:10) (cid:5)(cid:9)(cid:10) (cid:1)(cid:4) (cid:18)(cid:6) (cid:7)(cid:9)(cid:10) (cid:7)(cid:9)(cid:10) (cid:7)(cid:6)(cid:19)(cid:20) (Refer to Lead Assignments for correct pin (cid:20)(cid:18) configuration). These diagrams show electrical connections only. Please refer to (cid:1)(cid:4)(cid:4) (cid:21) (cid:1)(cid:4)(cid:4) (cid:2)(cid:6)(cid:8) our Application Notes and DesignTips for (cid:20)(cid:18) (cid:7)(cid:6) proper circuit board layout. www.irf.com 1

IRS2108/IRS21084(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VB High-side floating absolute voltage -0.3 625 VS High-side floating supply offset voltage VB - 25V B + 0.3 VHO High-side floating output voltage VS - 0.3V B + 0.3 VCC Low-side and logic fixed supply voltage -0.3 25 V VLO Low-side output voltage -0.3V CC + 0.3 DTProgrammable deadtime pin voltage (IRS21084 only) VSS - 0.3 VCC + 0.3 VIN Logic input voltage (HIN & (cid:7)(cid:9)(cid:10)) VSS - 0.3 VCC + 0.3 VSS Logic ground (IRS21084 only)V CC - 25V CC + 0.3 dVS/dtAllowable offset supply voltage transient —50V/ns (8 lead PDIP) — 1.0 (8 lead SOIC) — 0.625 PD Package power dissipation @ TA ≤ +25 oC (14 lead PDIP) — 1.6 W (14 lead SOIC) — 1.0 (8 lead PDIP) — 125 (8 lead SOIC) — 200 RthJA Thermal resistance, junction to ambient (14 lead PDIP) — 75 °C/W (14 lead SOIC) — 120 TJ Junction temperature — 150 TS Storage temperature -50 150 °C TL Lead temperature (soldering, 10 seconds) — 300 Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential. Symbol Definition Min. Max. Units VBHigh-side floating supply absolute voltage VS + 10 VS + 20 VS High-side floating supply offset voltage Note 1600 VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 1020 VLO Low-side output voltage 0V CC V IRS2108 COM VCC VIN Logic input voltage IRS21084 VSS VCC DT Programmable deadtime pin voltage (IRS21084 only) VS VCC VSS Logic ground (IRS21084 only)-55 TA Ambient temperature -40125 °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). www.irf.com 2

IRS2108/IRS21084(S)PbF Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25 °C, DT = VSS unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay — 220 300 VS = 0 V toff Turn-off propagation delay — 200 280 VS = 0 V or 600 V MT Delay matching | ton - toff | — 0 30 tr Turn-on rise time — 100 220 ns VS = 0 V tf Turn-off fall time — 35 80 Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 400 540680R DT= 0 Ω DT HO turn-off to LO turn-on (DTHO-LO) 456µs R DT = 200 kΩ (IR21084) | | — 0 60 ns RDT=0 Ω MDT Deadtime matching = DTLO-HO - DTHO-LO — 0 600 RDT = 200 kΩ (IR21084) Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM, DT= VSS and TA = 25 °C unless otherwise specified. The VIL, VIH, and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO, and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Min. Typ. Max. Units Test Conditions VIH Logic “1” input voltage for HIN & logic “0” for (cid:7)(cid:9)(cid:10) 2.5 — — VCC = 10 V to 20 V VIL Logic “0” input voltage for HIN & logic “1” for (cid:7)(cid:9)(cid:10) — — 0.8 V VOH High level output voltage, VBIAS - VO — 0.05 0.2 IO = 2 mA VOL Low level output voltage, VO — 0.02 0.1 ILK Offset supply leakage current — — 50 VB = VS = 600 V µA IQBS Quiescent VBS supply current 20 75 130 VIN = 0 V or 5 V VIN = 0 V or 5 V IQCC Quiescent VCC supply current 0.4 1.0 1.6 mA RDT=0 Ω IIN+ Logic “1” input bias current — 5 20 HIN = 5 V, (cid:7)(cid:9)(cid:10) = 0 V µA IIN- Logic “0” input bias current—— 5 HIN = 0 V, (cid:7)(cid:9)(cid:10) = 5 V VCCUV+ VCC and VBS supply undervoltage positive going 8.0 8.9 9.8 VBSUV+ threshold VCCUV- VCC and VBS supply undervoltage negative going 7.4 8.2 9.0 V VBSUV- threshold VCCUVH Hysteresis 0.3 0.7 — VBSUVH VO = 0 V, IO+ Output high short circuit pulsed current 120 290 — PW ≤ 10 µs mA VO = 15 V, IO- Output low short circuit pulsed current 250 600 — PW ≤ 10 µs www.irf.com 3

IRS2108/IRS21084(S)PbF Functional Block Diagram VB 2108 UV DETECT R HO LEHVVEL FPIULTLSEER RS Q SHIFTER HIN VSS/COM VS LSEHVIFETL GENPEURLSAETOR DT DEADTIME & VCC SHOOT-THROUGH PREVENTION UV +5V DETECT LO VSS/COM LIN LEVEL DELAY COM SHIFT VSS VB 21084 UV DETECT R HO LEHVVEL FPIULTLSEER RS Q HIN VSS/COM SHIFTER VS LSEHVIFETL GENPUERLSAETOR DEADTIME & VCC DT SHOOT-THROUGH PREVENTION UV +5V DETECT LO VSS/COM LIN LEVEL DELAY COM SHIFT VSS www.irf.com 4

IRS2108/IRS21084(S)PbF Lead Definitions Symbol Description HINLogic input for high-side gate driver output (HO), in phase (referenced to COM for IRS2108 and VSS for IRS21084) (cid:7)(cid:9)(cid:10) Logic input for low-side gate driver output (LO), out of phase (referenced to COM for IRS2108 and VSS for IRS21084) DTProgrammable deadtime lead, referenced to VSS (IR21084 only) VSSLogic ground (IRS21084 only) VB High-side floating supply HOHigh-side gate driver output VS High-side floating supply return VCC Low-side and logic fixed supply LOLow-side gate driver output COMLow-side return Lead Assignments 1 VCC VB 8 1 VCC VB 8 2 HIN HO 7 2 HIN HO 7 3 LIN VS 6 3 LIN VS 6 4 COM LO 5 4 COM LO 5 8 Lead PDIP 8 Lead SOIC IRS2108PbF IRS2108SPbF 1 VCC 14 1 VCC 14 2 HIN VB 13 2 HIN VB 13 3 LIN HO 12 3 LIN HO 12 4 DT VS 11 4 DT VS 11 5 VSS 10 5 VSS 10 6 COM 9 6 COM 9 7 LO 8 7 LO 8 14 Lead PDIP 14 Lead SOIC IRS21084PbF IRS21084SPbF www.irf.com 5

IRS2108/IRS21084(S)PbF (cid:5)(cid:9)(cid:10) (cid:7)(cid:9)(cid:10) (cid:7)(cid:9)(cid:10) (cid:5)(cid:6) 5(cid:17)^ 5(cid:17)^ (cid:7)(cid:6) (cid:14)(cid:15)(cid:25) (cid:14)(cid:24) (cid:14)(cid:15)‘‘ (cid:14)‘ Figure 1. Input/Output Timing Diagram <(cid:17)^ <(cid:17)^ (cid:7)(cid:6) ’(cid:17)^ ’(cid:17)^ 5(cid:17)^ 5(cid:17)^ (cid:5)(cid:9)(cid:10) (cid:14)(cid:15)(cid:25) (cid:14)(cid:24) (cid:14)(cid:15)‘‘ (cid:14)‘ <(cid:17)^ <(cid:17)^ (cid:5)(cid:9)(cid:10) 5(cid:17)^ 5(cid:17)^ (cid:7)(cid:9)(cid:10) (cid:5)(cid:6) ’(cid:17)^ ’(cid:17)^ Figure 2. Switching Time Waveform Definitions <(cid:17)^ (cid:5)(cid:6) (cid:20)(cid:18)(cid:7)(cid:6)(cid:31)(cid:5)(cid:6) ’(cid:17)^ (cid:7)(cid:6) <(cid:17)^ (cid:20)(cid:18)(cid:5)(cid:6)(cid:31)(cid:7)(cid:6) ’(cid:17)^ (cid:8)(cid:20)(cid:18)_ (cid:20)(cid:18)(cid:7)(cid:6)(cid:31)(cid:5)(cid:6) (cid:31)(cid:13)(cid:13)(cid:20)(cid:18)(cid:5)(cid:6)(cid:31)(cid:7)(cid:6) Figure 3. Deadtime Waveform Definitions www.irf.com 6

IRS2108/IRS21084(S)PbF s) 500 s) 500 n n ay ( 400 ay ( 400 el el Max. D D n 300 n 300 o o ati Max. ati ag 200 ag 200 Typ. p p o o Pr Typ. Pr n 100 n 100 O O n- n- ur 0 ur 0 T T -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) V Supply Voltage (V) BIAS Figure 4A. Turn-On Propagation Delay Figure 4B. Turn-On Propagation Delay vs. Temperature vs. Supply Voltage 500 500 s) s) n n ay ( 400 ay ( 400 el el n D 300 n D 300 Max. o o gati Max. gati Typ. a 200 a 200 p p o o Pr Typ. Pr Off 100 Off 100 n- n- ur 0 ur 0 T T -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) VBIAS Supply Voltage (V) Figure 5A. Turn-Off Propagation Delay Figure 5B. Turn-Off Propagation Delay vs.Temperature vs. Supply Voltage www.irf.com 7

IRS2108/IRS21084(S)PbF 500 500 s) s) n 400 n 400 e ( e ( m m Ti 300 Ti 300 e e s s Ri Ri Max. n 200 n 200 O O n- Max. n- ur 100 ur 100 T T Typ. Typ. 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) V Supply Voltage (V) BIAS Figure 6A. Turn-On Rise Time Figure 6B. Turn-On Rise Time vs.Temperature vs. Supply Voltage 200 200 ) me (ns) 150 me (ns)Fall Time 150 Off Fall Ti 10500 Off Fall TiTurn-Off 10500 Turn- Turn- 0 0 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) Input Voltage (V) Figure 7A. Turn-Off Fall Time Figure 7B. Turn-Off Fall Time vs. Temperature vs. Input voltage www.irf.com 8

IRS2108/IRS21084(S)PbF 1000 1000 800 800 ns) ns) Max. me ( 600 Max. me ( 600 Typ. adti Typ. adti e e Min. D 400 Min. D 400 200 200 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) VBIAS Supply Voltage (V) Figure 8A. Deadtime vs. Temperature Figure 8B. Deadtime vs. Supply Voltage 7 8 6 7 µe (s)e (s) 45 MaTxy.Mpi.n. age (V) 56 eadtimeadtim 3 ut Volt 34 Min. DD 2 p n 2 I 1 1 0 0 0 50 100 150 200 -50 -25 0 25 50 75 100 125 R (kΩ) Temperature (oC) DT Figure 8C. Deadtime vs. R Figure 9A. Logic "1" Input Voltage DT (IR21084 Only) vs. Temperature www.irf.com 9

IRS2108/IRS21084(S)PbF 8 4.0 7 3.2 V) 6 V) ge ( 5 ge ( 2.4 a a olt 4 olt ut V 3 ut V 1.6 p p In 2 Min. In 0.8 Min. 1 0 0.0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BAIS Figure 9B. Logic "1" Input Voltage Figure 10A. Logic "0" Input Voltage vs. Supply Voltage vs. Temperature 4.0 ) 0.5 V e ( 3.2 ag 0.4 V) olt ge ( 2.4 ut V 0.3 a p olt ut V 1.6 O 0.2 ut el Max. p v In 0.8 Min. Le 0.1 h g Typ. Hi 0.0 0.0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) CC Figure 11A. High Level Output Voltage Figure 10B. Logic "0" Input Voltage vs. Temperature vs. Supply Voltage www.irf.com 10

IRS2108/IRS21084(S)PbF 0.5 0.5 )V V) put Voltage ( 00..34 put Voltage ( 00..34 Out 0.2 Max. Out 0.2 el el Lev 0.1 Lev 0.1 Max. h w Hig 0.0 Typ. Lo 0.0 Typ. 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BAIS Figure 11B. High Lovel Output Voltage Figure 12A. Low Level Output Voltage vs. Supply Voltage vs.Temperature 0.5 A)A) 500 e (V) µ(nt ( g 0.4 e 400 olta Curr ut V 0.3 ge 300 utp aka O 0.2 e 200 el y L w Lev 0.1 Max. Suppl 100 Max. Lo 0 Typ. set 0 10 12 14 16 18 20 Off -50 -25 0 25 50 75 100 125 Temperature (oC) V Supply Voltage (V) BIAS Figure 12B. Low Level Output Voltage Figure 13A. Offset Supply Leakage Current vs. Supply Voltage vs. Temperature www.irf.com 11

IRS2108/IRS21084(S)PbF A)A) 500 400 µ nt (( A)A) e 400 µ urr (nt ( 300 C e age 300 Curr eak 200 ply 200 L p Supply 100 Max. V SuBS 100 T Myapx.. Offset 0 0 100 200 300 400 500 600 0 Min. -50 -25 0 25 50 75 100 125 V Boost Voltage (V) Temperature (oC) B Figure 13B. Offset Supply Leakage Current Figure 14A. V Supply Current BS vs. Temperature vs. Temperature 400 3.0 A)A) A) 2.5 µ m (nt ( 300 nt ( 2.0 urre urre Max. C 200 C 1.5 ply ply Typ. p p 1.0 Su 100 Max. Su BS Typ. CC 0.5 Min. V V Min. 0 0.0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BS Figure 14B. V Supply Current BS Figure 15A. V Supply Current vs. Supply Voltage CC vs. Temperature www.irf.com 12

IRS2108/IRS21084(S)PbF 3.0 60 A) 2.5 A)A) m 50 nt ( 2.0 m(nt ( e e 40 urr urr C 1.5 C ply Max. put 30 p 1.0 n SuC Typ. "1" I 20 VC 0.5 Min. gic 10 Max. o 0.0 L Typ. 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) CC Temperature (oC) Figure 15B. V Supply Current CC Figure 16A. Logic "1" Input Current vs. Supply Voltage vs. Temperature 60 6 m(A)mnt (A) 50 nt (µA) 5 Max e e urr 40 urr4 C C put 30 as 3 1" In 20 Max. ut Bi2 " p c n Logi 10 Typ. "0" I1 c 0 gi o0 10 12 14 16 18 20 L -50 -25 0 25 50 75 100 125 V Supply Voltage (V) CC Temperature (°C) Figure 16B. Logic "1" Input Current Figure 17A. Logic "0" Input Bias Current vs. Supply Voltage vs. Temperature www.irf.com 13

IRS2108/IRS21084(S)PbF A) 6 12 Current (µ 45 Max hold (+) (V) 1101 Bias 3 hres Max. ut O T 9 Typ. p n 2 L "0" I 1 UVCC 8 Min. gic V Lo 0 7 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 Temperature (oC) Supply Voltage (V) Figure 17B. Logic "0" Input Bias Current Figure 17B. Logic "0" Input Bias Current Figure 18. VCC Undervoltage Threshold (+) vs. Temperature vs. Voltage 11 12 V) V) hold (-) ( 10 Max. old (+) ( 11 s 9 h 10 e s Max. Thr Typ. hre LO 8 O T 9 Typ. V Min. L U V CC 7 UBS 8 Min. V V 6 7 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (oC) Temperature (oC) Figure 19. VCC Undervoltage Threshold (-) Figure 20. VBS Undervoltage Threshold (+) vs. Temperature vs. Temperature www.irf.com 14

IRS2108/IRS21084(S)PbF 11 500 V) Αm)mA) hold (-) ( 109 Max. Current (( 340000 Typ. Thres 8 Typ. urce 200 O o UVL 7 Min. put S 100 Min. V BS Out 6 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (oC) Temperature (oC) Figure 21. V Undervoltage Threshold (-) Figure 22A. Output Source Current BS vs. Temperature vs. Temperature 500 1000 Αm)mA) )A) Current (( 340000 Αurrent (m(m 680000 Typ. e C c k ur 200 n 400 o Si ut S 100 Typ. put 200 Min. p ut ut O O Min. 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 V Supply Voltage (V) Temperature (oC) BIAS Figure 22B. Output Source Current Figure 23A. Output Sink Current vs. Supply Voltage vs.Temperature www.irf.com 15

IRS2108/IRS21084(S)PbF 1000 0 V) A) 800 e ( -2 m g a ent ( 600 Volt -4 Typ. Curr pply k 400 u -6 n S Output Si 200MTiynp.. Offset S -8 V 0 -10 10 12 14 16 18 20 10 12 14 16 18 20 V Supply Voltage (V) V Floating Supply Voltage (V) BIAS BS Figure 23B. Output Sink Current Figure 24. Maximum V Negative Offset s vs. Supply Voltage vs. Supply Voltage 140 140 120 120 C)C) oe ( oe ( 100 C) 100 mperaturmperatur 6800 17040 V0 V V oerature ( 6800 17040 0V V V ee p TT m 40 Te 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 25. IRS2108 vs. Frequency (IRFBC20), Figure 26. IRS2108 vs. Frequency (IRFBC30), R =33 Ω, V =15 V R =22 Ω, V =15 V gate CC gate CC www.irf.com 16

IRS2108/IRS21084(S)PbF 140 140 140 V 70 V 0 V 120 120 operature (C) 18000 14700 V V oerature (C) 10800 Tem 60 0 V emp 60 T 40 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 27. IRS2108 vs. Frequency (IRFBC40), Figure 28. IRS2108 vs. Frequency (IRFPE50), R =15 Ω, V =15 V R =10 Ω, V =15 V gate CC gate CC 140 140 120 120 oerature (C) 10800 ()operature (C) 18000 mp 60 140 V pem 140 V Te T 60 70 V 70 V 40 0 V 40 0 V 20 1 10 100 1000 20 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 29. IRS21084 vs. Frequency (IRFBC20), Figure 30. IRS21084 vs. Frequency (IRFBC30), Rgate=33 Ω, VCC=15 V Rgate=22 Ω, VCC=15 V www.irf.com 17

IRS2108/IRS21084(S)PbF 140 140 V 140 120 120 70 V C) 100 C) 100 oe ( 140 V oe ( 0 V ur 80 ur 80 at 70 V at mper 60 0 V mper 60 Te 40 Te 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 31. IRS21084 vs. Frequency (IRFBC40), Figure 32. IRS21084 vs. Frequency (IRFPE50), Rgate=15 Ω, VCC=15 V Rgate=10 Ω, VCC=15 V 140 140 120 120 C) 100 C) 100 140 V o mperature ( 6800 07140 V0 V V omperature ( 6800 7 00 VV e T 40 e T 40 20 1 10 100 1000 20 Frequency (kHz) 1 10 100 1000 Frequency (kHz) Figure 33. IRS2108S vs. Frequency (IRFBC20), Figure 34. IRS2108S vs. Frequency (IRFBC30), Rgate=33 Ω, VCC=15 V R =22 Ω, V =15 V gate CC www.irf.com 18

IRS2108/IRS21084(S)PbF 140 V 70 V 0 V 140 V 70 V 140 140 120 120 C) oe (C) 100 0 V oure ( 100 ur at 80 at 80 er per mp 60 m 60 e e T T 40 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 35. IRS2108S vs. Frequency (IRFBC40), Figure 36. IRS2108S vs. Frequency (IRFPE50), Rgate=15 Ω, VCC=15 V Rgate=10 Ω, VCC=15 V 140 140 120 120 oC) 100 C) 100 ature ( 80 oure ( 80 140 V er at emp 60 1 7400 VV mper 60 70 V T 40 0 V Te 0 V 40 20 1 10 100 1000 20 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 37. IRS21084S vs. Frequency (IRFBC20), Figure 38. IR21084S vs. Frequency (IRFBC30), R =33 Ω, V =15 V R =22 Ω, V =15 V gate CC gate CC www.irf.com 19

IRS2108/IRS21084(S)PbF 140 140 140 V 70 V 0 V 120 120 omperature (C) 1068000 1 7 040 0 VV V oC)mperature ( 1068000 Te Te 40 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 39. IRS21084S vs. Frequency (IRFBC40), Figure 40. IRS21084S vs. Frequency (IRFPE50), R =15 Ω, V =15 V R =10 Ω, V =15 V gate CC gate CC www.irf.com 20

IRS2108/IRS21084(S)PbF Case outlines 01-6014 8-Lead PDIP 01-3003 01 (MS-001AB) INCHES MILLIMETERS D B DIM MIN MAX MIN MAX A 5 FOOTPRINT A .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 8X 0.72 [.028] b .013 .020 0.33 0.51 8 7 6 5 c .0075 .0098 0.19 0.25 6 H D .189 .1968 4.80 5.00 E 0.25 [.010] A E .1497 .1574 3.80 4.00 1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC e1 .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 6X e 3X 1.27 [.050] 8X 1.78 [.070] y 0° 8° 0° 8° e1 K x 45° A C y 0.10 [.004] 8X b A1 8X L 8X c 7 0.25 [.010] C A B NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. A SUBSTRATE. 01-6027 8-Lead SOIC 01-0021 11 (MS-012AA) www.irf.com 21

IRS2108/IRS21084(S)PbF 01-6010 14 Lead PDIP 01-3002 03 (MS-001AC) 01-6019 14-Lead SOIC (narrow body) 01-3063 00 (MS-012AB) www.irf.com 22

IRS2108/IRS21084(S)PbF Tape & Reel LOADED TAPE FEED DI RECTION 8-lead SOIC B AA H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 8SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 11.70 12.30 0.46 0.484 D 5.45 5.55 0.214 0.218 E 6.30 6.50 0.248 0.255 F 5.10 5.30 0.200 0.208 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D B C A E G H REEL DIMENSIONS FOR 8SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 18.40 n/a 0.724 G 14.50 17.10 0.570 0.673 H 12.40 14.40 0.488 0.566 www.irf.com 23

IRS2108/IRS21084(S)PbF Tape & Reel 14-lead SOIC LOADED TAPE FEED D IRECTION B AA H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 14SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 15.70 16.30 0.618 0.641 D 7.40 7.60 0.291 0.299 E 6.40 6.60 0.252 0.260 F 9.40 9.60 0.370 0.378 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D B C A E G H REEL DIMENSIONS FOR 14SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724 www.irf.com 24

IRS2108/IRS21084(S)PbF LEADFREE PART MARKING INFORMATION Part number IRSxxxxxx YWW? Date code IR logo ?XXXX Pin 1 Identifier Lot Code ? MARKING CODE (Prod mode - 4 digit SPN code) P Lead Free Released Non-Lead Free Released Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead PDIP IRS2108PbF 14-Lead PDIP IRS21084PbF 8-Lead SOIC IRS2108SPbF 14-Lead SOIC IRS21084SPbF 8-Lead SOIC Tape & Reel IRS2108STRPbF 14-Lead SOIC Tape & Reel IRS21084STRPbF SOIC8 &14 are MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 Data and specifications subject to change without notice. 12/4/2006 www.irf.com 25

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: I nfineon: IRS2108SPBF IRS21084SPBF IRS21084PBF IRS21084STRPBF IRS2108PBF IRS2108STRPBF