IRFL214, SiHFL214 www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY • Surface mount VDS (V) 250 • Available in tape and reel RDS(on) () VGS = 10 V 2.0 • Dynamic dV/dt rating Q (Max.) (nC) 8.2 • Repetitive avalanche rated g • Fast switching Q (nC) 1.8 gs • Ease of paralleling Available Q (nC) 4.5 gd • Simple drive requirements Configuration Single • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 D DESCRIPTION Third generation power MOSFETs from Vishay provide the SOT-223 designer with the best combination of fast switching, ruggedized device design, low on-resistance and D cost-effectiveness. G The SOT-223 package is designed for surface-mounting S D using vapor phase, infrared, or wave soldering techniques. G Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but Marking code: FD S has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of N-Channel MOSFET greater than 1.25 W is possible in a typical surface mount application. ORDERING INFORMATION Package SOT-223 SOT-223 Lead (Pb)-free and Halogen-free SiHFL214-GE3 SiHFL214TR-GE3 a IRFL214PbF IRFL214TRPbF a Lead (Pb)-free SiHFL214-E3 SiHFL214T-E3 a Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted) C PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V 250 DS V Gate-Source Voltage V ± 20 GS T = 25 °C 0.79 C Continuous Drain Current V at 10 V I GS D T = 100 °C 0.50 A C Pulsed Drain Current a I 6.3 DM Linear Derating Factor 0.025 W/°C Linear Derating Factor (PCB Mount) e 0.017 Single Pulse Avalanche Energy b E 50 mJ AS Repetitive Avalanche Current a I 0.79 A AR Repetitive Avalanche Energy a E 0.31 mJ AR Maximum Power Dissipation T = 25 °C 3.1 C P W Maximum Power Dissipation (PCB Mount) e T = 25 °C D 2.0 A Peak Diode Recovery dV/dt c dV/dt 4.8 V/ns Operating Junction and Storage Temperature Range T , T -55 to +150 J stg °C Soldering Recommendations (Peak Temperature) d for 10 s 300 Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 128 mH, Rg = 25 , IAS = 0.79 A (see fig. 12). c. ISD  2.7 A, dI/dt  65 A/μs, VDD  VDS, TJ  150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). S14-1685-Rev. E, 18-Aug-14 1 Document Number: 91194 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

IRFL214, SiHFL214 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL MIN. TYP. MAX. UNIT Maximum Junction-to-Ambient  R - - 60 (PCB Mount) a thJA °C/W Maximum Junction-to-Case (Drain) R - - 40 thJC Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (T = 25 °C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 μA 250 - - V DS GS D VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.39 - V/°C Gate-Source Threshold Voltage V V = V , I = 250 μA 2.0 - 4.0 V GS(th) DS GS D Gate-Source Leakage I V = ± 20 V - - ± 100 nA GSS GS V = 250 V, V = 0 V - - 25 DS GS Zero Gate Voltage Drain Current I μA DSS V = 200 V, V = 0 V, T = 125 °C - - 250 DS GS J Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 0.47 A b - - 2.0  Forward Transconductance g V = 50 V, I = 0.47 A 0.50 - - S fs DS D Dynamic Input Capacitance C - 140 - iss V = 0 V, GS Output Capacitance C V = 25 V, - 42 - pF oss DS f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance C - 9.6 - rss Total Gate Charge Q - - 8.2 g I = 2.7 A, V = 200 V, Gate-Source Charge Q V = 10 V D DS - - 1.8 nC gs GS see fig. 6 and 13 b Gate-Drain Charge Q - - 4.5 gd Turn-On Delay Time t - 7.0 - d(on) Rise Time tr VDD = 125 V, ID = 2.7 A, - 7.6 - ns Turn-Off Delay Time td(off) Rg = 24 , RD = 45 , see fig. 10 b - 16 - Fall Time t - 7.0 - f Internal Drain Inductance LD Between lead, D - 4.0 - 6 mm (0.25") from nH Internal Source Inductance LS package and center of G - 6.0 - die contact S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I MOSFET symbol - - 0.79 S D showing the  integral reverse A Pulsed Diode Forward Current a I G - - 6.3 SM p - n junction diode S Body Diode Voltage V T = 25 °C, I = 0.79 A, V = 0 V b - - 2.0 V SD J S GS Body Diode Reverse Recovery Time t - 190 390 ns rr T = 25 °C, I = 2.7 A, dI/dt = 100 A/μs b J F Body Diode Reverse Recovery Charge Q - 0.64 1.3 μC rr Forward Turn-On Time t Intrinsic turn-on time is negligible (turn-on is dominated by L and L ) on S D Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. S14-1685-Rev. E, 18-Aug-14 2 Document Number: 91194 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

IRFL214, SiHFL214 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S14-1685-Rev. E, 18-Aug-14 3 Document Number: 91194 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

IRFL214, SiHFL214 www.vishay.com Vishay Siliconix Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature R D V DS V GS D.U.T. R g + -VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit V DS 90 % 10 % Fig. 8 - Maximum Safe Operating Area V GS t t t t d(on) r d(off) f Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case S14-1685-Rev. E, 18-Aug-14 4 Document Number: 91194 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

IRFL214, SiHFL214 www.vishay.com Vishay Siliconix L V V DS DS Vary tp to obtain tp required I AS V DD Rg D.U.T. + V - DD V DS I AS 10 V t 0.01 Ω p I AS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. Q 50 kΩ G VGS 12 V 0.2 µF 0.3 µF QGS QGD + V D.U.T. - DS V G V GS 3 mA Charge I I G D Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit S14-1685-Rev. E, 18-Aug-14 5 Document Number: 91194 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

IRFL214, SiHFL214 www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations D.U.T. (cid:129) Low stray inductance (cid:129) Ground plane (cid:129) Low leakage inductance current transformer - + - + - Rg (cid:129) dV/dt controlled by Rg + (cid:129) Driver same type as D.U.T. V - DD (cid:129) ISD controlled by duty factor “D” (cid:129) D.U.T. - device under test Driver gate drive Period D = P.W. P.W. Period V = 10 Va GS D.U.T. l waveform SD Reverse recovery Body diode forward current current dI/dt D.U.T. V waveform DS Diode recovery dV/dt V DD Re-applied voltage Body diode forward drop Inductor current Ripple ≤ 5 % ISD Note a. V = 5 V for logic level devices GS Fig.14 - For N-Channel       Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91194. S14-1685-Rev. E, 18-Aug-14 6 Document Number: 91194 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Package Information Vishay Siliconix SOT-223 (HIGH VOLTAGE) D B A 3 0.08 (0.003) B1 C 00..1100 ((00..000044))MMCC BMM A 4 3 H E 0.20 (0.008)MC AM L1 1 2 3 4 x L 3 x B e θ 0.10 (0.004)MC BM e1 4 x C MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. A 1.55 1.80 0.061 0.071 B 0.65 0.85 0.026 0.033 B1 2.95 3.15 0.116 0.124 C 0.25 0.35 0.010 0.014 D 6.30 6.70 0.248 0.264 E 3.30 3.70 0.130 0.146 e 2.30 BSC 0.0905 BSC e1 4.60 BSC 0.181 BSC H 6.71 7.29 0.264 0.287 L 0.91 - 0.036 - L1 0.061 BSC 0.0024 BSC θ - 10' - 10' ECN: S-82109-Rev. A, 15-Sep-08 DWG: 5969 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension do not include mold flash. 4. Outline conforms to JEDEC outline TO-261AA. Document Number: 91363 www.vishay.com Revision: 15-Sep-08 1

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