Data Sheet No. PD60201 Rev.D IR2301(S) & (PbF) HIGH AND LOW SIDE DRIVER Features Packages • Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune • 8 Lead PDIP Gate drive supply range from 5 to 20V IR2301 • Undervoltage lockout for both channels • 3.3V, 5V and 15V input logic compatible • Matched propagation delay for both channels • Logic and power ground +/- 5V offset. • Lower di/dt gate driver for better noise immunity • 8 Lead SOIC Outputs in phase with inputs • IR2301S Also available LEAD-FREE (PbF) Description 2106/2301//2108//2109/2302/2304 Feature Comparison The IR2301(S) are high voltage, high speed (cid:2)(cid:23)(cid:15)(cid:29)(cid:29)(cid:30) power MOSFET and IGBT drivers with indepen- (cid:21)(cid:22)(cid:23)(cid:14) (cid:9)(cid:24)(cid:12)(cid:11)(cid:14) (cid:28)(cid:15)(cid:24)(cid:31)(cid:11)(cid:28)(cid:14)(cid:27)(cid:15)(cid:24) (cid:20)!(cid:22)(cid:31)(cid:30)(cid:18)(cid:27)#! $(cid:23)(cid:15)(cid:11)(cid:24)(cid:31)(cid:13)(cid:21)(cid:27)(cid:24)(cid:29) (cid:25)(cid:15)(cid:26)(cid:27)(cid:28) (cid:12)(cid:23)!"!(cid:24)(cid:14)(cid:27)(cid:15)(cid:24) dent high and low side referenced output (cid:25)(cid:15)(cid:26)(cid:27)(cid:28) channels. Proprietary HVIC and latch immune %&(cid:17)(cid:16)’%*(cid:17)& (cid:2)(cid:6)(cid:8) (cid:5)(cid:9)(cid:10)’(cid:7)(cid:9)(cid:10) (cid:24)(cid:15) (cid:24)(cid:15)(cid:24)! CMOS technologies enable ruggedized mono- %&(cid:17)(cid:16)4 (cid:1)(cid:4)(cid:4)’(cid:2)(cid:6)(cid:8) lithic construction. The logic input is compatible %&(cid:17)7 (cid:5)(cid:9)(cid:10)’(cid:7)(cid:9)(cid:10) :!(cid:29) (cid:9)(cid:24)(cid:14)!(cid:23)(cid:24)(cid:22)(cid:25)(cid:13)94(cid:17)(cid:24)(cid:29) (cid:2)(cid:6)(cid:8) %&(cid:17)74 (cid:21)(cid:23)(cid:15)(cid:26)(cid:23)(cid:22)##(cid:22);(cid:25)!(cid:13)(cid:17)<94=9(cid:13)µ(cid:29) (cid:1)(cid:4)(cid:4)’(cid:2)(cid:6)(cid:8) with standard CMOS or LSTTL output, down to %&(cid:17)>’%*(cid:17)% (cid:9)(cid:24)(cid:14)!(cid:23)(cid:24)(cid:22)(cid:25)(cid:13)94(cid:17)(cid:24)(cid:29) (cid:2)(cid:6)(cid:8) 3.3V logic. The output drivers feature a high %&(cid:17)>4 (cid:9)(cid:10)’(cid:4)(cid:20) :!(cid:29) (cid:21)(cid:23)(cid:15)(cid:26)(cid:23)(cid:22)##(cid:22);(cid:25)!(cid:13)(cid:17)<94=9(cid:13)µ(cid:29) (cid:1)(cid:4)(cid:4)’(cid:2)(cid:6)(cid:8) pulse current buffer stage designed for minimum %*(cid:17)4 (cid:5)(cid:9)(cid:10)’(cid:7)(cid:9)(cid:10) :!(cid:29) (cid:9)(cid:24)(cid:14)!(cid:23)(cid:24)(cid:22)(cid:25)(cid:13)&(cid:17)(cid:17)(cid:24)(cid:29) (cid:2)(cid:6)(cid:8) driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. Typical Connection (cid:11)(cid:12)(cid:13)(cid:14)(cid:15)(cid:13)(cid:16)(cid:17)(cid:17)(cid:1) (Refer to Lead (cid:1) Assignments for (cid:2)(cid:2) correct pin con- figuration). This/ (cid:1) (cid:1) (cid:2)(cid:2) (cid:3) T h e s e diagram(s) (cid:5)(cid:9)(cid:10) (cid:5)(cid:9)(cid:10) (cid:5)(cid:6) show electrical connections (cid:7)(cid:9)(cid:10) (cid:7)(cid:9)(cid:10) (cid:1)(cid:4) (cid:7)(cid:6)(cid:18)(cid:6)(cid:19)(cid:20) only. Please re- (cid:2)(cid:6)(cid:8) (cid:7)(cid:6) fer to our Appli- cation Notes and DesignTips for proper circuit board layout. IR2301 www.irf.com 1

IR2301(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VB High side floating absolute voltage -0.3 625 VS High side floating supply offset voltage VB - 25 VB + 0.3 VHO High side floating output voltage VS - 0.3 VB + 0.3 VCC Low side and logic fixed supply voltage -0.3 25 V VLO Low side output voltage -0.3 VCC + 0.3 VIN Logic input voltage COM - 0.3 VCC + 0.3 dVS/dt Allowable offset supply voltage transient — 50 V/ns PD Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0 W (8 lead SOIC) — 0.625 RthJA Thermal resistance, junction to ambient (8 lead PDIP) — 125 °C/W (8 lead SOIC) — 200 TJ Junction temperature — 150 TS Storage temperature -50 150 °C TL Lead temperature (soldering, 10 seconds) — 300 Recommended Operating Conditions The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. Symbol Definition Min. Max. Units VB High side floating supply absolute voltage VS + 5 VS + 20 VS High side floating supply offset voltage Note 1 600 VHO High side floating output voltage VS VB V VCC Low side and logic fixed supply voltage 5 20 VLO Low side output voltage 0 VCC VIN Logic input voltage COM VCC TA Ambient temperature -40 150 °C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). 2 www.irf.com

IR2301(S) & (PbF) Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay — 220 300 VS = 0V toff Turn-off propagation delay — 200 280 VS = 0V or 600V MT Delay matching, HS & LS turn-on/off — 0 50 nsec tr Turn-on rise time — 130 220 VS = 0V tf Turn-off fall time — 50 80 VS = 0V Static Electrical Characteristics VBIAS (VCC, VBS) = 15V, and TA = 25°C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to COM and are applicable to the respective input leads. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Min. Typ. Max. Units Test Conditions VIH Logic “1” input voltage 2.9 — — VCC = 10V to 20V VIL Logic “0” input voltage — — 0.8 VCC = 10V to 20V V VOH High level output voltage, VBIAS - VO — 0.8 1.4 IO = 20 mA VOL Low level output voltage, VO — 0.3 0.6 IO = 20 mA ILK Offset supply leakage current — — 50 VB = VS = 600V IQBS Quiescent VBS supply current 20 60 100 VIN = 0V or 5V IQCC Quiescent VCC supply current 50 120 190 µA VIN = 0V or 5V IIN+ Logic “1” input bias current — 5 20 VIN = 5V IIN- Logic “0” input bias current — — 2 VIN = 0V VCCUV+ VCC and VBS supply undervoltage positive 3.3 4.1 5 VBSUV+ going threshold VCCUV- VCC and VBS supply undervoltage negative 3 3.8 4.7 V VBSUV- negative going threshold VCCUVH Hysteresis 0.1 0.3 — VBSUVH IO+ Output high short circuit pulsed current 120 200 — VO = 0V, PW ≤ 10 µs mA IO- Output low short circuit pulsed current 250 350 — VO = 15V, PW ≤ 10 µs www.irf.com 3

IR2301(S) & (PbF) Functional Block Diagrams VB UV DETECT R HO LEHVVEL FPIULTLSEER RS Q HIN VSLSSEH/VCIFEOTLM GENPEURLASTEOR SHIFTER VS VCC UV DETECT LO VSS/COM LIN LEVEL DELAY COM SHIFT Lead Definitions Symbol Description HIN Logic input for high side gate driver output (HO), in phase LIN Logic input for low side gate driver output (LO), in phase VB High side floating supply HO High side gate drive output VS High side floating supply return VCC Low side and logic fixed supply LO Low side gate drive output COM Low side return 4 www.irf.com

IR2301(S) & (PbF) Lead Assignments 1 VCC VB 8 1 VCC VB 8 2 HIN HO 7 2 HIN HO 7 3 LIN VS 6 3 LIN VS 6 4 COM LO 5 4 COM LO 5 8 Lead PDIP 8 Lead SOIC IR2301 IR2301S (cid:5)(cid:9)(cid:10) (cid:5)(cid:9)(cid:10) 9(cid:17)] 9(cid:17)] (cid:7)(cid:9)(cid:10) (cid:7)(cid:9)(cid:10) (cid:14)(cid:15)(cid:24) (cid:14)(cid:23) (cid:14)(cid:15)^^ (cid:14)^ >(cid:17)] >(cid:17)] (cid:5)(cid:6) (cid:5)(cid:6) (cid:7)(cid:6) (cid:7)(cid:6) &(cid:17)] &(cid:17)] Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions (cid:5)(cid:9)(cid:10) 9(cid:17)] 9(cid:17)] (cid:7)(cid:9)(cid:10) (cid:7)(cid:6) (cid:5)(cid:6) &(cid:17)] (cid:8)(cid:18) (cid:8)(cid:18) >(cid:17)] (cid:7)(cid:6) (cid:5)(cid:6) Figure 3. Delay Matching Waveform Definitions www.irf.com 5

IR2301(S) & (PbF) 500 800 ns) ns) 700 ay ( 400 ay ( Max. el el 600 D D n 300 n o o 500 ati ati g Max. g pa 200 pa 400 Pro Pro Typ. n Typ. n 300 n-o 100 n-o ur ur 200 T T 0 100 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 4A. Turn-on Propagation Delay Figure 4B. Turn-on Propagation Delay vs. Temperature vs. Supply Voltage 600 700 s) s) n 500 n 600 y ( y ( ela ela Max. D 400 D 500 n n o o ati 300 ati 400 g g a a op Max. op Pr 200 Pr 300 off off Typ. urn- 100 Typ. urn- 200 T T 0 100 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 5A. Turn-off Propagation Delay Figure 5B. Turn-off Propagation Delay vs. Temperature vs. Supply Voltage 6 www.irf.com

IR2301(S) & (PbF) 500 700 600 ns) 400 ns) Max. e ( e ( 500 m m Ti 300 Ti 400 e e s s Ri Ri 300 n 200 Max. n o o n- n- 200 Typ. ur ur T 100 T Typ. 100 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 6A. Turn-on Rise Time Figure 6B. Turn-on Rise Time vs. Temperature vs. Supply Voltage 200 200 s) 150 s) 150 e (n e (n Max. m m Ti Ti all 100 all 100 F F off Max. off n- n- Typ. ur 50 ur 50 T T Typ. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 7A. Turn-off Fall Time Figure 7B. Turn-off Fall Time vs. Temperature vs. Supply Voltage www.irf.com 7

IR2301(S) & (PbF) 6 6 V) 5 V) 5 e ( e ( ag 4 ag 4 olt olt ut V 3 Max. ut V 3 Max. p p n n 1" I 2 1" I 2 c " c " gi gi Lo 1 Lo 1 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 8A. Logic “1” Input Voltage Figure 8B. Logic “1” Input Voltage vs. Temperature vs. Supply Voltage 6 6 V) 5 V) 5 e ( e ( ag 4 ag 4 olt olt V V ut 3 ut 3 p p n n Logic "0" I 12 Min. Logic "0" I 12 Min. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 9A. Logic “0” Input Voltage Figure 9B. Logic “0” Input Voltage vs. Temperature vs. Supply Voltage 8 www.irf.com

IR2301(S) & (PbF) 4 6 V) V) 5 ge ( 3 ge ( Max. a a olt olt 4 V V ut ut utp 2 utp 3 O O evel Max. evel 2 Typ. High L 1 High L 1 Typ. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 10A. High Level Output Voltage Figure 10B. High Level Output Voltage vs. Temperature vs. Supply Voltage 2.0 2.0 V) V) e ( 1.5 e ( 1.5 g g a a Volt Volt Max. put 1.0 put 1.0 ut ut O O el el Lev 0.5 Max. Lev 0.5 w w Typ. o o L L Typ. 0.0 0.0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 11A. Low Level Output Voltage Figure 11B. Low Level Output Voltage vs. Temperature vs. Supply Voltage www.irf.com 9

IR2301(S) & (PbF) 500 500 A) A) nt ( 400 nt ( 400 e e urr urr C C e 300 e 300 g g a a k k a a e e L 200 L 200 y y pl pl p p u u S 100 S 100 set Max. set Max. Off Off 0 0 -50 -25 0 25 50 75 100 125 100 200 300 400 500 600 Temperature (oC) Offset Supply Voltage (V) Figure 12A. Offset Supply Leakage Current Figure 12B. Offset Supply Leakage Current vs. Temperature vs. Supply Voltage 200 200 A) A) nt ( nt ( e 150 e 150 urr urr C C ply ply up 100 up 100 S Max. S V BS V BS ent 50 Typ. ent 50 Max. Quiesc Min. Quiesc TyMpi.n. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) V Supply Voltage (V) BS Figure 13A. Quiescent VBS Supply Current Figure 13B. Quiescent VBS Supply Current vs. Temperature vs. Supply Voltage 10 www.irf.com

IR2301(S) & (PbF) 400 400 A) A) nt ( nt ( e 300 e 300 urr urr C C y y uppl 200 Max. uppl 200 S S V CC Typ. V CC Quiescent 100 Min. Quiescent 100 MTayMxp.i.n. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) V Supply Voltage (V) CC Figure 14A. Quiescent VCC Supply Current Figure 14B. Quiescent VCC Supply Current vs. Temperature vs. VCC Supply Voltage 60 50 A) A) Bias Current ( 345000 Bias Current ( 3400 Logic "1" Input 1200 TMyapx.. Logic "1" Input 1200 TMyapx.. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 15A. Logic “1” Input Bias Current Figure 15B. Logic “1” Input Bias Current vs. Temperature vs. Supply Voltage www.irf.com 11

IR2301(S) & (PbF) 5 5 A) A) nt ( 4 nt ( 4 e e urr urr C 3 C 3 s s a a Bi Bi put 2 Max. put 2 Max. n n 0" I 0" I c " 1 c " 1 gi gi o o L L 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 16A. Logic “0” Input Bias Current Figure 16B. Logic “0” Input Bias Currentt vs. Temperature vs. Supply Voltage V) V) d (+) ( 6 d (-) ( 6 ol ol esh 5 Max. esh 5 Max. hr hr T T e e g Typ. g Typ. a a olt 4 olt 4 v v der Min. der Min. n n U U V BS3 V BS3 d d n n a a C2 C2 C C V -50 -25 0 25 50 75 100 125 V -50 -25 0 25 50 75 100 125 Temperature (oC) Temperature (oC) Figure 17. VCC and VBS Undervoltage Threshold (+) Figure 18. VCC and VBS Undervoltage Threshold (-) vs. Temperature vs. Temperature 12 www.irf.com

IR2301(S) & (PbF) 400 400 A) A) m m Current ( 300 Typ. Current ( 300 Source 200 Source 200 Output 100 Min. Output 100 Typ. Min. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 19A. Output Source Current Figure 19B. Output Source Current vs. Temperature vs. Supply Voltage 600 600 A) 500 A) 500 m m nt ( 400 Typ. nt ( 400 e e urr urr C 300 C 300 nk Min. nk Si Si ut 200 ut 200 p p Out 100 Out 100 Typ. Min. 0 0 -50 -25 0 25 50 75 100 125 5 10 15 20 Temperature (oC) Supply Voltage (V) Figure 20A. Output Sink Current Figure 20B. Output Sink Current vs. Temperature vs. Supply Voltage www.irf.com 13

IR2301(S) & (PbF) 0 140 V) Typ. et ( -2 120 s ve Off -4 oe (C)100 egati -6 atur 80 140V N r 70V V S mp 60 m -8 e 0V u T m 40 xi -10 a M 20 -12 1 10 100 1000 5 10 15 20 V Floating Supply Voltage (V) Frequency (KHz) BS Figure 21. Maximum VS Negative Offset Figure 22. IR2301 vs. Frequency (IRFBC20), vs. VBS Floating Supply Voltage R =33Ω, V =15V gate CC 140 140 120 120 ) C) operature (C 10800 1 7400VV omperature (1068000 1 7040V0VV m 60 0V e e T T 40 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (KHz) Frequency (KHz) Figure 23. IR2301 vs. Frequency (IRFBC30), Figure 24. IR2301 vs. Frequency (IRFBC40), R =22W, V =15V R =15Ω, V =15V gate cc gate CC 14 www.irf.com

IR2301(S) & (PbF) 140 140V 70V 140 0V 120 120 oe (C) 100 oe (C)100 atur 80 atur 80 140V er er mp 60 mp 60 70V e e 0V T T 40 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (KHz) Frequency (KHz) Figure 25. IR2301 vs. Frequency (IRFPE50), Figure 26. IR2301S vs. Frequency (IRFBC20), R =10Ω, V =15V R =33Ω, V =15V gate CC gate CC 140V 70V 140 140 120 120 oature (C) 18000 17 004VV0V orature (C) 10800 0V per 60 mpe 60 m e e T T 40 40 20 20 1 10 100 1000 1 10 100 1000 Frequency (KHz) Frequency (KHz) Figure 27. IR2301S vs. Frequency (IRFBC30), Figure 28. IR2301S vs. Frequency (IRFBC40), R =22Ω, V =15V R =15Ω, V =15V gate CC gate CC www.irf.com 15

IR2301(S) & (PbF) 140V 70V 0V 140 120 ) C o(100 e r etu 80 r p m 60 e T 40 20 1 10 100 1000 Frequency (KHz) Figure 29. IR2301S vs. Frequency (IRFPE50), R =10Ω, V =15V gate CC Case Outlines 01-6014 8 Lead PDIP 01-3003 01 (MS-001AB) 16 www.irf.com

IR2301(S) & (PbF) INCHES MILLIMETERS D B DIM MIN MAX MIN MAX A 5 FOOTPRINT A .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 8X 0.72 [.028] b .013 .020 0.33 0.51 8 7 6 5 c .0075 .0098 0.19 0.25 6 H D .189 .1968 4.80 5.00 E 0.25 [.010] A E .1497 .1574 3.80 4.00 1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC e1 .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 6X e 3X 1.27 [.050] 8X 1.78 [.070] y 0° 8° 0° 8° e1 K x 45° A C y 0.10 [.004] 8X b A1 8X L 8X c 7 0.25 [.010] C A B NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. A SUBSTRATE. 01-6027 8 Lead SOIC 01-0021 11 (MS-012AA) www.irf.com 17

IR2301(S) & (PbF) LEADFREE PART MARKING INFORMATION IRxxxxxx Part number YWW? Date code IR logo ?XXXX Pin 1 Identifier Lot Code ? MARKING CODE (Prod mode - 4 digit SPN code) P Lead Free Released Non-Lead Free Released Assembly site code Per SCOP 200-002 ORDER INFORMATION Basic Part (Non-Lead Free) Leadfree Part 8-Lead PDIP IR2301 order IR2301 8-Lead PDIP R2301 order IR2301PbF 8-Lead SOIC IR2301S order IR2301S 8-Lead SOIC IR2301S order IR2301SPbF This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web Site http://www.irf.com Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 9/7/2004 18 www.irf.com