Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 INA826 Precision, 200-µA Supply Current, 3-V to 36-V Supply Instrumentation Amplifier with Rail-to-Rail Output 1 Features 3 Description • InputCommon-ModeRange:IncludesV– The INA826 is a low-cost instrumentation amplifier 1 that offers extremely low power consumption and • Common-ModeRejection: operates over a very wide single or dual supply – 104dB,Min(G=10) range. A single external resistor sets any gain from 1 – 100dB,Minat5kHz(G=10) to 1000. The device offers excellent stability over temperature, even at G > 1, as a result of the low • Power-SupplyRejection:100dB,Min(G=1) gaindriftofonly35ppm/°C(max). • LowOffsetVoltage:150µV,Max The INA826 is optimized to provide excellent • GainDrift:1ppm/°C(G=1),35ppm/°C(G>1) common-mode rejection ratio of over 100 dB (G = 10) • Noise:18nV/√Hz,G ≥ 100 over frequencies up to 5 kHz. At G = 1, the common- • Bandwidth:1MHz(G=1),60kHz(G=100) mode rejection ratio exceeds 84 dB across the full input common-mode range from the negative supply • InputsProtectedUpto±40V all the way up to 1 V of the positive supply. Using a • Rail-to-RailOutput rail-to-rail output, the INA826 is well-suited for low • SupplyCurrent:200µA voltage operation from a 3-V single supply as well as • SupplyRange: dualsuppliesupto±18V. – SingleSupply:3Vto36V Additional circuitry protects the inputs against overvoltage of up to ±40 V beyond the power – DualSupply: ±1.5Vto ±18V supplies by limiting the input currents to less than • SpecifiedTemperatureRange: 8mA. –40°Cto+125°C The INA826 is available in 8-pin SOIC, VSSOP, and • Packages:8-PinVSSOP,SOIC,andWSON tiny 3-mm × 3-mm WSON surface-mount packages. All versions are specified for the –40°C to +125°C 2 Applications temperaturerange. • IndustrialProcessControls DeviceInformation(1) • CircuitBreakers PARTNUMBER PACKAGE BODYSIZE(NOM) • BatteryTesters SOIC(8) 4.90mm×3.91mm • ECGAmplifiers INA826 WSON(8) 3.00mm×3.00mm • PowerAutomation VSSOP(8) 3.00mm×3.00mm • MedicalInstrumentation (1) For all available packages, see the orderable addendum at • PortableInstrumentation theendofthedatasheet. General-PurposeInstrumentationAmplifier V+ 0.1mF 8 -IN RS(1) 1 RFI Filter 50 kW 50 kW A1 VO= G´(VIN+-VIN-) 2 24.7 kW G = 1 +49.4 kW RG RG 24.7 kW A3 7 + 3 Load VO +IN RS(1) 4 RFI Filter A2 50 kW 50 kW 6REF - Device 5 0.1mF V- (1) Thisresistorisoptionaliftheinputvoltagestaysabove[(V–)–2V]orifthesignalsourcecurrentdrivecapabilityis limitedtolessthan3.5mA;seetheInputProtectionsectionformoredetails. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.4 DeviceFunctionalModes........................................25 2 Applications........................................................... 1 9 ApplicationandImplementation........................ 26 3 Description............................................................. 1 9.1 ApplicationInformation............................................26 4 RevisionHistory..................................................... 2 9.2 TypicalApplication..................................................26 9.3 SystemExamples...................................................28 5 DeviceComparisonTable..................................... 4 10 PowerSupplyRecommendations..................... 34 6 PinConfigurationandFunctions......................... 4 11 Layout................................................................... 34 7 Specifications......................................................... 5 11.1 LayoutGuidelines.................................................34 7.1 AbsoluteMaximumRatings......................................5 11.2 LayoutExample....................................................35 7.2 ESDRatings ............................................................5 12 DeviceandDocumentationSupport................. 36 7.3 RecommendedOperatingConditions.......................5 7.4 ThermalInformation..................................................5 12.1 DocumentationSupport........................................36 7.5 ElectricalCharacteristics...........................................6 12.2 ReceivingNotificationofDocumentationUpdates36 7.6 TypicalCharacteristics..............................................8 12.3 CommunityResources..........................................36 12.4 Trademarks...........................................................36 8 DetailedDescription............................................ 18 12.5 ElectrostaticDischargeCaution............................36 8.1 Overview.................................................................18 12.6 Glossary................................................................36 8.2 FunctionalBlockDiagram.......................................18 13 Mechanical,Packaging,andOrderable 8.3 FeatureDescription.................................................19 Information........................................................... 36 4 Revision History ChangesfromRevisionE(April2013)toRevisionF Page • AddedDeviceInformationtable,ESDRatingstable,RecommendedOperatingConditionstable,Feature Descriptionsection,DeviceFunctionalModessection,ApplicationandImplementationsection,PowerSupply Recommendationssection,Layoutsection,DeviceandDocumentationSupportsection,andMechanical, Packaging,andOrderableInformationsection...................................................................................................................... 1 • AddedTIDesign .................................................................................................................................................................... 1 • Changed2.7-Vto3-Vindocumenttitle ................................................................................................................................ 1 • ChangedMSOPtoVSSOP,SOtoSOIC,andDRGtoWSONthroughoutdocument ......................................................... 1 • ChangedSupplyRangeFeaturesbulletminimumvoltagelevels ......................................................................................... 1 • ChangedPackagesFeaturesbullet ...................................................................................................................................... 1 • Changedpage1graphic ....................................................................................................................................................... 1 • ChangedDescriptionsectionforminorrewording,renamingofpackages,andchangingsinglesupplyvoltagevalue from2.7Vto3V.................................................................................................................................................................... 1 • ChangedtitleofDeviceComparisonTable ........................................................................................................................... 4 • DeletedDGKPackagePackage/OrderingInformationtable ................................................................................................. 4 • ChangedTemperatureparametersymbolsinAbsoluteMaximumRatingstable ................................................................. 5 • ChangedInput,DifferentialimpedanceandCommon-modeimpedanceparametersymbolsinElectrical Characteristicstable............................................................................................................................................................... 6 • ChangedInput,V parametertestconditionsinElectricalCharacteristicstable ................................................................ 6 CM • DeletedGain,RangeofgainparametersymbolfromElectricalCharacteristicstable ......................................................... 7 • ChangedPowerSupply,V parametertestconditionsandminimumspecificationsinElectricalCharacteristicstable ......7 S • ChangedV voltageto3.0VandredV traceto1.5VinFigure9andFigure10............................................................ 9 S REF • ChangedV voltagelevelto3.0VinFigure29 .................................................................................................................. 12 S • ChangedblueV tracevalueto3.0VinFigure36............................................................................................................. 13 S • ChangedconditionsofFigure47andFigure48 ................................................................................................................. 15 • Changed2.7Vto3Vand1.35Vto1.5VinOperatingVoltagesection ........................................................................... 24 • ChangedTINA-TIsimulationcircuitlinksinUsingTINA-TISPICE-BasedAnalogSimulationProgramwiththe INA826section..................................................................................................................................................................... 29 2 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 ChangesfromRevisionD(March2013)toRevisionE Page • DeletedpackagemarkingcolumnfromPackage/OrderingInformationtable ....................................................................... 4 ChangesfromRevisionC(March2012)toRevisionD Page • ChangedInputvoltagerangeparameterspecificationvalueinAbsoluteMaximumRatingstable....................................... 5 ChangesfromRevisionB(December2011)toRevisionC Page • ChangedproductstatusfromMixedStatustoProductionData............................................................................................ 1 • Deletedgrayshadingandfootnote2fromPackage/OrderingInformationtable .................................................................. 4 • ChangedDFN-8packagetoproductiondata ........................................................................................................................ 4 ChangesfromRevisionA(September2011)toRevisionB Page • DeletedgrayfromSO-8rowinPackage/OrderingInformation............................................................................................. 4 Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 5 Device Comparison Table DEVICE DESCRIPTION INA333 25-μVV ,0.1μV/°CV drift,1.8-Vto5-V,RRO,50-μAI ,chopper-stabilizedINA OS OS Q PGA280 20-mVto±10-VprogrammablegainIAwith3-Vor5-Vdifferentialoutput;analogsupplyupto±18V INA159 G=0.2Vdifferentialamplifierfor±10-Vto3-Vand5-Vconversion PGA112 PrecisionprogrammablegainopampwithSPI™interface 6 Pin Configuration and Functions DGKandDPackage DRGPackage 8-PinSOIC,VSSOP 8-PinWSON TopView TopView -IN 1 8 +VS -IN 1 8 +VS Exposed RG 2 7 VOUT RG 2 Thermal 7 VOUT RG 3 6 REF RG 3 Dieo nPad 6 REF +IN 4 5 -VS +IN 4 Underside 5 -VS PinFunctions PIN NO. I/O DESCRIPTION NAME SOIC, WSON VSSOP –IN 1 1 I Negative(inverting)input +IN 4 4 I Positive(noninverting)input REF 6 6 I Referenceinput.Thispinmustbedrivenbylowimpedance. 2 2 R — Gainsettingpin.Placeagainresistorbetweenpin2andpin3. G 3 3 V 7 7 O Output OUT –V 5 5 — Negativesupply S +V 8 8 — Positivesupply S 4 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Supplyvoltage –20 20 V Voltage (–V )–40 (+V )+40 S S Signalinputpins V REFpin –20 +20 Outputshort-circuit(2) Continuous Operating,T –50 150 A Temperature Junction,T 175 °C J Storage,T –65 150 stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Short-circuittoV /2. S 7.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2500 V Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1500 V (ESD) Machinemodel(MM) ±150 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT Singlesupply 3 36 Supplyvoltage V Dualsupply ±1.5 ±18 Specifiedtemperature –40 +125 °C Operatingtemperature –50 +150 °C 7.4 Thermal Information INA826 THERMALMETRIC(1) D(SOIC) DGK(VSSOP) DRG(WSON) UNIT 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 141.4 215.4 50.9 °C/W θJA R Junction-to-case(top)thermalresistance 75.4 66.3 60.0 °C/W θJC(top) R Junction-to-boardthermalresistance 59.6 97.8 25.4 °C/W θJB ψ Junction-to-topcharacterizationparameter 27.4 10.5 1.2 °C/W JT ψ Junction-to-boardcharacterizationparameter 59.1 96.1 25.5 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a 7.2 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report(SPRA953). Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 7.5 Electrical Characteristics atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF PARAMETER TESTCONDITIONS MIN TYP MAX UNIT INPUT RTI 40 150 µV VOSI Inputstageoffsetvoltage(1) vstemperature,TA=–40°Cto+125°C 0.4 2 µV/°C Outputstageoffset RTI 200 700 µV VOSO voltage(1) vstemperature,TA=–40°Cto+125°C 2 10 µV/°C G=1,RTI 100 124 G=10,RTI 115 130 PSRR Power-supplyrejectionratio dB G=100,RTI 120 140 G=1000,RTI 120 140 zid Differentialimpedance 20||1 GΩ||pF zic Common-modeimpedance 10||5 GΩ||pF RFIfilter,–3-dBfrequency 20 MHz V– (V+)–1 VCM Operatinginputrange(2) V VS=±1.5Vto±18V,TA=–40°Cto+125°C SeeFigure41toFigure44 Inputovervoltagerange TA=–40°Cto125°C ±40 V G=1,VCM=(V–)to(V+)–1V 84 95 G=10,VCM=(V–)to(V+)–1V 104 115 Atdcto G=100,VCM=(V–)to(V+)–1V 120 130 60Hz,RTI G=1000,VCM=(V–)to(V+)–1V 120 130 CMRR Common-moderejection G=1,VCM=(V–)to(V+)–1V, 80 dB ratio TA=–40°Cto+125°C G=1,VCM=(V–)to(V+)–1V 84 At5kHz, G=10,VCM=(V–)to(V+)–1V 100 RTI G=100,VCM=(V–)to(V+)–1V 105 G=1000,VCM=(V–)to(V+)–1V 105 BIASCURRENT VCM=VS/2 35 65 IB Inputbiascurrent nA TA=–40°Cto+125°C 95 VCM=VS/2 0.7 5 IOS Inputoffsetcurrent nA TA=–40°Cto+125°C 10 NOISEVOLTAGE eNI Inputstagevoltagenoise(3) f=1kHz,G=100,RS=0Ω 18 20 nV/√Hz fB=0.1Hzto10Hz,G=100,RS=0Ω 0.52 µVPP eNO Outputstagevoltagenoise(3) f=1kHz,G=1,RS=0Ω 110 115 nV/√Hz fB=0.1Hzto10Hz,G=1,RS=0Ω 3.3 µVPP f=1kHz 100 fA/√Hz In Noisecurrent fB=0.1Hzto10Hz 5 pAPP (1) Totaloffset,referred-to-input(RTI):V =(V )+(V /G). OS OSI OSO (2) InputvoltagerangeoftheINA826inputstage.Theinputrangedependsonthecommon-modevoltage,differentialvoltage,gain,and referencevoltage.SeeTypicalCharacteristiccurvesFigure9throughFigure16andFigure41throughFigure44formoreinformation. (3) e 2 (e )2+ NO NI G TotalRTIvoltagenoise= . 6 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Electrical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF PARAMETER TESTCONDITIONS MIN TYP MAX UNIT GAIN 49.4 kW G Gainequation 1 + V/V R G Rangeofgain 1 1000 V/V G=1,VO=±10V ±0.003% ±0.015% G=10,VO=±10V ±0.03% ±0.15% GE Gainerror G=100,VO=±10V ±0.04% ±0.15% G=1000,VO=±10V ±0.04% ±0.15% Gainvstemperature(4) G=1,TA=–40°Cto+125°C ±0.1 ±1 ppm/°C G>1,TA=–40°Cto+125°C ±10 ±35 G=1to100,VO=–10Vto+10V 1 5 Gainnonlinearity ppm G=1000,VO=–10Vto+10V 5 20 OUTPUT Voltageswing RL=10kΩ (V–)+0.1 (V+)–0.15 V Loadcapacitancestability 1000 pF ZO Open-loopoutputimpedance SeeFigure56 ISC Short-circuitcurrent ContinuoustoVS/2 ±16 mA FREQUENCYRESPONSE G=1 1 MHz G=10 500 BW Bandwidth,–3dB G=100 60 kHz G=1000 6 G=1,VO=±14.5V 1 SR Slewrate V/µs G=100,VO=±14.5V 1 G=1,VSTEP=10V 12 G=10,VSTEP=10V 12 0.01% G=100,VSTEP=10V 24 G=1000,VSTEP=10V 224 tS Settlingtime µs G=1,VSTEP=10V 14 G=10,VSTEP=10V 14 0.001% G=100,VSTEP=10V 31 G=1000,VSTEP=10V 278 REFERENCEINPUT RIN Inputimpedance 100 kΩ Voltagerange (V–) (V+) V Gaintooutput 1 V/V Referencegainerror 0.01% POWERSUPPLY Singlesupply 3 36 VS Power-supplyvoltage V Dualsupply ±1.5 ±18 VIN=0V 200 250 IQ Quiescentcurrent µA vstemperature,TA=–40°Cto+125°C 250 300 TEMPERATURERANGE Specified –40 125 °C Operating –50 150 °C (4) ThevaluesspecifiedforG>1donotincludetheeffectsoftheexternalgain-settingresistor,R . G Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 7.6 Typical Characteristics atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 1600 25 1400 20 1200 1000 15 nt nt u 800 u o o C C 10 600 400 5 200 0 0 000000000000000000000000000000000000000000 228866442211886644220022446688112244668822 −20−20−18−18−16−16−14−14−12−12−10−10−8−8−6−6−4−4−2−2 22446688101012121414161618182020 −−−1.−1.−1.−1.−1.−1.−1.−1.−−−0.−0.−0.−0.−0.−0.−0.−0. 0.0.0.0.0.0.0.0. 1.1.1.1.1.1.1.1. VOSI (µV) G026 VOSI Drift (µV/°C) G029 Figure1.TypicalDistributionofInputOffsetVoltage Figure2.TypicalDistributionofInputOffsetVoltageDrift 1600 25 1400 20 1200 1000 15 nt nt u 800 u o o C C 10 600 400 5 200 0 0 000000000000000000000000000000000000000000 009988776655443322110011223344556677889900 00000000000000000000 00000000000000000000 11−−−−−−−−−−−−−−−−−− 11 00998877665544332211 11223344556677889900 −− −1−1−−−−−−−−−−−−−−−−V−−OSO (µV) 11G025 VOSO Drift (m V/°C) G030 Figure3.TypicalDistributionofOutputOffsetVoltage Figure4.TypicalDistributionofOutputOffsetVoltageDrift 2000 3000 2500 1500 2000 nt nt u 1000 u 1500 o o C C 1000 500 500 0 0 7799113355779911335577991133557799113355 555544553355225511550055115522553355445555 1111222222222233333333334444444444555555 −−4.4.−−3.3.−−2.2.−−1.1.−−0.0. 0.0. 1.1. 2.2. 3.3. 4.4. −− −− −− −− −− IB (nA) G027 IOS (nA) G028 Figure5.TypicalDistributionofInputBiasCurrent Figure6.TypicalDistributionofInputOffsetCurrent 8 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 32000 16000 Wafer Probe Data Wafer Probe Data 28000 14000 24000 12000 20000 10000 nt nt u 16000 u 8000 o o C C 12000 6000 8000 4000 4000 2000 0 0 119988776655443322110011223344556677889911 009988776655443322110099887766554433221100 −−−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0.−0. 0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0. −2−2−1−1−1−1−1−1−1−1−1−1−1−1−1−1−1−1−1−1−1−1−−−−−−−−−−−−−−−−−− Gain Error Drift (ppm/°C) Gain Error Drift (ppm/°C) G052 G051 Figure7.TypicalGainErrorDriftDistribution(G=1) Figure8.TypicalGainErrorDriftDistribution(G>1) Singlesupply Singlesupply Figure9.InputCommon-ModeVoltagevsOutputVoltage Figure10.InputCommon-ModeVoltagevsOutputVoltage 5 5 4.5 VS = 5 V, G = 1 VREF = 0 V 4.5 VS = 5 V, G = 100 VREF = 0 V V) 4 VREF = 2.5 V V) 4 VREF = 2.5 V e ( 3.5 e ( 3.5 g g a 3 a 3 olt olt V 2.5 V 2.5 e e d 2 d 2 o o M 1.5 M 1.5 − − on 1 on 1 m m m 0.5 m 0.5 o o C 0 C 0 −0.5 −0.5 −1 −1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Output Voltage (V) Output Voltage (V) G034 G037 Singlesupply Singlesupply Figure11.InputCommon-ModeVoltagevsOutputVoltage Figure12.InputCommon-ModeVoltagevsOutputVoltage Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 3 5 VS = ±3.3 V G = 1 4 VS = ±5 V G = 1 2 VREF= 0 V G = 100 VREF= 0 V G = 100 V) V) 3 ge ( 1 ge ( 2 a a olt olt 1 V 0 V e e 0 d d Mo −1 Mo −1 − − n n −2 o o m −2 m −3 m m Co Co −4 −3 −5 −4 −6 −4 −3 −2 −1 0 1 2 3 4 −6 −5 −4 −3 −2 −1 0 1 2 3 4 5 6 Output Voltage (V) Output Voltage (V) G039 G038 Dualsupply Dualsupply Figure13.InputCommon-ModeVoltagevsOutputVoltage Figure14.InputCommon-ModeVoltagevsOutputVoltage 16 16 14 G = 1, VREF= 0 V VS= ±15 V 14 G = 100, VREF= 0 V VS= ±15 V 12 VS= ±12 V 12 VS= ±12 V V) 10 V) 10 e ( 8 e ( 8 ag 6 ag 6 olt 4 olt 4 e V 2 e V 2 d 0 d 0 o o M −2 M −2 n− −4 n− −4 mo −6 mo −6 m −8 m −8 Co −10 Co −10 −12 −12 −14 −14 −16 −16 −16−14−12−10−8 −6 −4 −2 0 2 4 6 8 10 12 14 16 −16−14−12−10−8 −6 −4 −2 0 2 4 6 8 10 12 14 16 Output Voltage (V) Output Voltage (V) G040 G040 Dualsupply Dualsupply Figure15.InputCommon-ModeVoltagevsOutputVoltage Figure16.InputCommon-ModeVoltagevsOutputVoltage 12m 16 8m 16 RS = 10k W 9m 12 6m 12 6m 8 4m 8 nput Current (A) −33mm0 −044 utput Voltage (V) nput Current (A) −22mm0 −044 utput Voltage (V) I O I O −6m −8 −4m −8 −9m IIN −12 −6m IIN −12 RS = 0 W VOUT VOUT −12m −16 −8m −16 −40−35−30−25−20−15−10−5 0 5 10 15 20 25 30 35 40 −40−35−30−25−20−15−10−5 0 5 10 15 20 25 30 35 40 Input Voltage (V) Input Voltage (V) G065 G064 G=1,V =±15V G=1,V =±15V S S Figure17.InputOvervoltagevsInputCurrent Figure18.InputOvervoltagevsInputCurrent with10-kΩResistance 10 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 160 140 B) B) o (d 140 o (d 120 ati 120 ati R R 100 n n ectio 100 ectio 80 ej 80 ej R R e e 60 od 60 od M M n− 40 G = 1 n− 40 G = 1 mo G = 10 mo G = 10 m 20 G = 100 m 20 G = 100 o o C G = 1000 C G = 1000 0 0 10 100 1k 10k 100k 10 100 1k 10k 100k Frequency (Hz) Frequency (Hz) G001 G002 Figure19.CMRRvsFrequency(RTI) Figure20.CMRRvsFrequency (RTI,1-kΩSourceImbalance) 160 160 140 140 Positive Power−SupplyRejection Ratio (dB) 114680200000 GG == 110 Negative Power−SupplyRejection Ratio (dB) 114680200000 GG == 110 20 G = 100 20 G = 100 G = 1000 G = 1000 0 0 10 100 1k 10k 100k 10 100 1k 10k 100k Frequency (Hz) Frequency (Hz) G003 G004 Figure21.PositivePSRRvsFrequency(RTI) Figure22.NegativePSRRvsFrequency(RTI) 70 1k G = 1 G = 1 60 G = 10 G = 10 50 G = 100 G = 100 40 G = 1000 Hz) G = 1000 V/ ain (dB) 2300 Noise (n 100 G 10 e g 0 olta −10 V −20 −30 10 10 100 1k 10k 100k 1M 10M 1 10 100 1k 10k 100k Frequency (Hz) Frequency (Hz) G005 G019 Figure23.GainvsFrequency Figure24.VoltageNoiseSpectralDensity vsFrequency(RTI) Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 1k 3 2 z) H e (fA/ V/div) 1 ent Nois 100 Noise (µ −10 urr C −2 10 −3 1 10 100 1k 10k 0 1 2 3 4 5 6 7 8 9 10 Frequency (Hz) Time (s/div) G020 G007 Figure25.CurrentNoiseSpectralDensityvsFrequency Figure26. 0.1-Hzto10-HzRTIVoltageNoise(G=1) (RTI) 400 15 300 10 200 div) 100 div) 5 V/ A/ e (n 0 e (p 0 s s oi −100 oi N N −5 −200 −10 −300 −400 −15 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 Time (s/div) Time (s/div) G006 G008 Figure27.0.1-Hzto10-HzRTIVoltageNoise(G=1000) Figure28.0.1-Hzto10-HzRTICurrentNoise 0 0 −40°C −40°C −10 +25°C −10 +25°C +125°C +125°C A) −20 A) −20 n n nt ( −30 nt ( −30 e e urr urr C −40 C −40 s s a a Bi −50 Bi −50 ut ut np −60 np −60 I I −70 −70 −80 −80 −1 −0.5 0 0.5 1 1.5 2 2.5 3 −16 −12 −8 −4 0 4 8 12 16 Common Mode Voltage (V) Common Mode Voltage (V) G056 G055 V =3.0V V =±15V S S Figure29.InputBiasCurrentvsCommon-ModeVoltage Figure30.InputBiasCurrentvsCommon-ModeVoltage 12 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 100 10 Representative Data Max Data 90 8 A) 80 nA) 6 MUninit D1ata − I (nB 70 − I (OS 4 UUnniitt 23 nt 60 nt 2 e e urr 50 urr 0 C C nput Bias 234000 put Offset −−−642 I n 10 I −8 0 −10 −50 −25 0 25 50 75 100 125 150 −50 −25 0 25 50 75 100 125 150 Temperature (°C) Temperature (°C) G033 G053 Figure31.InputBiasCurrentvsTemperature Figure32.InputOffsetCurrentvsTemperature 40 2000 30 1500 20 1000 m) 10 m) p p 500 p 0 p Error ( −10 Error ( 0 n −20 n −500 ai ai G −30 G −1000 −40 Representative Data −1500 Representative Data −50 Normalized at +25°C Normalized at +25°C −60 −2000 −50 −25 0 25 50 75 100 125 150 −50 −25 0 25 50 75 100 125 150 Temperature (°C) Temperature (°C) G031 G054 Figure33.GainErrorvsTemperature(G=1) Figure34.GainErrorvsTemperature(G>1) 10 8 6 4 V) V/ 2 µ R ( 0 R M −2 C −4 −6 Representative Data −8 Normalized at +25°C −10 −50 −25 0 25 50 75 100 125 150 Temperature (°C) G032 Figure35.CMRRvsTemperature(G=1) Figure36.SupplyCurrentvsTemperature Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 4 4 3 3 m) m) p p p p y ( y ( arit 2 arit 2 e e n n nli nli o o N N 1 1 0 0 −10 −8 −6 −4 −2 0 2 4 6 8 10 −10 −8 −6 −4 −2 0 2 4 6 8 10 Output Voltage (V) Output Voltage (V) G021 G022 Figure37.GainNonlinearity(G=1) Figure38.GainNonlinearity(G=10) −10 0 −11 −2 −12 −4 m) −13 m) −6 p p y (p −14 y (p −8 arit −15 arit −10 e e n −16 n −12 nli nli No −17 No −14 −18 −16 −19 −18 −20 −20 −10 −8 −6 −4 −2 0 2 4 6 8 10 −10 −8 −6 −4 −2 0 2 4 6 8 10 Output Voltage (V) Output Voltage (V) G023 G024 Figure39.GainNonlinearity(G=100) Figure40.GainNonlinearity(G=1000) 400 100 350 VS = ±15 V −50°C 50 VS = ±15 V −40°C 300 +25°C 0 V) 250 +85°C V) −50 µ +125°C µ e ( 200 +150°C e ( −100 g g a a olt 150 olt −150 V V et 100 et −200 −50°C Offs 50 Offs −250 −+4205°°CC 0 −300 +85°C +125°C −50 −350 +150°C −100 −400 −15.5 −15.3 −15.1 −14.9 −14.7 −14.5 13.8 13.9 14 14.1 14.2 14.3 14.4 Common Mode Voltage (V) Common Mode Voltage (V) G057 G058 Figure41.OffsetVoltagevsNegativeCommon-Mode Figure42.OffsetVoltagevsPositiveCommon-Mode Voltage Voltage 14 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF Figure43.OffsetVoltagevsNegativeCommon-Mode Figure44.OffsetVoltagevsPositiveCommon-Mode Voltage Voltage 15 −14 −50°C −40°C 14.8 −14.2 +25°C +85°C ge (V) 14.6 ge (V) −14.4 ++112550°°CC a a olt olt V V ut 14.4 −50°C ut −14.6 p p ut −40°C ut O +25°C O 14.2 +85°C −14.8 +125°C +150°C 14 −15 0 2 4 6 8 10 12 14 16 0 2 4 6 8 10 12 14 16 Output Current (mA) Output Current (mA) G045 G046 V =±15V V =±15V S S Figure45.PositiveOutputVoltageSwingvsOutputCurrent Figure46.NegativeOutputVoltageSwingvsOutputCurrent Figure47.PositiveOutputVoltageSwingvsOutputCurrent Figure48.NegativeOutputVoltageSwingvsOutputCurrent Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 30 25 27 VS = ±15 V 0.01% VS = +5 V 0.001% 24 21 V) 21 s) ge ( 18 e (µ 17 a m olt 15 Ti Output V 192 Settling 13 6 9 3 0 5 1k 10k 100k 1M 2 4 6 8 10 12 14 16 18 20 Frequency (Hz) Step Size (V) G014 G061 V =±15V S Figure49.Large-SignalFrequencyResponse Figure50.SettlingTimevsStepSize 100 100 80 80 60 60 40 40 V) V) m 20 0 pF m 20 de ( 0 100 pF de ( 0 u u plit −20 220 pF plit −20 m m A −40 500 pF A −40 −60 1 nF −60 −80 −80 −100 −100 0 8 16 24 32 40 48 0 5 10 15 20 25 30 35 40 Time (ps) time (us) G013 G009 G=1,R =1kΩ,C =100pF L L Figure51.Small-SignalResponseOverCapacitiveLoads Figure52.Small-SignalResponse (G=1) 100 100 80 80 60 60 40 40 V) V) m 20 m 20 e ( e ( d 0 d 0 u u plit −20 plit −20 m m A −40 A −40 −60 −60 −80 −80 −100 −100 0 5 10 15 20 25 30 35 40 0 20 40 60 80 100 120 140 160 180 200 time (us) time (us) G010 G011 G=10,R =10kΩ,C =100pF G=100,R =10kΩ,C =100pF L L L L Figure53.Small-SignalResponse Figure54.Small-SignalResponse 16 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Typical Characteristics (continued) atT =25°C,V =±15V,R =10kΩ,V =0V,andG=1(unlessotherwisenoted) A S L REF 100 100k 80 60 40 V) 10k m 20 e ( ) plitud −200 WZ (O m A −40 1k −60 −80 −100 100 0 100 200 300 400 500 600 700 800 900 1000 1 10 100 1k 10k 100k 1M 10M time (us) Frequency (Hz) G012 G062 G=1000,R =10kΩ,C =100pF L L Figure55.Small-SignalResponse Figure56.Open-LoopOutputImpedance 15 V) µ e ( 10 g a Volt 5 et s Off 0 ut p n In −5 e i g n −10 a h C −15 0 2 4 6 8 10 12 14 16 Warm−up Time (s) G063 Figure57.ChangeinInputOffsetVoltagevsWarm-UpTime Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 8 Detailed Description 8.1 Overview The Functional Block Diagram section shows the basic connections required for operation of the INA826. Good layoutpracticemandatestheuseofbypasscapacitorsplacedasclosetothedevicepinsaspossible. The output of the INA826 is referred to the output reference (REF) terminal, which is normally grounded. This connection must be low-impedance to assure good common-mode rejection. Although 5 Ω or less of stray resistance can be tolerated when maintaining specified CMRR, small stray resistances of tens of ohms in series withtheREFpincancausenoticeabledegradationinCMRR. 8.2 Functional Block Diagram V+ 0.1mF 8 R (1) S 1 -IN RFI Filter 50 kW 50 kW A 1 V = G´(V -V ) O IN+ IN- 2 49.4 kW 24.7 kW G = 1 + R G 7 R A G 3 24.7 kW + 3 Load VO - 50 kW 50 kW R (1) A 6 S 2 4 REF +IN RFI Filter Device 5 0.1mF Also drawn in simplified form: V- -IN RG Device VO REF +IN Copyright © 2016,Texas Instruments Incorporated (1) Thisresistorisoptionaliftheinputvoltagestaysabove[(V–)–2V]orifthesignalsourcecurrentdrivecapabilityis limitedtolessthan3.5mA;seetheInputProtectionsectionformoredetails. 18 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 8.3 Feature Description 8.3.1 InsidetheINA826 See the Functional Block Diagramsection for a simplified representation of the INA826. A more detailed diagram (showninFigure58)providesadditionalinsightintotheINA826operation. Each input is protected by two field-effect transistors (FETs) that provide a low series resistance under normal signal conditions, and preserve excellent noise performance. When excessive voltage is applied, these transistorslimitinputcurrenttoapproximately8mA. The differential input voltage is buffered by Q and Q and is impressed across R , causing a signal current to 1 2 G flow through R , R , and R . The output difference amplifier, A , removes the common-mode component of the G 1 2 3 inputsignalandreferstheoutputsignaltotheREFterminal. The equations shown in Figure 58 describe the output voltages of A and A . The V and voltage drop across 1 2 BE R andR produceoutputvoltagesonA andA thatareapproximately0.8Vhigherthantheinputvoltages. 1 2 1 2 V+ V+ R G (External) 50 kW R R AA12OOuutt == VVCCMM++ VVBBEE++ 00..112255 VV +- VVDD//22´´GG 24.7 kW1 V- V- 242.7 kW 50 kW V+ Output Swing RangeA,A, (V+)-0.1 V to (V-) + 0.1 V 1 2 50 kW A3 VOUT V+ VO= G´(VIN+-VIN-) + VREF V- Linear Input RangeA = (V+)-0.9 V to (V-) + 0.1 V 50 kW 3 REF V- V+ V+ -IN Q Q 1 2 VD/2 Overvoltage V- C1 A1 A2 C2 V- Overvoltage Protection Protection R V R V B B B CM V /2 D V- +IN Copyright © 2016,Texas Instruments Incorporated Figure58. INA826SimplifiedCircuitDiagram Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com Feature Description (continued) 8.3.2 SettingtheGain Gain of the INA826 is set by a single external resistor, R , connected between pins 2 and 3. The value of R is G G selectedaccordingtoEquation1: 49.4 kW G = 1 + R G (1) Table 1 lists several commonly-used gains and resistor values. The 49.4-kΩ term in Equation 1 comes from the sum of the two internal 24.7-kΩ feedback resistors. These on-chip resistors are laser-trimmed to accurate absolute values. The accuracy and temperature coefficients of these resistors are included in the gain accuracy anddriftspecificationsoftheINA826. Table1.Commonly-UsedGainsandResistorValues DESIREDGAIN(V/V) R (Ω) NEAREST1%R (Ω) G G 1 — — 2 49.4k 49.9k 5 12.35k 12.4k 10 5.489k 5.49k 20 2.600k 2.61k 50 1.008k 1k 100 499 499 200 248 249 500 99 100 1000 49.5 49.9 8.3.2.1 GainDrift The stability and temperature drift of the external gain setting resistor, R , also affects gain. The contribution of G R togainaccuracyanddriftcanbedirectlyinferredfromthegainofEquation1. G Thebestgaindriftof1ppm/℃canbeachievedwhentheINA826usesG=1withoutR connected.Inthiscase, G the gain drift is limited only by the slight mismatch of the temperature coefficient of the integrated 50-kΩ resistors inthedifferentialamplifier(A ).AtGgreaterthan1,thegaindriftincreasesasaresultoftheindividualdriftofthe 3 24.7-kΩ resistors in the feedback of A and A , relative to the drift of the external gain resistor R . Process 1 2 G improvements of the temperature coefficient of the feedback resistors now make possible specifying a maximum gain drift of the feedback resistors of 35 ppm/℃, thus significantly improving the overall temperature stability of applicationsusinggainsgreaterthan1. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error (such as a possible unstable gain error) at gains of approximately 100 or greater. To ensure stability, avoid parasitic capacitance of more than a few picofarads at R connections. G Careful matching of any parasitics on both R pins maintains optimal CMRR over frequency; see the Typical G Characteristicscurves(Figure19andFigure20). 20 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 8.3.3 OffsetTrimming Most applications require no external offset adjustment; however, if necessary, adjustments can be made by applying a voltage to the REF terminal. Figure 59 shows an optional circuit for trimming the output offset voltage. The voltage applied to the REF terminal is summed at the output. The op amp buffer provides low impedance at theREFterminaltopreservegoodcommon-moderejection. V IN- V+ RG INA826 VO 100mA REF 1/2 REF200 V IN+ 100W OPA333 ±10 mV 10 kW Adjustment Range 100W 100mA 1/2 REF200 V- Figure59. OptionalTrimmingoftheOutputOffsetVoltage 8.3.4 InputCommon-ModeRange The linear input voltage range of the INA826 input circuitry extends from the negative supply voltage to 1 V below the positive supply and maintains 84-dB (minimum) common-mode rejection throughout this range. The common-mode range for most common operating conditions is described in the input common-mode voltage versus output voltage Typical Characteristics curves (Figure 9 through Figure 15) and the offset voltage versus common-mode voltage curves (Figure 41 through Figure 43). The INA826 can operate over a wide range of power supplies and V configurations, thus providing a comprehensive guide to common-mode range limits for REF allpossibleconditionsisimpractical. The most commonly overlooked overload condition occurs when a circuit exceeds the output swing of A and A , 1 2 which are internal circuit nodes that cannot be measured. Calculating the expected voltages at the output of A 1 andA (seeFigure58)providesacheckforthemostcommonoverloadconditions.ThedesignsofA andA are 2 1 2 identicalandtheoutputscanswingtowithinapproximately100mVofthepower-supplyrails.Forexample,when the A output is saturated, A can still be in linear operation, responding to changes in the noninverting input 2 1 voltage.Thisdifferencecangivetheappearanceoflinearoperationbuttheoutputvoltageisinvalid. A single-supply instrumentation amplifier has special design considerations. To achieve a common-mode range that extends to single-supply ground, the INA826 employs a current-feedback topology with PNP input transistors;seeFigure58.ThematchedPNPtransistorsQ andQ shifttheinputvoltagesofbothinputsupbya 1 2 diode drop, and (through the feedback network) shift the output of A and A by approximately 0.8 V. With both 1 2 inputs and V at single-supply ground (negative power supply), the output of A and A is well within the linear REF 1 2 range,allowingdifferentialmeasurementstobemadeattheGNDlevel.Asaresultofthisinputlevel-shifting,the voltages at pin 2 and pin 3 are not equal to the respective input terminal voltages (pin 1 and pin 4). For most applications,thisinequalityisnotimportantbecauseonlythegain-settingresistorconnectstothesepins. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 8.3.5 InputProtection The inputs of the INA826 are individually protected for voltages up to ±40 V. For example, a condition of –40 V on one input and 40 V on the other input does not cause damage. However, if the input voltage exceeds (V–) – 2 V and the signal source current drive capability exceeds 3.5 mA, the output voltage switches to the opposite polarity; see Figure 17. This polarity reversal can easily be avoided by adding resistance of 10 kΩ in series with bothinputs. Internal circuitry on each input provides low series impedance under normal signal conditions. If the input is overloaded, the protection circuitry limits the input current to a safe value of approximately 8 mA. Figure 17 and Figure 18 illustrate this input current limit behavior. The inputs are protected even if the power supplies are disconnectedorturnedoff. 8.3.6 InputBiasCurrentReturnPath The input impedance of the INA826 is extremely high—approximately 20 GΩ. However, a path must be provided for the input bias current of both inputs. This input bias current is typically 35 nA. High input impedance means thatthisinputbiascurrentchangesverylittlewithvaryinginputvoltage. Input circuitry must provide a path for this input bias current for proper operation. Figure 60 shows various provisions for an input bias current path. Without a bias current path, the inputs float to a potential that exceeds the common-mode range of the INA826 and the input amplifiers saturate. If the differential source resistance is low, the bias current return path can be connected to one input (as shown in the thermocouple example in Figure 60). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage as a result of bias current and better high-frequency common-mode rejection. Microphone, Hydrophone, Device etc. 47 kW 47 kW Thermocouple Device 10 kW Device Center tap provides bias current return. Figure60. ProvidinganInputCommon-ModeCurrentPath 22 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 8.3.7 ReferenceTerminal The output voltage of the INA826 is developed with respect to the voltage on the reference terminal. Often, in dual-supply operation, the reference pin (pin 6) is connected to the low-impedance system ground. In single- supply operation, offsetting the output signal to a precise mid-supply level can be useful (for example, 2.5 V in a 5-V supply environment). To accomplish this level shift, a voltage source can be tied to the REF pin to level-shift theoutputsothattheINA826candriveasingle-supplyADC,forexample. For the best performance, keep the source impedance to the REF terminal below 5 Ω. As illustrated in the Functional Block Diagram section, the reference resistor is at one end of a 50-kΩ resistor. Additional impedance at the REF pin adds to this 50-kΩ resistor. The imbalance in the resistor ratios results in degraded common- moderejectionratio(CMRR). Figure 61 shows two different methods of driving the reference pin with low impedance. The OPA330 is a low- power, chopper-stabilized amplifier and therefore offers excellent stability over temperature. The OPA330 is available in the space-saving SC70 and even smaller chip-scale package. The REF3225 is a precision reference inthesmallSOT23-6package. +5 V VIN- +5 V RG INA826 VOUT VIN- REF VIN+ RG INA826 VOUT +5 V +5 V REF V IN+ OPA330 +2.5 V REF3225 +5 V a) Level shifting using the OPA330 as a low-impedance buffer b) Level shifting using the low-impedance output of the REF3225 Figure61. OptionsforLow-ImpedanceLevelShifting 8.3.8 DynamicPerformance Figure 23 illustrates that, despite its low quiescent current of only 200 µA, the INA826 achieves much wider bandwidth than other INAs in its class. This achievement is a result of using TI’s proprietary high-speed precision bipolar process technology. The current-feedback topology provides the INA826 with wide bandwidth even at highgains.Settlingtimealsoremainsexcellentathighgainbecauseofahighslewrateof1V/µs. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 8.3.9 OperatingVoltage The INA826 operates over a power-supply range of 3 V to 36 V (±1.5 V to ±18 V). Supply voltages higher than 40 V (±20 V) can permanently damage the device. Parameters that vary over supply voltage or temperature are shownintheTypicalCharacteristicssectionofthisdatasheet. 8.3.9.1 Low-VoltageOperation The INA826 can operate on power supplies as low as ±1.5 V. Most parameters vary only slightly throughout this supply voltage range; see the Typical Characteristics section. Operation at very low supply voltage requires careful attention to assure that the input voltages remain within the linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low power-supply voltage. The Typical Characteristics curves Figure 9 through Figure 15 and Figure 41 through Figure 43 describe the range of linear operation for varioussupplyvoltages,referenceconnections,andgains. 8.3.10 ErrorSources Most modern signal-conditioning systems calibrate errors at room temperature. However, calibration of errors that result from a change in temperature is normally difficult and costly. Therefore, minimizing these errors is important by choosing high-precision components such as the INA826 that have improved specifications in criticalareasthatimpacttheprecisionoftheoverallsystem.Figure62 showsanexampleapplication. +15 V R = 10 kW S+ VDIFF= 1 V 5.49 kW Device VOUT REF V = 10 V RS- = 9.9 kW CM - 15 V Signal Bandwidth: 5 kHz Figure62. ExampleApplicationwithG=10V/Vand1-VDifferentialVoltage Resistor-adjustable INAs such as the INA826 show the lowest gain error in G = 1 because of the inherently well- matcheddriftoftheinternalresistorsofthedifferentialamplifier.Atgainsgreaterthan1(forinstance,G=10V/V or G = 100 V/V) the gain error becomes a significant error source because of the contribution of the resistor drift of the 24.7-kΩ feedback resistors in conjunction with the external gain resistor. Except for very high gain applications,thegaindriftisbyfarthelargesterrorcontributorcomparedtootherdrifterrors,suchasoffsetdrift. 24 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 The INA826 offers excellent gain error over temperature for both G > 1 and G = 1 (no external gain resistor). Table 2 summarizes the major error sources in common INA applications and compares the two cases of G = 1 (noexternalresistor)andG=10(5.49-kΩ externalresistor).AscanbeseeninTable2,althoughthestaticerrors (absolute accuracy errors) in G = 1 are almost twice as great as compared to G = 10, there are much fewer drift errorsbecauseofthemuchlowergainerrordrift.Inmostapplications,thesestaticerrorscanreadilyberemoved during calibration in production. All calculations refer the error to the input for easy comparison and system evaluation. Table2.ErrorCalculation INA826 G=10ERROR G=1ERROR SPECIFICATION ERRORSOURCE ERRORCALCULATION (ppm) (ppm) ABSOLUTEACCURACYAT25°C Inputoffsetvoltage(μV) VOSI/VDIFF 150 150 150 Outputoffsetvoltage(μV) VOSO/(G×VDIFF) 700 70 700 Inputoffsetcurrent(nA) IOS×maximum(RS+,RS–)/VDIFF 5 50 50 104(G=10), CMRR(dB) VCM/(10CMRR/20×VDIFF) 84(G=1) 63 631 Totalabsoluteaccuracyerror(ppm) 333 1531 DRIFTTO105°C 35(G=10), Gaindrift(ppm/°C) GTC×(TA–25) 1(G=1) 2800 80 Inputoffsetvoltagedrift(μV/°C) (VOSI_TC/VDIFF)×(TA–25) 2 160 160 Outputoffsetvoltagedrift(μV/°C) [VOSO_TC/(G×VDIFF)]×(TA–25) 10 80 800 Offsetcurrentdrift(pA/°C) IOS_TC×maximum(RS+,RS–)× 60 48 48 (TA–25)/VDIFF Totaldrifterror(ppm) 3088 1088 RESOLUTION Gainnonlinearity(ppmofFS) 5 5 5 2 Voltagenoise(1kHz) BW ´ (eNI2+ eGNO ´ VD6IFF eeNNOI==1181,0 10 10 Totalresolutionerror(ppm) 15 15 TOTALERROR Totalerror Totalerror=sumofallerrorsources 3436 2634 8.4 Device Functional Modes The INA826 has a single functional mode and is operational when the power-supply voltage is greater than 3 V (±1.5V).Themaximumpower-supplyvoltagefortheINA826is36V(±18V). Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The low power consumption, high performance, and low cost of the INA826 make the device an excellent instrumentation amplifier for many applications. The INA826 can be used in many low-power, portable applications because the device has a low quiescent current (200 µA, typ) and comes in a small 8-pin WSON package. The input protection circuitry, low maximum gain drift, low offset voltage, and 36-V maximum supply voltagealsomaketheINA826anidealchoiceforindustrialapplicationsaswell. 9.2 Typical Application Figure 63 shows a three-terminal programmable-logic controller (PLC) design for the INA826. This PLC reference design accepts inputs of ±10 V or ±20 mA. The output is a single-ended voltage of 2.5 V ±2.3 V (or 200mVto4.8V).ManyPLCstypicallyhavetheseinputandoutputranges. ±10 V R1 = 100 N(cid:159)(cid:3) 5 V 15 V R2 = 4.12 N(cid:159) REF3225 ±20 mA v V+ RO = 100 (cid:159) R3 = RG = 10.4 N(cid:159) INA826 VREF VOUT 2.5 V ± 2.3 V 20 (cid:159) + V(cid:16) RL = 10 N(cid:159) CO = 1.59 nF (cid:16)15 V Copyright © 2016, Texas Instruments Incorporated Figure63. Three-TerminalPLCDesign 9.2.1 DesignRequirements Thisdesignhastheserequirements: • Supplyvoltage:±15V,5V • Inputs: ±10V,±20mA • Output:2.5V, ±2.3V 9.2.2 DetailedDesignProcedure There are two modes of operation for the circuit shown in Figure 63: current input and voltage input. This design requiresR >>R >>R .Giventhisrelationship,thecurrentinputmodetransferfunctionisgivenbyEquation2. 1 2 3 V = V ´G + V =-(I ´R )´G + V OUT-I D REF IN 3 REF where • Grepresentsthegainoftheinstrumentationamplifier (2) 26 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 Typical Application (continued) ThetransferfunctionforthevoltageinputmodeisshownbyEquation3. R V = V ´G + V =- V ´ 2 ´G + V OUT-V D REF IN R + R REF 1 2 (3) R sets the input impedance of the voltage input mode. The minimum typical input impedance is 100 kΩ. 100 kΩ 1 is selected for R because increasing the R value also increases noise. The value of R must be extremely 1 1 3 small compared to R and R . 20 Ω for R is selected because that resistance value is much smaller than R and 1 2 3 1 yieldsaninputvoltageof±400mVwhenoperatedincurrentmode(±20mA). Equation4canbeusedtocalculateR givenV =±400mV,V = ±10V,andR =100kΩ. 2 D IN 1 R R ´V V = V ´ 2 ®R = 1 D = 4.167 kW D IN R + R 2 V -V 1 2 IN D (4) The value obtained from Equation 4 is not a standard 0.1% value, so 4.12 kΩ is selected. R and R also use 1 2 0.1%toleranceresistorstominimizeerror. TheidealgainoftheinstrumentationamplifieriscalculatedwithEquation5. V -V 4.8 V-2.5 V V G = OUT REF= = 5.75 V 400 mV V D (5) UsingtheINA826gainequation,thegain-settingresistorvalueiscalculatedasshownbyEquation6. 49.4 kW 49.4 kW 49.4 kW G = 1 + ®R = = = 10.4 kW INA826 R G G -1 5.75-1 G INA826 (6) 10.4 kΩ is a standard 0.1% resistor value that can be used in this design. Finally, the output RC filter componentsareselectedtohavea–3-dBcutofffrequencyof1MHz. 9.2.3 ApplicationCurves Figure64andFigure65illustratetypicalcharacteristiccurvesforFigure63. 5 5 4 4 V) V) ge ( 3 ge ( 3 a a olt olt V V ut 2 ut 2 p p ut ut O O 1 1 0 0 −10 −5 0 5 10 −0.02 −0.01 0 0.01 0.02 Input Voltage (V) Input Current (A) G071 G070 Figure64.PLCOutputVoltagevsInputVoltage Figure65.PLCOutputVoltagevsInputCurrent Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 9.3 System Examples 9.3.1 CircuitBreaker Figure66showstheINA826usedinacircuitbreakerapplication. +3 V AV DV DD DD SCLK MSP430 Serial Passive Interface DIO Microcontroller Integrator (SPI) CS 100 kW RG INA826 Mux IP Ch 1 ADC REF G = 1 Rogowski Coil 100 kW PGA112 PGA113 +3 V GND REF 1.2 V REF3312 Copyright © 2016,Texas Instruments Incorporated Figure66. CircuitBreakerExample 9.3.2 ProgrammableLogicController(PLC)Input TheINA826usedinanexampleprogrammablelogiccontroller(PLC)inputapplicationisshowninFigure67. ±10 V 100 kW +15 V 4.87 kW 4 mAto 20 mA ±20 mA 20W 12.4 kW Device VOUT= 2.5 V±2.3 V REF -15 V +2.5 V REF3225 +5 V Copyright © 2016,Texas Instruments Incorporated Figure67. ±10-V,4-mAto20-mAPLCInput AdditionalapplicationideasareillustratedinFigure68toFigure72. 28 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 System Examples (continued) 9.3.3 UsingTINA-TISPICE-BasedAnalogSimulationProgramwiththeINA826 TINA is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINA-TI is a free, fully-functional version of the TINA software, preloaded with a library of macromodels in addition to a range of both passive and active models. TINA provides all the conventional dc, transient, and frequency domain analysisofSPICEaswellasadditionaldesigncapabilities. Available as a free download from the Analog eLab Design Center, TINA-TI offers extensive post-processing capability that allows users to format results in a variety of ways. Virtual instruments offer users the ability to selectinputwaveformsandprobecircuitnodes,voltages,andwaveforms,creatingadynamicquick-starttool. Figure 68 and Figure 70 illustrate example TINA-TI circuits for the INA826 that can be used to develop, modify, and assess the circuit design for specific applications. Links to download these simulation files are provided in thissection. NOTE These files require that either the TINA software (from DesignSoft) or TINA-TI software be installed.DownloadthefreeTINA-TIsoftwarefromtheTINA-TIfolder. ThecircuitinFigure68isusedtoconvertinputsof ±10V,±5V,or ±20mAtoanoutputvoltagerangefrom0.5V to 4.5 V. The input selection depends on the settings of SW and SW . Further explanation as well as the TINA- 1 2 TIsimulationcircuitisprovidedinthecompressedfilethatcanbedownloadedatthefollowinglink:PLCCircuit. +Vs V1 15 CurrentInput V2 15 Source_Switch Iin Vin + Terminal Sense -Vs Iin +Vs - Amp Out INA Out + Vin + SW1 Rg U1 INA159 + RG 49.9k Ref + +Ref Ref ADC_Diff VoltageInput Rg U2 INA826 1 2 - R4 250 - SW2 Vs 5 Vref 2.5 -Vs - Terminal Copyright © 2016, Texas Instruments Incorporated Figure68. Two-TerminalProgrammableLogicController(PLC)Input Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com System Examples (continued) Figure 69 is an example of a LEAD I ECG circuit. The input signals come from leads attached to the right arm (RA) and left arm (LA). These signals are simulated with the circuitry in the corresponding boxes. Protection resistors(R andR )andfilteringarealsoprovided.TheOPA333isusedasanintegratortoremovethe PROT1 PROT2 gained-up dc offsets and servo the INA826 outputs to V . Finally, the right leg drive is biased to a potential REF (+V / 2) and inverts and amplifies the average common-mode signal back into the patient's right leg. This S architecturereducesthe50-and60-Hznoisepickup. +Vs LAElectrode U1 OPA333 + + Vref R4 52k - ECGp C2 47n Rprot1 100k +Vs C10 1u + ECG_LA C5 33p RG1 6.1k R+g+ U4 INA826 R12 500k Ref C6 1n RG2 6.1k Vout Rg C4 47n - + C7 33p ECG_RA Rprot2 100k R7 52k +Vs ECGn R1 1M RAElectrode Vref RLElectrode RLD 52k RLD 47n R6 10k C11 1n V1 5 R9 1M R_ C_ R5 10M R3 10k - + U3 OPA2314 + Rprot3 100k - +Vs U2 OPA2314 ++ Vref Copyright © 2016,Texas Instruments Incorporated +Vs Figure69. ECGCircuit 30 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 System Examples (continued) Figure 70 shows an example of how the INA826 can be used for low-side current sensing. The load current (I ) creates a voltage drop across the shunt resistor (R ). This voltage is amplified by the INA826 with LOAD SHUNT gain set to 100. The output swing of the INA826 is set by the common-mode voltage (which is 0 V in low-side current sensing) and power supplies. Therefore, a dual-supply circuit is implemented. The load current is set from 1 A to 10 A, corresponding to an output voltage range from 350 mV to 3.5 V. The output range can be adjusted by changing the shunt resistor and the gain of the INA826. Click the following link to download the TINA-TIfile:CurrentSensingCircuit. +Vs +Vs Iload 10 V1 5 Vbus 10 + + U2 INA826 Rg Rshunt 3.5m RG 499 Ref Vout V2 5 Rg Rout 10k - -Vs -Vs Copyright © 2016,Texas Instruments Incorporated Figure70. Low-SideCurrentSensing Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com System Examples (continued) Figure 71 shows an example of how the INA826 can be used for RTD signal conditioning. This circuit creates an excitation current (I ) by forcing 2.5 V from the REF5025 across R . The zero-drift, low-noise OPA188 SET SET createsthevirtualgroundthatmaintainsaconstantdifferentialvoltageacrossR withchangingcommon-mode SET voltage. This voltage is necessary because the voltage on the positive input of the INA826 fluctuates over temperature as a result of the changing RTD resistance. Click the following link to download the TINA-TI file: RTDCircuit. +Vs Vref5025 U2 REF5025 NC Vout Vin Temp Trim GND R2 1.5M + Vset - Rset 2.5k -Vs VirtualGND +Vs - + + V1 15 U1 OPA188 + +Vs A V2 15 Iset +Vs + + U4 INA826 -Vs Rg Ref RTD 100 Rg 5k Rg + - Vout - Rparasitic 5 -Vs Copyright © 2016,Texas Instruments Incorporated Figure71. RTDSignalConditioning 32 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 System Examples (continued) The circuit in Figure 72 creates a precision current I by forcing the INA826 V across R . The input SET DIFF SET voltage V is amplified to the output of the INA826 and then divided down by the gain of the INA826 to create IN V . I can be controlled either by changing the value of the gain-set resistor R , the set resistor R , or by DIFF SET G SET changing V through the gain of the composite loop. Care must be taken to ensure that the changing load OUT resistance R does not create a voltage on the negative input of the INA826 that violates the compliance of the L common-mode input range. Likewise, the voltage on the output of the OPA170 must remain compliant throughoutthechangingloadresistanceforthiscircuittofunctionproperly. R2 10k R1 10k C1 100p -Vs +Vs U2 OPA170 - + + + U4 INA826 + + Rg Ref Vout + Vdiff Rset 10k RG 1k Vin +Vs - Rg - +Vs + -Vs A V1 15 Iset V2 15 RL1k -Vs Copyright © 2016,Texas Instruments Incorporated Figure72. PrecisionCurrentSource Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 10 Power Supply Recommendations The nominal performance of the INA826 is specified with a supply voltage of ±15 V and mid-supply reference voltage. The device can also be operated using power supplies from ±1.5 V (3 V) to ±18 V (36 V) and non mid- supply reference voltages with excellent performance. Parameters that can vary significantly with operating voltageandreferencevoltageareillustratedintheTypicalCharacteristicssection. 11 Layout 11.1 Layout Guidelines Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place 0.1-μF bypass capacitors close to the supply pins. Apply these guidelines throughout the analog circuit to improveperformanceandprovidebenefitssuchasreducingtheelectromagnetic-interference(EMI)susceptibility. TheINA826EVMisintendedtoprovidebasicfunctionalevaluationoftheINA826.AnimageoftheINA826EVMis providedinFigure73.TheINA826EVM isalsoavailableforpurchasethroughtheTIeStore. 11.1.1 CMRRvsFrequency The INA826 pinout is optimized for achieving maximum CMRR performance over a wide range of frequencies. However, care must be taken to ensure that both input paths are well-matched for source impedance and capacitance to avoid converting common-mode signals into differential signals. In addition, parasitic capacitance at the gain-setting pins can also affect CMRR over frequency. For example, in applications that implement gain switching using switches or PhotoMOS® relays to change the value of R , choose the component so that the G switchcapacitanceisassmallaspossible. 34 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

INA826 www.ti.com SBOS562F–AUGUST2011–REVISEDJULY2016 11.2 Layout Example Gain Resistor Bypass Capacitor R R G G - V+ V V-IN V+ IN VIN V+IN VO VOUT + V- Ref GND Bypass Capacitor V- GND Figure73. INA826ExampleLayout TheINA826EVMprovidesthefollowingfeatures: • Intuitiveevaluationwithsilkscreenschematic • Easyaccesstonodeswithsurface-mounttestpoints • Advancedevaluationwithtwoprototypeareas • Referencevoltagesourceflexibility • Convenientinputandoutputfiltering Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:INA826

INA826 SBOS562F–AUGUST2011–REVISEDJULY2016 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation OPAx33050-μVVOS,0.25-μV/°C,35-μACMOSOperationalAmplifiersZerø-DriftSeries (SBOS432) REF32xx4ppm/°C,100μA,SOT23-6SeriesVoltageReference (SBVS058) REF50xxLow-Noise,VeryLowDrift,PrecisionVoltageReference (SBOS410) INA333Micro-Power(50μA),Zerø-Drift,Rail-to-RailOutInstrumentationAmplifier (SBOS445) PGA280Zerø-Drift,High-Voltage,ProgrammableGainInstrumentationAmplifier (SBOS487) INA159Precision,Gainof0.2LevelTranslationDifferenceAmplifier (SBOS333) PGA11xZerø-DriftProgrammableGainAmplifierWithMux (SBOS424) INA826EVMUserGuide (SBOU115) TINA-TIsoftwarefolder 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. PhotoMOSisaregisteredtrademarkofPanasonicElectricWorksEuropeAG. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 36 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:INA826

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) INA826AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 INA826 & no Sb/Br) INA826AIDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 IPDI & no Sb/Br) INA826AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 IPDI & no Sb/Br) INA826AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 INA826 & no Sb/Br) INA826AIDRGR ACTIVE SON DRG 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 IPEI & no Sb/Br) INA826AIDRGT ACTIVE SON DRG 8 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 IPEI & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) INA826AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA826AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA826AIDRGR SON DRG 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 INA826AIDRGT SON DRG 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) INA826AIDGKR VSSOP DGK 8 2500 346.0 346.0 41.0 INA826AIDR SOIC D 8 2500 367.0 367.0 35.0 INA826AIDRGR SON DRG 8 3000 367.0 367.0 35.0 INA826AIDRGT SON DRG 8 250 210.0 185.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DRG0008A WSON - 0.8 mm max height SCALE 5.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 3.1 PIN 1 INDEX AREA 2.9 0.8 0.7 C SEATING PLANE 0.05 0.00 0.08 C (0.2) TYP EXPOSED 1.2 0.1 THERMAL PAD 4 5 2X 1.5 2 0.1 8 1 6X 0.5 0.3 8X 0.2 PIN 1 ID 0.6 8X 0.1 C A B 0.4 0.08 C 4218885/A 03/2020 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRG0008A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.2) 8X (0.7) SYMM 1 8 8X (0.25) SYMM (2) (0.75) 6X (0.5) 4 5 (R0.05) TYP ( 0.2) VIA (0.35) TYP (2.7) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4218885/A 03/2020 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DRG0008A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM 8X (0.7) METAL TYP 8X (0.25) 1 8 SYMM (1.79) 6X (0.5) 4 5 (R0.05) TYP (1.13) (2.7) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 84% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218885/A 03/2020 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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