HV5812 20-Channel Serial-Input Vacuum Fluorescent Display Driver for Anode or Grid Features General Description • HVCMOS® Technology for High Performance The HV5812 is a 20-channel serial-input vacuum • Operating Voltage of up to 80V fluorescent display driver. It combines a 20-bit CMOS shift register, data latches and control circuitry with • High-speed Source Driver high-voltage MOSFET outputs. The HV5812 is • 5V CMOS Logic Circuitry primarily designed for vacuum fluorescent displays. • Up to 5 MHz Data Input Rate The CMOS shift register and latches allow direct • Excellent Noise Immunity interfacing with microprocessor-based systems. Data • Flexible High-voltage Supplies input rates are typically over 5 MHz with 5V logic supply. Especially useful for interdigit blanking, the Applications blanking input disables the output source drives and turns on the sink drivers. Using with TTL may require • Display Driver external pull-up resistors to ensure an input logic high. Package Types 28-lead PDIP 28-lead PLCC 28-lead SOW (Top view) (Top view) (Top view) 4 1 28 26 1 28 1 28 See Table 2-1 for pin information.  2016 Microchip Technology Inc. DS20005629A-page 1

HV5812 Functional Block Diagram BL VPP STROBE HV 1 VDD OUT HV 2 OUT DATA IN 20-bit 20-bit HV 3 CLK Shift OUT Latch Register DATA OUT GND HV 20 OUT  DS20005629A-page 2  2016 Microchip Technology Inc.

HV5812 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† Supply Voltage, V ................................................................................................................................ –0.5V to +7.5V DD Supply Voltage, V ..................................................................................................................................–0.5V to +90V PP Logic Input Levels............................................................................................................................–0.3V to V +0.3V DD Maximum Operating Junction Temperature.........................................................................................................+125°C Storage Temperature............................................................................................................................–55°C to +150°C Power Dissipation: 28-lead PDIP.........................................................................................................................................2000 mW 28-lead PLCC........................................................................................................................................1900 mW 28-Lead SOW........................................................................................................................................1700 mW † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS Parameter Sym. Min. Typ. Max. Unit Conditions Supply Voltage V 4.5 — 5.5 V DD Supply Voltage V 20 — 80 V PP Operating Junction Temperature T –40 — +125 °C J DC ELECTRICAL CHARACTERISTICS Electrical Specifications: Over recommended operating conditions; T = 25°C unless otherwise indicated. A Parameter Sym. Min. Typ. Max. Unit Conditions Output Leakage Current I — –5 –15 µA V = 0V, T = +70°C DSS OUT A I = –25 mA, V = 80V,  78 78.5 — OUT PP T = +25°C J HV V OUT I = –25 mA, V = 80V,  High-level Output V 77 78 — OUT PP OH T = +125°C J DATA 4.5 4.7 — V I = –200 µA, V = 5V OUT OUT DD — 1.5 3 I = 1 mA, T = +25°C, V = 5V OUT J DD HVOUT — 2.3 4 V IOUT = 1 mA, TJ = +125°C, Low-level Output V V = 5V OL DD DATA — 200 250 V I = +200 µA, V = 5V OUT OUT DD Output Pull-down Current I 2 3.5 — mA V = 5V to V , V = 5V SINK OUT PP DD High-level Logic Input Voltage V 3.5 — 5.3 V V = 5V IH DD Low-level Logic Input Voltage V –0.3 — 0.8 V IL High-level Logic Input Current I — 0.05 0.5 µA V = V , V = 5V IH IN DD DD Low-level Logic Input Current I — –0.05 –0.5 µA V = 0.8V, V = 5V IL IN DD Quiescent VDD Supply I — 100 300 µA All outputs high, VDD = 5V Current DDQ — 100 300 All outputs low, V = 5V DD — 10 100 All outputs high, no load Quiescent V Supply Current I µA PP PPQ — 10 100 All outputs low, no load  2016 Microchip Technology Inc. DS20005629A-page 3

HV5812 AC ELECTRICAL CHARACTERISTICS Electrical Specifications: Over recommended operating conditions; T = 25°C unless otherwise indicated. A Parameter Sym. Min. Typ. Max. Unit Conditions t — 2000 — PHL Blanking to Output Delay ns C = 30 pF, 50% to 50%, V =5V L DD t — 1000 — PLH Output Fall Time t — 1450 — ns C = 30 pF, 90% to 10%, V = 5V r L DD Output Rise Time t — 650 — ns C = 30 pF, 10% to 90%, V = 5V f L DD Data Set-up Time t 75 — — ns See Timing Waveforms. SU Data Hold Time t 75 — — ns See Timing Waveforms. H Minimum Data Pulse Width t 150 — — ns See Timing Waveforms. PWD Minimum Clock Pulse Width t 150 — — ns See Timing Waveforms. PWCLK Minimum Time between Clock t 300 — — ns See Timing Waveforms. Activation and Strobe CKS Minimum Strobe Pulse Width t 100 — — ns SeeTiming Waveforms. PWS Typical Time between Strobe Activation and Output t — 500 — ns See Timing Waveforms. STO Transition — 8 — T = +25°C, V = 5V J DD Maximum Clock Frequency f MHz CLK — 5 — T = +125°C, V = 5V J DD TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Conditions TEMPERATURE RANGE Operating Junction Temperature T –40 — +125 °C J Storage Temperature T –55 — +150 °C S PACKAGE THERMAL RESISTANCE 28-lead PDIP  — 43 — °C/W JA 28-lead PLCC  — 48 — °C/W JA 28-lead SOW  — 55 — °C/W JA DS20005629A-page 4  2016 Microchip Technology Inc.

HV5812 Timing Waveforms t PWCLK V CLK 50% 50% IH V IL t SU V DATA IN 50% t 50% IH PWD t VIL h t PWS t 50% 50% VIH STROBE CKS V IL V BL 50% 50% IH V t t IL PHL PLH t HV STO 90% 90% 50% 50% VOH OUT 10% 10% V t t OL r f  2016 Microchip Technology Inc. DS20005629A-page 5

HV5812 2.0 PIN DESCRIPTION The details on the pins of HV5812 28-lead PDIP, 28-lead PLCC and 28-lead SOW are listed on Table 2-1. Refer to Package Types for the location of pins. TABLE 2-1: PIN FUNCTION TABLE Pin Number Pin Name Description 1 VPP High-voltage power rail 2 Data Out Serial data output. Data output for cascading to the data input of the next device. 3 HV 20 High-voltage output OUT 4 HV 19 High-voltage output OUT 5 HV 18 High-voltage output OUT 6 HV 17 High-voltage output OUT 7 HV 16 High-voltage output OUT 8 HV 15 High-voltage output OUT 9 HV 14 High-voltage output OUT 10 HV 13 High-voltage output OUT 11 HV 12 High-voltage output OUT 12 HV 11 High-voltage output OUT 13 BLANKING Blank 14 GND Logic and high-voltage ground 15 CLOCK Data shift register clock 16 STROBE Strobe 17 HV 10 High-voltage output OUT 18 HV 9 High-voltage output OUT 19 HV 8 High-voltage output OUT 20 HV 7 High-voltage output OUT 21 HV 6 High-voltage output OUT 22 HV 5 High-voltage output OUT 23 HV 4 High-voltage output OUT 24 HV 3 High-voltage output OUT 25 HV 2 High-voltage output OUT 26 HV 1 High-voltage output OUT 27 Data In Serial data input 28 VDD Low-voltage logic power rail DS20005629A-page 6  2016 Microchip Technology Inc.

HV5812 3.0 FUNCTIONAL DESCRIPTION Follow the steps below to power up and power down the HV5812: POWER-UP AND POWER-DOWN SEQUENCE Power-up Power-down Step Description Step Description 1 Connect ground. 1 Remove V . PP 2 Apply V . 2 Remove all inputs. DD 3 Set all inputs (Data, CLK, etc.) to a known state 3 Remove V . DD 4 Apply V . (Note 1) 4 Disconnect ground. PP Note 1: The V should not drop below V during operation. PP DD FUNCTION TABLE (Note 1) , Serial Shift Register Contents Serial Latch Contents Output Contents Clock Strobe Data Data Blanking Input I I I ... I I Input I I I ... I I I I I ... I I Input 1 2 3 N-1 N Output 1 2 3 N-1 N 1 2 3 N-1 N H L to H H R R ...R R R — — — — — — — — — — 1 2 N–2 N–1 N–1 L L to H L R R ...R R R — — — — — — — — — — 1 2 N–2 N–1 N–1 X H to L R R R ...R R R — — — — — — — — — — 1 2 3 N–1 N N — — X X X...X X X L R R R ...R R — — — — — 1 2 3 N–1 N — — P P P ...P P P H P P P ...P P L P P P ...P P 1 2 3 N–1 N N 1 2 3 N–1 N 1 2 3 N–1 N — — — — — — — — X X X...X X H L L L...L L Note1: L = Low logic level H = High logic level X = Irrelevant  P = Present state R = Previous state VDD VDD VPP L/T INPUT Data Out HV OUT GND GND GND Logic Inputs Logic Data Output High Voltage Outputs FIGURE 3-1: IO Circuits.  2016 Microchip Technology Inc. DS20005629A-page 7

HV5812 4.0 PACKAGE MARKING INFORMATION 4.1 Packaging Information 28-lead PDIP Example XXXXXX HV5812P e3 e3 YYWWNNN 1625859 28-lead PLCC Example XXXXXXXXX HV5812PJ e3YYWWNNN e31611231 28-lead SOW Example XXXXXXXe3 HV5812WG e3 YYWWNNN 1678896 Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. DS20005629A-page 8  2016 Microchip Technology Inc.

HV5812 28-Lead PDIP (.600in Row Spacing) Package Outline (P) 1.565x.580in body, .250in height (max), .100in pitch D 28 E1 E Note 1 b1 (Index Area) 1 D1 D1 b Top View View B View B A Seating A A2 Plane L A1 e eA eB A Side View ViewA-A NNoottee:: FFoorr tthhee mmoosstt ccuurrrreenntt ppaacckkaaggee ddrraawwiinnggss,, sseeee tthhee MMiiccrroocchhiipp PPaacckkaaggiinngg SSppeecciiffiiccaattiioonn aatt wwwwww..mmiiccrroocchhiipp..ccoomm//ppaacckkaaggiinngg.. Note: 1. (cid:36)(cid:3)(cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:3)(cid:80)(cid:88)(cid:86)(cid:87)(cid:3)(cid:69)(cid:72)(cid:3)(cid:79)(cid:82)(cid:70)(cid:68)(cid:87)(cid:72)(cid:71)(cid:3)(cid:76)(cid:81)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:76)(cid:81)(cid:71)(cid:72)(cid:91)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68)(cid:3)(cid:76)(cid:81)(cid:71)(cid:76)(cid:70)(cid:68)(cid:87)(cid:72)(cid:71)(cid:17)(cid:3)(cid:55)(cid:75)(cid:72)(cid:3)(cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:3)(cid:70)(cid:68)(cid:81)(cid:3)(cid:69)(cid:72)(cid:29)(cid:3)(cid:68)(cid:3)(cid:80)(cid:82)(cid:79)(cid:71)(cid:72)(cid:71)(cid:3)(cid:80)(cid:68)(cid:85)(cid:78)(cid:18)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:30)(cid:3)(cid:68)(cid:81)(cid:3)(cid:72)(cid:80)(cid:69)(cid:72)(cid:71)(cid:71)(cid:72)(cid:71)(cid:3)(cid:80)(cid:72)(cid:87)(cid:68)(cid:79)(cid:3)(cid:80)(cid:68)(cid:85)(cid:78)(cid:72)(cid:85)(cid:30)(cid:3)(cid:82)(cid:85)(cid:3) (cid:68)(cid:3)(cid:83)(cid:85)(cid:76)(cid:81)(cid:87)(cid:72)(cid:71)(cid:3)(cid:76)(cid:81)(cid:71)(cid:76)(cid:70)(cid:68)(cid:87)(cid:82)(cid:85)(cid:17) Symbol A A1 A2 b b1 D D1 E E1 e eA eB L MIN .140* .015 .125 .014 .030 1.380 .065† .590† .485 .600* .115 Dimension .100 .600 NOM - - - - - - - - - - - (inches) BSC BSC MAX .250 .055* .195 .023† .070 1.565 .085* .625 .580 .700 .200 (cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3)(cid:53)(cid:72)(cid:74)(cid:76)(cid:86)(cid:87)(cid:85)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:48)(cid:54)(cid:16)(cid:19)(cid:20)(cid:20)(cid:15)(cid:3)(cid:57)(cid:68)(cid:85)(cid:76)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:36)(cid:37)(cid:15)(cid:3)(cid:44)(cid:86)(cid:86)(cid:88)(cid:72)(cid:3)(cid:37)(cid:15)(cid:3)(cid:45)(cid:88)(cid:81)(cid:72)(cid:15)(cid:3)(cid:20)(cid:28)(cid:27)(cid:27)(cid:17) (cid:13)(cid:3)(cid:55)(cid:75)(cid:76)(cid:86)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:76)(cid:86)(cid:3)(cid:81)(cid:82)(cid:87)(cid:3)(cid:86)(cid:83)(cid:72)(cid:70)(cid:76)(cid:191)(cid:72)(cid:71)(cid:3)(cid:76)(cid:81)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3)(cid:71)(cid:85)(cid:68)(cid:90)(cid:76)(cid:81)(cid:74)(cid:17) (cid:130)(cid:3)(cid:55)(cid:75)(cid:76)(cid:86)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:71)(cid:76)(cid:73)(cid:73)(cid:72)(cid:85)(cid:86)(cid:3)(cid:73)(cid:85)(cid:82)(cid:80)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3)(cid:71)(cid:85)(cid:68)(cid:90)(cid:76)(cid:81)(cid:74)(cid:17) Drawings not to scale.  2016 Microchip Technology Inc. DS20005629A-page 9

HV5812 28-Lead PLCC Package Outline (PJ) .453x.453in. body, .180in. height (max), .050in. pitch .048/.042 x 45O D .056/.042 D1 x 45O 4 1 28 26 .150 MAX Note 1 (Index Area) 075 MAX E1 E Note 2 .020max (3 Places) Top View Vertical Side View View A b1 A Base .020 MIN A1A2 Plane e Seating Plane b R Horizontal Side View ViewA NNoottee:: FFoorr tthhee mmoosstt ccuurrrreenntt ppaacckkaaggee ddrraawwiinnggss,, sseeee tthhee MMiiccrroocchhiipp PPaacckkaaggiinngg SSppeecciiffiiccaattiioonn aatt wwwwww..mmiiccrroocchhiipp..ccoomm//ppaacckkaaggiinngg.. Notes: 1. (cid:36)(cid:3)(cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:3)(cid:80)(cid:88)(cid:86)(cid:87)(cid:3)(cid:69)(cid:72)(cid:3)(cid:79)(cid:82)(cid:70)(cid:68)(cid:87)(cid:72)(cid:71)(cid:3)(cid:76)(cid:81)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:76)(cid:81)(cid:71)(cid:72)(cid:91)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68)(cid:3)(cid:76)(cid:81)(cid:71)(cid:76)(cid:70)(cid:68)(cid:87)(cid:72)(cid:71)(cid:17)(cid:3)(cid:55)(cid:75)(cid:72)(cid:3)(cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:3)(cid:70)(cid:68)(cid:81)(cid:3)(cid:69)(cid:72)(cid:29)(cid:3)(cid:68)(cid:3)(cid:80)(cid:82)(cid:79)(cid:71)(cid:72)(cid:71)(cid:3)(cid:80)(cid:68)(cid:85)(cid:78)(cid:18)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:30)(cid:3)(cid:68)(cid:81)(cid:3)(cid:72)(cid:80)(cid:69)(cid:72)(cid:71)(cid:71)(cid:72)(cid:71)(cid:3)(cid:80)(cid:72)(cid:87)(cid:68)(cid:79)(cid:3)(cid:80)(cid:68)(cid:85)(cid:78)(cid:72)(cid:85)(cid:30)(cid:3)(cid:82)(cid:85)(cid:3) a printed indicator. 2. (cid:36)(cid:70)(cid:87)(cid:88)(cid:68)(cid:79)(cid:3)(cid:86)(cid:75)(cid:68)(cid:83)(cid:72)(cid:3)(cid:82)(cid:73)(cid:3)(cid:87)(cid:75)(cid:76)(cid:86)(cid:3)(cid:73)(cid:72)(cid:68)(cid:87)(cid:88)(cid:85)(cid:72)(cid:3)(cid:80)(cid:68)(cid:92)(cid:3)(cid:89)(cid:68)(cid:85)(cid:92)(cid:17) Symbol A A1 A2 b b1 D D1 E E1 e R MIN .165 .090 .062 .013 .026 .485 .450 .485 .450 .025 Dimension .050 NOM .172 .105 - - - .490 .453 .490 .453 .035 (inches) BSC MAX .180 .120 .083 .021 .032 .495 .456 .495 .456 .045 JEDEC Registration MS-018, Variation AB, Issue A, June, 1993. Drawings not to scale. DS20005629A-page 10  2016 Microchip Technology Inc.

HV5812 28-Lead SOW (Wide Body) Package Outline (WG) 17.90x7.50mm body, 2.65mm height (max), 1.27mm pitch D θ1 28 E1 E L2 Gauge Plane Note 1 (Index Area 0.25D x 0.75E1) L Seating θ Plane L1 1 Top View View B A View h B A A2 Seating h Note 1 Plane e b A1 A Side View ViewA- A NNoottee:: FFoorr tthhee mmoosstt ccuurrrreenntt ppaacckkaaggee ddrraawwiinnggss,, sseeee tthhee MMiiccrroocchhiipp PPaacckkaaggiinngg SSppeecciiffiiccaattiioonn aatt wwwwww..mmiiccrroocchhiipp..ccoomm//ppaacckkaaggiinngg.. Note: 1. (cid:36)(cid:3)(cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:3)(cid:80)(cid:88)(cid:86)(cid:87)(cid:3)(cid:69)(cid:72)(cid:3)(cid:79)(cid:82)(cid:70)(cid:68)(cid:87)(cid:72)(cid:71)(cid:3)(cid:76)(cid:81)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:76)(cid:81)(cid:71)(cid:72)(cid:91)(cid:3)(cid:68)(cid:85)(cid:72)(cid:68)(cid:3)(cid:76)(cid:81)(cid:71)(cid:76)(cid:70)(cid:68)(cid:87)(cid:72)(cid:71)(cid:17)(cid:3)(cid:55)(cid:75)(cid:72)(cid:3)(cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:3)(cid:70)(cid:68)(cid:81)(cid:3)(cid:69)(cid:72)(cid:29)(cid:3)(cid:68)(cid:3)(cid:80)(cid:82)(cid:79)(cid:71)(cid:72)(cid:71)(cid:3)(cid:80)(cid:68)(cid:85)(cid:78)(cid:18)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:191)(cid:72)(cid:85)(cid:30)(cid:3)(cid:68)(cid:81)(cid:3)(cid:72)(cid:80)(cid:69)(cid:72)(cid:71)(cid:71)(cid:72)(cid:71)(cid:3)(cid:80)(cid:72)(cid:87)(cid:68)(cid:79)(cid:3)(cid:80)(cid:68)(cid:85)(cid:78)(cid:72)(cid:85)(cid:30)(cid:3)(cid:82)(cid:85)(cid:3) a printed indicator. Symbol A A1 A2 b D E E1 e h L L1 L2 (cid:537) (cid:537)(cid:20) MIN 2.15* 0.10 2.05 0.31 17.70* 9.97* 7.40* 0.25 0.40 0O 5O Dimension 1.27 1.40 0.25 NOM - - - - 17.90 10.30 7.50 - - - - (mm) BSC REF BSC MAX 2.65 0.30 2.55* 0.51 18.10* 10.63* 7.60* 0.75 1.27 8O 15O JEDEC Registration MS-013, Variation AE, Issue E, Sep. 2005. (cid:13)(cid:3)(cid:55)(cid:75)(cid:76)(cid:86)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:76)(cid:86)(cid:3)(cid:81)(cid:82)(cid:87)(cid:3)(cid:86)(cid:83)(cid:72)(cid:70)(cid:76)(cid:191)(cid:72)(cid:71)(cid:3)(cid:76)(cid:81)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3)(cid:71)(cid:85)(cid:68)(cid:90)(cid:76)(cid:81)(cid:74)(cid:17) Drawings are not to scale. S # S 28SO G 0 1309  2016 Microchip Technology Inc. DS20005629A-page 11

HV5812 NOTES: DS20005629A-page 12  2016 Microchip Technology Inc.

HV5812 APPENDIX A: REVISION HISTORY Revision A (October 2016) • Converted Supertex Doc# DSFP-HV5812 to Microchip DS20005629A • Changed the packaging quantity of 28-lead PLCC (PJ M904) from 500/Reel to 750/Reel and 28-lead SOW (WG) from 1000/Reel to 1600/Reel • Made minor text changes throughout the docu- ment  2016 Microchip Technology Inc. DS20005629A-page 13

HV5812 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: PART NO. XX - X - X Device Package Environmental Media Type a) HV5812P-G: 20-Channel Serial-Input Vacuum Options Fluorescent Display Driver for Anode or Grid, 28-lead PDIP, 13/Tube Device: HV5812 = 20-Channel Serial-Input Vacuum b) HV5812PJ-G: 20-Channel Serial-Input Vacuum Fluorescent Display Driver for Anode or Fluorescent Display Driver for Grid Anode or Grid, 28-lead PLCC, 38/Tube c) HV5812PJ-G-M904: 20-Channel Serial-Input Vacuum Packages: P = 28-lead PDIP Fluorescent Display Driver for PJ = 28-lead PLCC Anode or Grid, 28-lead PLCC, WG = 28-lead SOW 750/Reel d) HV5812WG-G: 20-Channel Serial-Input Vacuum Fluorescent Display Driver for Environmental: G = Lead (Pb)-free/RoHS-compliant Package Anode or Grid, 28-lead SOW, 1600/Reel Media Types: (blank) = 13/Tube for a P Package = 38/Tube for a PJ Package = 1600/Reel f or a WG Package M904 = 750/Reel for a PJ Package DS20005629A-page 14  2016 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, AnyRate, and may be superseded by updates. It is your responsibility to dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, ensure that your application meets with your specifications. KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MICROCHIP MAKES NO REPRESENTATIONS OR MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, WARRANTIES OF ANY KIND WHETHER EXPRESS OR RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O IMPLIED, WRITTEN OR ORAL, STATUTORY OR are registered trademarks of Microchip Technology OTHERWISE, RELATED TO THE INFORMATION, Incorporated in the U.S.A. and other countries. INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR ClockWorks, The Embedded Control Solutions Company, FITNESS FOR PURPOSE. Microchip disclaims all liability ETHERSYNCH, Hyper Speed Control, HyperLight Load, arising from this information and its use. Use of Microchip IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are devices in life support and/or safety applications is entirely at registered trademarks of Microchip Technology Incorporated the buyer’s risk, and the buyer agrees to defend, indemnify and in the U.S.A. hold harmless Microchip from any and all damages, claims, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, suits, or expenses resulting from such use. No licenses are BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, conveyed, implicitly or otherwise, under any Microchip dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, intellectual property rights unless otherwise stated. EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Silicon Storage Technology is a registered trademark of Tempe, Arizona; Gresham, Oregon and design centers in California Microchip Technology Inc. in other countries. and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping GestIC is a registered trademarks of Microchip Technology devices, Serial EEPROMs, microperipherals, nonvolatile memory and Germany II GmbH & Co. KG, a subsidiary of Microchip analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. QUALITY MANAGEMENT SYSTEM © 2016, Microchip Technology Incorporated, Printed in the CERTIFIED BY DNV U.S.A., All Rights Reserved. ISBN: 978-1-5224-0999-1 == ISO/TS 16949 ==  2016 Microchip Technology Inc. DS20005629A-page 15

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: HV5812P-G HV5812PJ-G HV5812PJ HV5812WG HV5812P HV5812WG-G HV5812PJ-G M904 HV5812PJ-G- M904