HSP061-4NY8 4-line ESD protection for high speed lines Features ■ flow-through routing to keep signal integrity ■ ultra-large bandwidth: 6 GHz ■ ultra low capacitance: 0.6 pF ■ low time domain reflection ■ low leakage current: 100 nA at 25 °C ■ extended operating junction temperature µQFN-8L package range: -40 °C to 150 °C ■ package size in mm: 2 x 1 x 0.5 ■ RoHS compliant Figure 1. Functional schematic (top view) Benefits ■ high ESD robustness of the equipment Internally ■ suitable for high density boards I/O 1 1 8 not connected Complies with following standards I/O 2 2 ■ MIL-STD 883G Method 3015-7 Class 3B: – 8 kV GND 3 7 GND ■ IEC 61000-4-2 level 4: I/O 3 4 – 8 kV (contact discharge) Internally Applications I/O 4 5 6 not connected The HSP061-4NY8 is designed to protect against electrostatic discharge on sub micron technology circuits driving: ■ HDMI 1.3 and 1.4 Description ■ Digital Video Interface The HSP061-4NY8 is a 4-channel ESD array with ■ Display Port a rail to rail architecture designed specifically for ■ USB 3.0 the protection of high speed differential lines. ■ Serial ATA The ultra-low variation of the capacitance ensures very low influence on signal-skew. The large bandwidth and the low reflection make it compatible with 5 Gbps. The device is packaged in µQFN-8L with a 400µm pitch, which minimizes the PCB area. October 2010 Doc ID 17414 Rev 2 1/10 www.st.com 10

Characteristics HSP061-4NY8 1 Characteristics Table 1. A bsolute maximum ratings T = 25 °C amb Symbol Parameter Value Unit V Peak pulse voltage IEC 61000-4-2 contact discharge 8 kV PP I Repetitive peak pulse current (8/20 µs) 3 A pp T Operating junction temperature range -40 to +150 °C j T Storage temperature range -65 to +150 °C stg T Maximum lead temperature for soldering during 10 s 260 °C L Table 2. E lectrical characteristics T = 25 °C amb Symbol Parameter Test conditions Min. Typ. Max. Unit V Breakdown voltage I = 1 mA 6 V BR R I Leakage current V = 3 V 100 nA RM RM IEC 61000-4-2, +8 kV V Clamping voltage contact (I = 30 A), 18 V CL PP measured at 30 ns V = 0 V F = 1 MHz, C Capacitance (input/output to ground) I/O 0.6 0.8 pF I/O - GND V = 30 mV OSC Capacitance variation V = 0 V F = 1 MHz, ΔC I/O 0.03 0.05 pF I/O - GND (input/output to ground) V = 30 mV OSC f Cut-off frequency -3dB 6 GHz C t = 200 ps (10 - 90%)(1) Z Differential impedance r 85 100 115 Ω Diff Z = 100 Ω 0 Diff 1. HDMI specification conditions. This information can be provided for other applications. Please contact your local ST office. 2/10 Doc ID 17414 Rev 2

HSP061-4NY8 Characteristics F igure 2. Leakage current versus junction Figure 3. S21 attenuation measurement temperature (typical values) 10.00 db 00 IR(nA) VR=VRM= 3V --33 1.00 --66 0.10 --99 Tj(°C) f (Hz) 0.01 --1122 25 50 75 100 125 150 10 MHz 30 MHz 100 MHz300 MHz 1 GHz 3 GHz Figure 4. D ifferential impedance (Z )(1) Figure 5. Eye diagram - HDMI mask at diff 3.4Gbps per channel(1) tr= 200ps(10%-90%) 12.5Ω/div Vertical :200 mV / div Horizontal :50ps/ div Z0Diff= 100Ω 1. HDMI specification conditions. This information can be provided for other applications. Please contact your local ST office. Figure 6. E SD response to IEC 61000-4-2 Figure 7. ESD response to IEC 61000-4-2 (+8kV contact discharge) (-8kV contact discharge) 50V /div 20 ns /div 20 GS / s 50V /div 20 ns /div 20 GS / s Doc ID 17414 Rev 2 3/10

Ordering information scheme HSP061-4NY8 2 Ordering information scheme Figure 8. Ordering information scheme HSP 06 1 - 4 NY8 High speed line protection BreakdownVoltage Version Number of lines Package µQFN-8L 4/10 Doc ID 17414 Rev 2

HSP061-4NY8 Package information 3 Package information ● Epoxy meets UL94, V0 ● Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. T able 3. µQFN-8L dimensions Dimensions Ref Millimeters Inches D Min Typ Max Min Typ Max e b A 0.45 0.50 0.55 0.018 0.020 0.022 A1 0.00 0.02 0.05 0.00 0.001 0.002 Pin 1 ID E b 0.15 0.20 0.25 0.006 0.008 0.010 r L D 1.95 2.00 2.05 0.077 0.079 0.081 m p E 0.95 1.00 1.05 0.037 0.039 0.041 n e 0.35 0.40 0.45 0.014 0.016 0.018 L 0.25 0.35 0.45 0.010 0.014 0.018 A A1 m 0.40 0.016 n 0.15 0.006 p 0.11 0.004 r 0.05 0.002 F igure 9. Footprint recommendations Figure 10. Marking (dimensions in mm) 1.4 0..2 1..8 . 0.4 H 4 N .0.4 0.55 According to IPC7351 Doc ID 17414 Rev 2 5/10

Package information HSP061-4NY8 Figure 11. µQFN-8L tape and reel specification Dot identifying Pin A1 location Ø 1.55 2.0 4.0 0.22 5 7 1. 7 1 2. 5 3. 0 H H H 8. 4 N 4 N 4 N 1.17 4.0 0.63 All dimensions are typical values in mm User direction of unreeling 6/10 Doc ID 17414 Rev 2

HSP061-4NY8 Recommendation on PCB assembly 4 Recommendation on PCB assembly Figure 12. Recommended stencil window position 77µµmm 77µµmm mm Copper µµ 33 Thickness: 11 100µm µmµm µmµm Footprint 00 44 7070 6767 Stencilwindow 118866µµmm mm Footprint µµ 33 11 1133µµmm 1133µµmm 220000µµmm 77µµmm 77µµmm mm µµ 1313 mm µµ 00 700µm700µm 674µm674µm 550µm550µm 530µm530µm 11 337744µµmm mm 118866µµmm µmµm µµ 00 33 11 11 440000µµmm 220000µµmm 4.1 Solder paste 1. Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste recommended. 3. Offers a high tack force to resist component displacement during PCB movement. 4. Use solder paste with fine particles: powder particle size 20-45 µm. 4.2 Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. Doc ID 17414 Rev 2 7/10

Recommendation on PCB assembly HSP061-4NY8 4.3 PCB design 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. Figure 13. Printed circuit board layout recommendations 1 8 400 µm 2 Via to Via to 3 7 GND GND 4 5 6 Footprint pad PCB tracks 4.4 Reflow profile Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting TTeemmppeerraattuurree ((°°CC)) 226600°°CC mmaaxx 225555°°CC 222200°°CC 118800°°CC 112255 °°CC 2°C/s 2r°eCc/osm remceonmdmedended 3°C/s max 6°C/s max 6°C/s max 3°C/s max 00 00 11 22 33 44 55 66 77 1100--3300 sseecc TTiimmee ((mmiinn)) 9900 ttoo 115500 sseecc 9900 sseecc mmaaxx Note: Minimize air convection currents in the reflow oven to avoid component movement. 8/10 Doc ID 17414 Rev 2

HSP061-4NY8 Ordering information 5 Ordering information T able 4. Ordering information Order code Marking Package Weight Base qty Delivery mode HSP061-4YN8 H4N µQFN 9.55 mg 6000 Tape and reel (7”) 6 Revision history T able 5. Document revision history Date Revision Changes 20-Apr-2010 1 Initial release. Updated values for ΔC in Table2. Updated Figure13. 15-Oct-2010 2 I/O - GND Updated package name. Doc ID 17414 Rev 2 9/10

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