HSP051-4M10 Datasheet 4-line ESD protection for high speed lines Features • Flow-through routing to keep signal integrity • Ultralarge bandwidth: 10 GHz • Ultralow capacitance: – 0.2 pF (I/O to I/O) – 0.35 pF (I/O to GND) • Very Low dynamic resistance: 0.48 Ω • 100 Ω differential impedance µQFN-10L package • Low leakage current: 100 nA at 25 °C Functional schematic (top view) • Extended operating junction temperature range: -40 °C to 150 °C • Thin package: 0.5 mm max. Internally I/O 1 1 10 not connected • RoHS compliant I/O 2 2 9 • High ESD protection level GND 3 8 GND • High integration I/O 3 4 7 • Suitable for high density boards I/O 4 5 6 Innotetrncoanllnyected • Complies with following standards: – MIL-STD 883G Method 3015-7 Class 3B: – 8 kV – IEC 61000-4-2 level 4: 8 kV (contact discharge), 15 kV (air discharge) Applications The HSP051-4M10 is designed to protect against Product status electrostatic discharge on sub micron technology HSP051-4M10 circuits driving: • HDMI 2.0 and 1.4 • USB 3.1 and USB3.0 • Digital Video Interface • Display Port • Serial ATA Description The HSP051-4M10 is a 4-channel ESD array with a rail to rail architecture designed specifically for the protection of high speed differential lines. The ultralow variation of the capacitance ensures very low influence on signal-skew. The large bandwidth make it compatible with HDMI2.0.4k/2k (=5.94 Gbps) and USB3.1 (= 10 Gbps). The device is packaged in μQFN 2.5 mm x 1 mm with a 500 μm pitch. DS9805 - Rev 6 - February 2019 www.st.com For further information contact your local STMicroelectronics sales office.

HSP051-4M10 Characteristics 1 Characteristics Table 1. Absolute maximum ratings T = 25 °C amb Symbol Parameter Value Unit IEC 61000-4-2 contact discharge 8 VPP Peak pulse voltage kV IEC 61000-4-2 air discharge 25 Tj Operating junction temperature range -40 to +150 °C Tstg Storage temperature range -65 to +150 °C TL Maximum lead temperature for soldering during 10 s 260 °C Table 2. Electrical characteristics T = 25 °C amb Value Symbol Parameter Unit Min. Typ. Max. VBR IR = 1 mA 4.5 5.8 V IRM VRM = 3.6 V 10 100 nA VCL IPP = 1 A, 8/20 µs 10 V VCL IEC 61000-4-2, +8 kV contact (IPP = 16 A), measured at 30 ns 13 V I/O to GND 0.48 Ω Rd Dynamic resistance, pulse duration 100 ns GND to I/O 0.96 Ω CI/O - I/O VI/O = 0 V, F = 200 MHz to 9 GHz 0.2 0.3 pF F = 200 MHz to 2.5 GHz 0.4 0.55 pF CI/O - GND VI/O = 0 V F = 2.5 GHz to 9 GHz 0.35 0.45 pF fC -3dB 10 GHz Zdiff Time domain reflectometry: tr = 200 ps (10 - 90%), Z0 = 100 Ω 85 100 115 Ω DS9805 - Rev 6 page 2/12

HSP051-4M10 On-board measurements 1.1 On-board measurements Figure 1. Leakage current versus junction temperature Figure 2. S21 attenuation measurement (typical values) S21 (db) IR(nA) 0 100 -0.5 -1 10 -1.5 -2 Tj(°C) -2.5 1 F (Hz) 25 50 75 100 125 150 -3 100k 1M 10M 100M 1G 10G 0 V 3.6 V 2.5 V Figure 3. Eye diagram - HDMI mask at 3.35 Gbps per Figure 4. Eye diagram - HDMI mask at 3.35 Gbps per channel(1)(without HSP051-4M10) channel(1) (with HSP051-4M10) DS9805 - Rev 6 page 3/12

HSP051-4M10 On-board measurements Figure 5. Eye diagram - HDMI 2.0 mask at 5.94 Gbps per Figure 6. Eye diagram - HDMI 2.0 mask at 5.94 Gbps per channel (without HSP051-4M10) channel (with HSP051-4M10) Figure 7. Eye diagram - USB 3.0 mask at 5.0 Gbps per Figure 8. Eye diagram - USB 3.0 mask at 5.0 Gbps per channel (without HSP051-4M10) channel (with HSP051-4M10) Figure 9. Eye diagram - USB 3.1 mask at 10.0 Gbps per Figure 10. Eye diagram - USB 3.1 mask at 10.0 Gbps per channel (without HSP051-4M10) channel (with HSP051-4M10) DS9805 - Rev 6 page 4/12

HSP051-4M10 On-board measurements Figure 11. ESD response to IEC 61000-4-2 (+8 kV contact Figure 12. ESD response to IEC 61000-4-2 (-8 kV contact discharge) discharge) 50 V / Div 50 V / Div 1V : Peak clamping voltage 2VCL:clamping voltage at 30 ns 3VCL:clamping voltage at 60 ns 4VCL:clamping voltage at 100 ns 4 -2 V CL 1184 V 3 -5 V 2 -13 V 1-147 V 213 V 3 11 V 410 V 12VVCCLL: :Pcleaamkp cinlagm vpoilntagg veo @lta g3e0 ns 3VCL:clamping voltage @ 60 ns 4VCL:clamping voltage @ 100 ns 20 ns / Div 20 ns / Div Figure 13. TLP measurement (pulse duration 100 ns) Figure 14. TDR measurement IPP (A) 20 18 16 14 12 I/O to GND GND to I/O 10 8 6 4 2 VCL(V) 0 0 5 10 15 20 DS9805 - Rev 6 page 5/12

HSP051-4M10 Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 2.1 μQFN-10L dimension values • Epoxy meets UL94, V0 • Lead-free package Figure 15. μQFN-10L dimension definitions D 1 R 0.125 b1 5 L E PIN 1 ID 10 6 e b A A1 Seating plane A2 Table 3. μQFN-10L dimension values Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.40 0.47 0.50 0.018 0.018 0.020 A1 0.00 0.00 0.05 0.00 0.000 0.002 A2 0.13 0.005 b 0.15 0.20 0.25 0.006 0.008 0.009 b1 0.35 0.40 0.45 0.014 0.016 0.041 D 2.40 2.50 2.60 0.094 0.098 0.102 E 0.90 1.00 1.10 0.035 0.039 0.043 e 0.50 0.206 L 0.33 0.38 0.43 0.012 0.015 0.017 aaa 0.08 0.003 bbb 0.10 0.004 DS9805 - Rev 6 page 6/12

HSP051-4M10 μQFN-10L dimension values Figure 17. Marking Figure 16. Footprint recommendations (dimensions in mm) H 1 M 0.50 0.40 0.20 0.58 1.40 2.20 Note: Product marking may be rotated by 180° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 18. μQFN-10L tape and reel specification Dot identifying PinA1 location Ø 1.55 2.0 4.0 0.25 5 7 1. 5 2.7 5.5 8.0 H1 H1 H1 M M M 1.35 4.0 0.55 All dimensions are typical values in mm User direction of unreeling DS9805 - Rev 6 page 7/12

HSP051-4M10 Recommendation on PCB assembly 3 Recommendation on PCB assembly Figure 19. μQFN-10L dimension definitions Copper Thickness: 100µm Stencilwindow Footprint 13 µm 13 µm 7 µm 7 µm 10 µm 10 µm m m m m 550 µ 530 µ 550 µ 530 µ 374 µm 186 µm 10 µm 10 µm 400 µm 200 µm 3.1 Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed. 4. Solder paste with fine particles: powder particle size is 20-45 μm. 3.2 Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ±0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. DS9805 - Rev 6 page 8/12

HSP051-4M10 PCB design preference 3.3 PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. Figure 20. Printed circuit board layout recommendations 1 10 500 µm Via to Via to GND GND 5 6 Footprint pad PCB tracks 3.4 Reflow profile Figure 21. ST ECOPACK® recommended soldering reflow profile for PCB mounting 240-245 °C Temperature (°C) -2°C/s 250 2 - 3 °C/s 200 60sec (90max) -3°C/s 150 -6°C/s 100 0.9 °C/s 50 Time (s) 0 30 60 90 120 150 180 210 240 270 300 Note: Minimize air convection currents in the reflow oven to avoid component movement. Note: Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020. DS9805 - Rev 6 page 9/12

HSP051-4M10 Ordering information 4 Ordering information Figure 22. Ordering information scheme HSP 05 1 - 4 M10 High speed line protection Breakdown voltage Version Number of lines Package µQFN-10L Table 4. Ordering information Order code Marking Package Weight Base qty. Delivery mode HSP051-4M10 H1M μQFN-10L 3.27 mg 3000 Tape and reel DS9805 - Rev 6 page 10/12

HSP051-4M10 Revision history Table 5. Document revision history Date Version Changes 29-Jul-2013 1 Initial release. 15-Oct-2013 2 Updated status to production data. 17-Jun-2014 3 Updated Figure 19. Updated Features, Applications and Description. Updated Table 1 and Table2. 14-Nov-2014 4 Added Figure 6 to Figure 11. 22-Feb-2018 5 Added a note for Figure 17. Marking. 07-Feb-2019 6 Updated links syntax. DS9805 - Rev 6 page 11/12

HSP051-4M10 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS9805 - Rev 6 page 12/12