HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Typical Applications Features The HMC992LP5E is ideal for: Wide Gain Control Range: -10 to +38 dB T • Cellular/3G Infrastructure High Output IP3: +40 dBm M • WiBro / WiMAX / 4G Positive Analog Control: 0V to +5V S E Configurable with 1 or 2 Attenuators • Microwave Radio & VSAT - 32 Lead 5x5 mm SMT Package: 25 mm2 L • Test Equipment and Sensors O • IF & RF Applications T R T Functional Diagram General Description N O The HMC992LEP5E is an IF analog controlled variable C gain amplifier composed of two identical voltage variable attenuators in combination with an InGaP N HBTL gain block MMIC amplifier which operates from I A 0.1 to 0.8 GHz, and can be controlled to provide G anywhere from -10 dB attenuation, to 40 dB of gain. The HMC992LP5E delivers noise figure of 6 dB in C O I its maximum gain state, with output IP3 of up to T +40 dBm. The HMC992LP5E is housed in a RoHS A M compliant 5x5 mm QFN leadless package, and requ- S ires no external matching components. O T U A B Electrical Specifications, O T = +25° C, 50 Ohm System, Vdd = ATTN1Vdd = ATTN2Vdd = DETVDD = +5V [1] A PPaarraammeetteerr FFrreeqquueennccyy MMiinn.. TTyypp.. MMaaxx.. UUnniittss 0.1 - 0.5 GHz 40 dB 1 Attenuator Operation 35 0.8 GHz 36 dB Gain (VCTRL = 0V) 0.1 - 0.3 GHz 38 2 Attenuator Operation 0.5 GHz 32 36 dB 0.8 GHz 33 0.1 - 0.5 GHz 25 1 Attenuator Operation dB 0.8 GHz 20 Gain Control Range 0.1 - 0.5 GHz 48 2 Attenuator Operation dB 0.8 GHz 42 0.1 - 0.5 GHz 15 1 Attenuator Operation dB 0.8 GHz 12 Input Return Loss (VCTRL = 0V) 2 Attenuator Operation 0.1 - 0.8 GHz 12 dB 0.1 GHz 11 1 Attenuator Operation 0.3 - 0.5 GHz 12 dB Output Return Loss (VCTRL = 0V) 0.8 GHz 14 2 Attenuator Operation 0.1 - 0.8 GHz 12 dB InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 1 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Electrical Specifications (continued), T = +25° C, 50 Ohm System, Vdd = ATTN1Vdd = ATTN2Vdd = DETVDD = +5V [1] A Parameter Frequency Min. Typ. Max. Units 0.1 GHz 42 Output Third Order Intercept Point 0.3 GHz 44 dBm T (Two-Tone Output Power= 0 dBm Each Tone) (VCTRL = 0V) 0.5 GHz 39 dBm M 0.8 GHz 35 E S 0.1 GHz 18.5 0.3 GHz 18.9 dBm - Output Power for 1dB Compression (VCTRL = 0V) 0.5 GHz 19 dBm L 0.8 GHz 18.8 O Noise Figure (VCTRL = 0V) T6 dB R Supply Current (Idd) 215 mA T Power Detector N Typ. ETyp. Typ. Units O Input Frequency 100 500 900 MHz C ±3 dB Dynamic Range 61 61 62 dB N DETOUT Slope L17.2 17.2 17.1 mV/dB I A DETOUT Intercept -68.1 -68.6 -68.9 dBm G Variation of DETOUT with -1.3 -1.2 -1.2 dB Temperature from -40°C to +85°C @20dBm Input O C [1] Unless otherwise noted, test conditions: ATTN1 + ATTN2 + AMP1 + AMP2 in cascade. I T A M S O T U A B O InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 2 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Gain vs. VCTRL @ 100MHz[1] Gain vs. VCTRL @ 100MHz[2] 45 40 T 40 M 35 30 L - S GAIN (dB) 223050 GAIN (dB) 1200 E O 15 0 T R 10 +25C +25C +85C -10 +85C T 5 -40C -40C N 0 -20 O 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 E1 1.5 2 2.5 3 3.5 4 4.5 5 C VCTRL (V) VCTRL (V) N L I A Gain vs. VCTRL @ 300MHz[1] Gain vs. VCTRL @ 300MHz[2] G 45 40 C 40 O I 35 30 T A 30 OM GAIN (dB) 2205 S GAIN (dB) 1200 T 15 0 U 10 +25C +25C A 5 +-4805CC B -10 +-4805CC 0 -20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) O Gain vs. VCTRL @ 500MHz[1] Gain vs. VCTRL @ 500MHz[2] 45 40 40 35 30 30 GAIN (dB) 2205 GAIN (dB) 1200 15 0 10 +25C +25C +85C -10 +85C 5 -40C -40C 0 -20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) [1] ATTN1 + AMP1 + AMP2, CT1=0V [2] ATTN1 + ATTN2 + AMP1 + AMP2, CT1=0V InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 3 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Gain vs. VCTRL @ 800MHz[1] Gain vs. VCTRL @ 800MHz[2] 45 40 40 T 35 30 M GAIN (dB) 223050 GAIN (dB) 1200 E L - S 15 0 O T 10 +25C +25C R +85C -10 +85C 5 -40C -40C T 0 -20 N 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 E1 1.5 2 2.5 3 3.5 4 4.5 5 O VCTRL (V) VCTRL (V) C N L I Gain vs. Frequency over VCTRL[1][3] Gain vs. Frequency over VCTRL[2][3] A G 45 50 0V-0.1V 0V-0.1V 40 O C 40 35 1.5V TI 2V 30 30 1.5V A GAIN (dB) 2205 2.5V 3V S GAIN (dB) 1200 2V OM 15 0 2.5V 3V T 10 4V-5V U -10 A 5 B 4V-5V 0 -20 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 FREQUENCY (GHz) FREQUENCY (GHz) O Input Return Loss vs. VCTRL @ 100MHz[1] Input Return Loss vs. VCTRL @ 100MHz[2] 0 0 -5 -5 S (dB)-10 ++-428055CCC S (dB)-10 S-15 S-15 O O L L N -20 N -20 R R TU-25 TU-25 E E R R T -30 T -30 U U NP-35 NP-35 +25C I I +85C -40 -40 -40C -45 -45 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) [1] ATTN1 + AMP1 + AMP2, CT1=0V [2] ATTN1 + ATTN2 + AMP1 + AMP2, CT1=0V [3] At 25°C InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 4 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Input Return Loss vs. VCTRL @ 300MHz[1] Input Return Loss vs. VCTRL @ 300MHz[2] 0 0 T -5 -5 M dB)-10 dB)-10 S ( S ( S OS-15 OS-15 E L L N -20 N -20 - R R L ETU-25 ETU-25 R R O T -30 T -30 U U T TR INP--4305 ++-428055CCC INP--4305 ++-428055CCC N -45 -45 O 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1E1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) C N L I A Input Return Loss vs. VCTRL @ 500MHz[1] Input Return Loss vs. VCTRL @ 500MHz[2] G 0 0 C -5 O -5 TI S (dB)-10 S (dB)-10 A S-15 S-15 O O M N L-20 N L-20 R R O TU-25 S TU-25 E E R R T T -30 T -30 U U AU INP-35 ++2855CC INP-35 ++2855CC -40 -40C B -40 -40C -45 -45 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) O Input Return Loss vs. VCTRL @ 800MHz[1] Input Return Loss vs. VCTRL @ 800MHz[2] 0 0 -5 -5 dB)-10 dB)-10 S ( S ( S-15 S-15 O O L L N -20 N -20 R R TU-25 TU-25 E E R R T -30 T -30 U U INP-35 ++2855CC INP-35 +25C -40 -40C -40 +-4805CC -45 -45 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) [1] ATTN1 + AMP1 + AMP2, CT1=0V [2] ATTN1 + ATTN2 + AMP1 + AMP2 , CT1=0V InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 5 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Output Return Loss vs. VCTRL Output Return Loss vs. VCTRL @ 100MHz[1] @ 100MHz[2] 0 0 S (dB) --42 ++-428055CCC S (dB) --42 ++-428055CCC MT S -6 S -6 RN LO -8 RN LO -8 E S U-10 U-10 - T T RE-12 RE-12 L PUT -14 PUT -14 T O UT-16 UT-16 R O O -18 -18 T -20 -20 N 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1E1.5 2 2.5 3 3.5 4 4.5 5 O VCTRL (V) VCTRL (V) C N Output Return Loss vs. VCTRL OutLput Return Loss vs. VCTRL I A @ 300MHz[1] @ 300MHz[2] G 0 0 S (dB) --42 ++-428055CCC O S (dB) --42 ++-428055CCC TIC S -6 S -6 O O A N L -8 N L -8 M R R U-10 U-10 ET S ET O R-12 R-12 PUT -14 PUT -14 T T T U U-16 U-16 O O A -18 B -18 -20 -20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) O Output Return Loss vs. VCTRL Output Return Loss vs. VCTRL @ 500MHz[1] @ 500MHz[2] 0 0 S (dB) --42 ++-428055CCC S (dB) --42 ++-428055CCC S -6 S -6 O O N L -8 N L -8 R R U-10 U-10 T T E E R-12 R-12 T T PU-14 PU-14 T T U-16 U-16 O O -18 -18 -20 -20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) [1] ATTN1 + AMP1 + AMP2, CT1=0V [2] ATTN1 + ATTN2 + AMP1 + AMP2 , CT1=0V InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 6 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Output Return Loss vs. VCTRL Output Return Loss vs. VCTRL @ 800MHz[1] @ 800MHz[2] 0 0 MT S (dB) --42 ++-428055CCC S (dB) --42 ++-428055CCC S -6 S -6 S N LO -8 N LO -8 E R R - U-10 U-10 ET ET L R-12 R-12 O TPUT -14 TPUT -14 T R U-16 U-16 O O T -18 -18 N -20 -20 O 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1E1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) C N L I A Output IP3 vs. VCTRL @ 100MHz [1] Output IP3 vs. VCTRL @ 300MHz [1] G 50 50 C 48 +25C O 48 +85C I 46 -40C 46 T A 44 44 M Bm) 42 Bm) 42 d d O P3 ( 40 S P3 ( 40 OI 38 OI 38 T 36 36 U 34 34 +25C +85C A 32 B 32 -40C 30 30 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) O Output IP3 vs. VCTRL @ 500MHz [1] Output IP3 vs. VCTRL @ 800MHz [1] 44 44 42 42 +25C +85C 40 40 -40C m) m) B 38 B 38 d d 3 ( 3 ( OIP 36 OIP 36 34 34 +25C 32 +-4805CC 32 30 30 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCTRL (V) VCTRL (V) [1] ATTN1 + AMP1 + AMP2, CT1=0V [2] ATTN1 + ATTN2 + AMP1 + AMP2 , CT1=0V InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Output IP2 vs. Frequency over Output IP2 vs. Frequency over VCTRL [1] [2] Temperature [1] [3] 70 70 VCTL=0V 65 VVCCTTLL==12VV 65 ++2855CC T VCTL=3V -40C M VCTL=4V m) 60 VCTL=5V m) 60 E S dB dB P2 ( 55 P2 ( 55 - OI OI L 50 50 O T R 45 45 T 40 40 N 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.1 0.2 E0.3 0.4 0.5 0.6 0.7 0.8 O FREQUENCY (GHz) FREQUENCY (GHz) C Input IP3 vs. Frequency over N L Input IP3 vs. Frequency over VCTRL [1][2][5] Temperature [1][3][5] AI 40 10 G 30 O C 5 I T 20 m) m) 0 A B B 3 (d 10 3 (d M IIP S IIP -5 O 0 T -10 VCTL=0V VCTL=3V -10 ++2855CC U VCTL=1V VCTL=4V -40C VCTL=2V VBCTL=5V A -20 -15 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 FREQUENCY (GHz) FREQUENCY (GHz) O Output P1dB vs. Frequency over Noise Figure vs. Frequency over Temperature [1] [4] Temperature [1] [3] 19.2 12 +25C 10 +85C 19 -40C m) 8 dB18.8 B) dB ( F (d 6 1 N P18.6 O 4 18.4 ++2855CC 2 -40C 18.2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 FREQUENCY (GHz) FREQUENCY (GHz) [1] ATTN1 + AMP1 + AMP2 [2] At 25°C [3] VCTRL= 0V [4] VCTRL= 4V [5] CT1=0V InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 8 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Absolute Maximum Ratings VDD, DETVDD, DETEN, Continuous Pdiss (T=85 °C) DETSET,DETRSSI, AMP1OUT, +5.6 V 3.16 W Derate 78.88 mW/°C above 85 °C T AMP2OUT Thermal Resistance (R ) M VCTRL -0.6V to VDD+0.6V th 12.68°C/W (junction to package bottom) S ATTN1IN, ATTN2IN Input Power +20 dBm Storage Temperature -65 toE +150 °C - AMP1IN RF Input Power +10 dBm Operating Temperature -40 to +85 °C AMP2IN RF Input Power +15 dBm L ESD Sensitivity (HBM) Class 1B O DETOUT Output Current 5 mA DETIN RF Iput Power 12 dBm T R Junction Temperature 125°C T ELECTROSTATIC SENSITIVE DEVICE N OBSERVE HANDLING PRECAUTIONS O Outline Drawing E C N L I A G C O I T A M S O T U A B O NOTES: 1. PACKAGE BODY MATERIAL: LOW STRESS INJECTION MOLDED PLASTIC SILICA AND SILICON IMPREGNATED. 2. LEAD AND GROUND PADDLE MATERIAL: COPPER ALLOY. 3. LEAD AND GROUND PADDLE PLATING: 100% MATTE TIN. 4. DIMENSIONS ARE IN INCHES [MILLIMETERS]. 5. LEAD SPACING TOLERANCE IS NON-CUMULATIVE. 6. CHARACTERS TO BE HELVETICA MEDIUM, .025 HIGH, WHITE INK, OR LASER MARK LOCATED APPROX. AS SHOWN. 7. PAD BURR LENGTH SHALL BE 0.15mm MAX. PAD BURR HEIGHT SHALL BE 0.25mm MAX. 8. PACKAGE WARP SHALL NOT EXCEED 0.05mm 9. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. 10. REFER TO HITTITE APPLICATION NOTE FOR SUGGESTED PCB LAND PATTERN. Package Information Part Number Package Body Material Lead Finish MSL Rating Package Marking [1] HMC992LP5E RoHS-compliant Low Stress Injection Molded Plastic 100% matte Sn MSL1 [2] H992 XXXX [1] 4-Digit lot number XXXX [2] Max peak reflow temperature of 260 °C InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 9 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Pin Descriptions Pin Number Function Description Interface Schematic T M E S ACG1, ACG4, 1, 3, 5-6, 28, 30 ACG5, ACG6, AC ground capacitance connection pin. - ACG3, ACG2 L O T R T ATTN2OUT, These ports are matched to 50 Ohms. N 2, 29 ATTN1OUT Blocking capacitor is required. E O C 4, 9, 31 VDD Power supply for the attenuator. External by pass N capacitors are required. See applicatiLon circuit. I A G ATTN2IN, These ports are matched to 50 Ohms. 7, 32 ATTN1IN Blocking capacitOor is required. C I T A M S Attenuation control voltage for the attenuator. O 8 VCTRL 0V for minimum attenuation, 5V for maximum attenuation. T U A B No connection required. These pins may be connected to 10, 11, 26 N/C RF ground without affecting performance. O 12 CT1 Reserved pin and should be connected to ground. Logarithmic output that converts the input power to a DC 13 DETOUT level in controller mode. Output voltage increases with increasing amplitude. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 10 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Pin Descriptions (continued) Pin Number Function Description Interface Schematic T Power supply for the attenuator. External by pass M 14 DETVDD capacitors are required. See application circuit. S E - 15, 17, 22, 24 GND These pins must be connected to RF ground. L O T R T N O E 16 DETIN Detector RF input pin. C N L I A G C O I T A Enable pin. M 18 DETEN Apply VEN > 0.8xVcc for normal operation. Apply VSEN < 0.2xVcc to disable the detector. O T U A B O Set point input for controller mode. 19 DETSET Connect to DETOUT with the resistor network shown in evaluation board drawing for detector mode. Connection for ground referenced external lowpass filter 20 DETRSSI capacitor. These ports are mathed to 50 Ohms. External Choke AMP2OUT, 21, 25 inductor and DC blocking capacitor are required. AMP1OUT See application circuit. AMP2IN, These ports are matched to 50 Ohms. 23, 27 AMP1IN Blocking capacitor is required. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 11 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Application Circuit T M E S - L O T R T N E O C N L I A G O C I T A M S O T U A B O InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 12 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Evaluation PCB T M S E - L RFIN1 T1 T2 O U U R J2 FO J3 FO J4 T R R T C13 RFOUT3 N O + 89 EJ5 CC C11 C 7 N RFIN2 C 20 21 10 L1 C C C 2LC25 AI J1 C3 C2 C2 C24 5 C14 G 2 2R1 R2 R C15 L RFDETIN C4 C C5 O R9 R10 J6 I N 9 8 7 AT SSIETE DDC641617 C1 C1R8 R11 C2 M RD V RCC 8 O ND S R3 R1 R5 G J7 T 6 R U D R13 29 30 A N 4 C C G B 1 R15 R VCTRL VSET DETOUT 600-00117-00-3 List of MaterialsO for Evaluation PCB EVAL01-HMC992LP5E[1] Item Description Item Description J1-J6 SMA Connector HMC992LP5E U1 IF-Automatic Gain Controller J7 DC Connector Header PCB [2] 600-00117-00 Evaluation PCB C2-C10, C22, C24 1 nF Capacitor, 0402 Pkg. [1] Reference this number when ordering complete evaluation PCB C11, C14,C17,C19, 100 pF Capacitor, 0402 Pkg. C21,C25 [2] Circuit Board Material: Rogers 4350 or Arlon 25 FR C13 33 µF Capacitor, Tantalum C15-C16, C18, C20, 0.1 µF Capacitor, 0402 Pkg. C27, C29 C30 1 µF Capacitor, 0603 Pkg. L1 110 nH Inductor, 0603 Pkg. L2 820 nH Inductor, 0603 Pkg. R1-R6, R9-R10, 0 Ohm Resistor, 0402 Pkg. R13, R18 R8 51 Ohms Resistor, 0402 Pkg. R11, R15 10 kOhms Resistor, 0402 Pkg. R14 1 kOhms Resistor, 0402 Pkg. R25 240 Ohms Resistor, 0402 Pkg. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 13 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Application Information Introduction T The HMC992LP5E is a complete high performance Automatic Gain Control (AGC) solution, housing a Variable Gain M Amplifier (VGA) core and a control core in a single package. Its unique VVA technology provides constant OIP3 over the entire control voltage range. The HMC992LP5E greatly simplifies the design of gain control loEops by increasing S the integration level and reducing the number of required circuit elements. The VGA core of the HMC992LP5E is - composed of two identical voltage variable attenuators followed by two gain block amplifiers which operate from 10 L to 800 MHz. The HMC992LP5E’s control core features a high accuracy log detector. As shown in the functional block O T diagram, the HMC992LP5E combines all of these cores in a highly compact 5 x 5 mm plastic package, and offers an R easy-to-use, temperature stable AGC solution. T N The HMC992LP5’s VGA core has a flexible structure where a single attenuator (23dB) or two attenuators (46dB) can E O be used depending upon the dynamic range requirement. The HMC992LP5E is designed to operate in a 50 Ohms impedance system. Inputs and outputs of the HMC992LP5E’s attenuators and amplifiers (ATTIN1, ATTOUT1, ATTIN2, C ATTOUT2, AMPIN1, AMPOUT1, AMPIN2, AMPOUT2) are broadband matched to 50 Ohms single-ended and require N only external DC blocking capacitors over the entire frequency baLnd of operation. The input of the HMC992LP5E’s I built in log detector (RFDETIN) is also broadband matched to 50 Ohms with a single-ended input interface and does A not require any matching components. G The HMC992LP5E requires a single 5V supply with adequOate power supply decoupling as recommended in the appli- C cation schematic. I T A M S O T U A B O Figure 1a: The HMC992LP5E’s VGA configuration with 1 attenuator. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 14 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz T M S E - L O T R T N O E C N L I A G C O I T A M S O T U A B Figure 1b: The HMC992LP5E’s VGA configuration with 2 attenuators. O VGA Operation The HMC992LP5E’s VGA core can be configured with one or two variable attenuators followed by two fixed gain amplifiers for different control ranges as shown in Figure 1a and Figure 1b (basic connections are not shown). The blocks require only external DC blocking capacitors at their inputs and outputs for interconnections. Note that the link between VCTRL and DETOUT pins must be broken for correct VGA Operation. The VCTRL pin should be used to set the attenuation of the HMC992LP5E. Gain Control Interface VCTRL The VCTRL pin is the gain control pin common to both of HMC992LP5E’s identical voltage variable attenuators. The VCTRL gain control voltage ranges between 1V and 4V. A VCTRL control voltage of 1V provides the lowest attenuation, while 4V provides the highest attenuation. Figure 2 represents the VGA operation of HMC992LP5E with two attenuators and two amplifiers for different gain control voltages applied to the VCTRL pin. The output power increases linearly with the input power until the power saturation is reached when the VCTRL voltage is constant. The useable input power range of such a system is limited by the satura- tion level of the final stage amplifier. So the input power level required for power saturation and the dynamic range of the InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 15 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz 20 VCTRL=1 V VCTRL=2 V 10 VCTRL=3 V m) VCTRL=4 V B R (d 0 E T W O -10 M P T PU -20 E S UT O - -30 L O -40 T -70 -60 -50 -40 -30 -20 -10 0 10 R INPUT POWER (dBm) T Figure 2: Pout vs. Pin at 100 MHz, 1 attenuator N E O HMC992LP5E’s VGA is defined by the value of the gain control voltage applied to the VCTRL pin. Refer to the Figure 2 C for the useable input power range at different VCTRL levels. N When VCTRL=1V, the gain of HMC992LP5E’s VGA with 2 attenuatorLs is 39 dB at 100 MHz. The input power required for I A 1 dB compression point at the output is given by: Pin1dB = Pout1dB – Gain (dB) = 18 – 39 = -21 dB. G When VCTRL=2V, the gain of the HMC992LP5E’s VGA with 2 attenuators is 25 dB at 100 MHz. The input power required for 1 dB compression point at the output is given by: Pin1dOB = Pout1dB – Gain (dB) = 18 – 25 = -7 dB. C I Therefore, increasing the VCTRL pin voltage reduces the gain of the HMC992LP5E’s VGA and increases input power T A level required for power saturation. When the input signal is weak, the attenuation level of the variable attenuators M should be reduced. When the input signal is large; the attenuation level of the variable attenuators should be increased S to achieve a constant output level. O T The gain control performance of the HMC992LP5E at 300 MHz is shown in Figures 3a and 3b. The HMC992LP5E U provides 24 dB of gain control range with a maximum gain of 41.2 dB when it is configured in 1 attenuator + 2 ampli- A fiers mode, and similarly a 48 dB oBf gain control range with a maximum gain of 39 dB of gain when it is configured in 2 attenuators + 2 amplifiers mode. The HMC992LP5E’s VGA has a very flat linear-in-dB gain control characteristic with a slope of -18.2 dB/V for the 2 attenuator configuration and -9.1 dB/V for the 1 attenuator configuration. The log-linearity error of the HMC992LP5 VGA is typically less than ± 1dB over the entire gain control range as shown in Figure 3a and Figure 3b. The relationO between the gain of HMC992LP5E’s VGA and VCTRL pin voltage can be approximated as given in Equation (1). Gain (dB) = 52.5 – 9.1 x VCTRL with one attenuator Equation (1a) Gain (dB) = 61.0 – 18.2 x VCTRL with two attenuators Equation (1b) 45 3 40 Error 2 35 1 B) ER d R GAIN ( 30 0 OR (d 25 -1B) 20 IGdaeianl -2 15 -3 1 1.5 2 2.5 3 3.5 4 VCTRL (V) Figure 3a: Gain & Gain Conformance Error vs. VCTRL at 300 MHz, 1 attenuator + 2 amplifiers configuration. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 16 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz 40 3 T 30 2 M Error S B) 20 1 ER E d R L - GAIN ( 10 0 OR (d O 0 -1 B) T R -10 IGdaeianl -2 T N -20 -3 O 1 1.5 2 2.5 3 3.5 E4 VCTRL (V) C Figure 3b: Gain & Gain Conformance Error vs. VCTRL at 300 MHz, 2 attenuators + 2 amplifiers configuration. N L I Noise and Distortion A G As with any multistage VGA consisting of voltage variable attenuators and gain blocks, the noise figure (NF) and input referred distortion (IIP3) characteristics of the HMC992LP5E’s VGA are dependent on the gain control voltage VCTRL. C O When the attenuation level of the variable attenuators is set to minimum (maximum gain state), the noise figure of the I T HMC992LP5E’s VGA is minimized; however the IIP3 is degraded to minimum as well. The noise figure and IIP3 of the A HMC992LP5E’s VGA increases with the attenuation level of the variable attenuators. M For low attenuation levels, the noise contribution from the VGA is important since the input signal is weak. For high atten- S O uation levels of the variable attenuators, the noise contribution from the VGA is less important and the noise requirement T of the VGA is relaxed since the input signal is high. The noise figure performance of the HMC992LP5E’s VGA at 300 U MHz is shown in Figure 4. The HMC992LP5E’s VGA delivers a noise figure of 6 dB in its maximum gain state when it is A configured in 1 attenuator + 2 ampBlifiers mode. For low attenuation levels of the variable attenuators, IIP3 is less important since high gain of whole VGA improves dis- tortion performance at its output (OIP3). For high attenuation levels of the variable attenuators, IIP3 is more important because of low gain of whole VGA. The distortion performance of the HMC992LP5E’s VGA at 300 MHz is shown in O Figure 4. The HMC992LP5E’s VGA provides an almost constant OIP3 of up to +44 dBm in any state when it is config- ured in one attenuator and two amplifiers mode. 50 50 B) 40 40 d N ( OIP3 AI G 30 30O URE, Noise Figure IP3 (d E FIG 20 Gain 20Bm) S NOI 10 10 0 0 1 1.5 2 2.5 3 3.5 4 VCTRL (V) Figure 4: Noise Figure & Gain & OIP3 vs. VCTRL at 300 MHz, 1 attenuator. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 17 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz AGC Operation The HMC992LP5E can be configured as an AGC amplifier by using VGA core and the built in log detector. An example for AGC amplifier configuration of the HMC992LP5E is depicted in below figure. T M E S - L O T R T N E O C N L I A G O C I T A M S O T U A B O Figure 5: The HMC992LP5E’s AGC configuration with 2 attenuators. In AGC amplifier configuration, the input signal is amplified by the HMC992LP5E’s VGA. The output of the HMC992LP5E’s VGA core is fed back to the input of the HMC992LP5E’s log detector (RFDETIN) through an external coupler or attenu- ator to drop the maximum and minimum output level of the HMC992LP5E’s VGA to within the dynamic range of the HMC992LP5E’s log detector. The HMC992LP5E’s log detector produces a voltage at the output of the log detector (DETOUT) proportional to the output power level of the HMC992LP5E’s VGA. The high impedance output pin DETOUT is connected to the gain control pin VCTRL of VGA to form the AGC loop. The VSET pin is the constant output power set point of the AGC amplifier. As a result of negative feedback, the gain of the VGA is automatically adjusted to maintain a constant signal power level at the output of AGC amplifier. The output signal power level is determined by the AGC set point VSET, regardless of the input signal variation. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 18 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz AGC Set point Interface VSET T In closed loop AGC operation the output power level of the HMC992LP5E is controlled by the VSET pin. An input volt- M age between 0.2V and 1.2V should be applied to the VSET input pin to control the output power level. The VSET vs. S the output power characteristic is shown in Figure 6a and Figure 6b for different input power levels anEd different coupler ratios used. The slope of the gain vs. VSET characteristic is 57dB/V and it is independent of the coupler ratio used. - L In closed loop operation the HMC992LP5E is able to automatically adjust the RF gain over a gain adjustment range O of up to 46 dB at 100 MHz. The HMC992LP5E’s output dynamic range is a function of both input power level and the T R coupler ratio used to close the AGC loop. The combined effect of the input power and coupler ratio on the output power T dynamic range is presented in Figures 6a and 6b. N For high input power levels, the maximum level of output dynamic range is limited by the Psat of the VGA or the high- O est detectable power level by the log detector. To eliminate any limitations that Ecan arise due to highest detectable log C detector, a high enough coupler ratio should be chosen to translate the maximum VGA output power level to a value lower than the highest detectable log detector power level. N L I A G 30 C O TI 20 Input Power = -25 dBm A Bm) 10 IInnppuutt PPoowweerr == --2105 ddBBmm M R (d O WE 0 S O P T T -10 U PU 20 dB coupler is used A OUTB-20 -30 -40 0.2 0.4 0.6 0.8 1 1.2 VSET (V) O Figure 6a: Output Power vs. VSET over Input Power, 2 attenuators @ 300 MHz. 30 20 Coupler= -10 dBm m) Coupler= -20 dBm B 10 Coupler= -30 dBm d R ( WE 0 O P T -10 U P Input Power = -20 dBm UT -20 O -30 -40 0.2 0.4 0.6 0.8 1 1.2 VSET (V) Figure 6b: Output Power vs. VSET over coupler ratio, 2 attenuators @ 300 MHz. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 19 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Similarly, the lower side of the dynamic range is limited by the noise floor of the VGA or the lowest power level detect- able by the log detector. To eliminate any limitations on the lower side of the dynamic range, the coupler ratio should be T low enough to translate the minimum VGA output power level to a value higher than the lowest detectable log detector M power level. E S Please also refer to the Log Detector section for more information. - Figure 7a shows the output power vs. input power transfer characteristic of the HMC992LP5E over different VSET L voltages for a closed AGC loop configuration. For low and high input power levels the HMC992LP5E attenuation rage O T is saturated and the output is a linear function of the input. For input power levels within the dynamic range, the R HMC992LP5E automatically adjusts the attenuation level as shown in Figure 7c to maintain a constant output power T level. When Vset=0.6 V, the output power level is set to -13 dBm and the HMC992LP5E’s AGC amplifier provides a gain N control range of 46 dB from -51 dBm to -5 dBm with an excellent ripple within 0E.06 dB. O C N 10 -8 L I 20 dB coupler is used A -10 m) 0 m) G B B 20 dB coupler is used ER (d -10 O ER (d -12 C W W I O O -14 T T P -20 T P A U U P P -16 M T T U U O -30 VVSSEETTS==00..46VV O -18 ++ -284550CCC TO VSET=0.8V -40 -20 U -70 -60 -50 -40 -30 -20 -10 0 10 -70 -60 -50 -40 -30 -20 -10 0 10 A B INPUT POWER (dBm) INPUT POWER (dBm) Figure 7a: Output Power vs. input power over VSET, Figure 7b: Output Power vs. input power, 2 attenua- 2 attenuators @ 300 MHz. tors @ 400 MHz & VSET=0.6V O 5 20 dB coupler is used 4 T (V) 3 U O T E 2 D 1 VSET= 0.4V VSET= 0.6V VSET= 0.8V 0 -70 -60 -50 -40 -30 -20 -10 0 10 INPUT POWER (dBm) Figure 7c: DETOUT vs. input power over VSET, 2 attenuators @ 300 MHz. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 20 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Log Detector T The logarithmic detector of the HMC992LP5E converts the average envelope of RF input power to a proportional DC M voltage at its output (DETOUT), as shown in Figure 8. In detection mode, the DETOUT pin should be connected to S the VSET input. The HMC992LP5E’s logarithmic detector employs a successive compression technEology which deliv- ers 50 dB of dynamic range (±1dB) with high conversion accuracy over a wide input frequency range. Note that the - link between DETOUT and VCTRL pins must broken and DETOUT must connected to VSET via 1k Ohms resistor for L LOGAMP operation. O T R The HMC992LP5E’s logarithmic detector can be used in the controller mode where an external voltage is applied to the T VSET pin to create an AGC loop. The linear-in-dB behavior of the HMC992LP5E’s VGA and logarithmic detector creates N a linear AGC system. For linear operation, the signal fluctuations at the input of the log detector should remain within O the dynamic range of the log detector. In closed loop AGC operation, the HMC9E92LP5E’s response to large input level changes is not slew-rate limited, and the speed of the transient response can be adjusted through loop filter capacitors C C28 and C30 (see Figure 5). N To achieve maximum gain adjustment range of the HMC992LP5E, Lthe coupler ratio should be chosen based on the I A output power desired. A coupler ratio which translates the output power to the center (-25dBm) of the usable dynamic G range of the log detector should be chosen. The gain adjustment range of the HMC992L5E is maximized in this con- figuration. If the linear operation range of the HMC992LP5E is maximized by selecting the appropriate coupler ratio, the C O HMC992LP5E can handle larger changes in input level. For example, an input voltage of 0.6 V is applied to the Vset I T pin to set the constant output power level to -13 dBm. A coupler ratio of ~12 dB can be chosen to provide a maximum A dynamic range of 46 dBm. M S O T U A B 1.5 O 1.2 100 MHz 300 MHz 500 MHz 800 MHz T (V)0.9 U O T E0.6 D 0.3 0 -70 -60 -50 -40 -30 -20 -10 0 10 INPUT POWER (dBm) Figure 8: DETOUT vs. input power over frequency. InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 21 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicaaPyt iorhenso uonlrt ofertoh:m e9r wit7sis 8ues -eu2.n dS5ep0re ca-inf3iyc 3aptia4otne3sn ts ou rb jpeFacttae tnoxt c:r hig9ahn7tgs 8eo wf- 2Aithn5oau0lot g-n 3oDti3ecve7i.c 3eNso . POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

HMC992LP5E v03.1013 IF AUTOMATIC GAIN CONTROLLER (IF-AGC), 50 - 800 MHz Loop Bandwidth and Response Time The AGC system has a response time to undesired input level fluctuations. Response time and the stability of the T HMC992LP5E’s AGC loop is determined by C28 and C30 in the application schematic. The HMC992LP5E’s response M to voltage changes in VSET with C28=C30=1µF when the input level is kept constant is shown in FigEure 9. S - L O T R 3.5 T N E O 3 C N V) 2.5 L I L ( A R G T C V 2 O C I T A 1.5 Pin= -30 dBm M S O T 1 U 0 50 100 150 200 250 300 350 400 450 500 A B TIME (ms) Figure 9: HMC992LP5E’s gain control voltage when VSET is toggled between 0.4V - 0.8V and input level is kept constant in closed loop. O InfoFrmoart iopn rfiucrneis,h edde blyi vAenraylo ga Dnedvic teos ips lbaelcieeve do rtod beer sac:c Huraittet iatned Mreliiacbrleo. wHoawveeve rC, noo rpoForar tpioricne,, 2d eElilviezrayb, aentdh tDo rpivlaec,e C ohrdeelrms: sAfonardlo,g MDeAv i0ce1s8, 2In4c., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that maPy rhesounlt fero:m 9 it7s 8us-e2. S5p0ec-if3ic3ati4on3s s u b jeFcta tox c: h9an7g8e w-2ith5ou0t -n3oti3ce7. 3No POhrodnee:r 7 O81n-3-2li9n-e4 7a0t0 w(cid:127) wOrwde.hr oitntliitnee. cato wmww.analog.com 22 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks arAe tphep plriocpearttyi oof nth eSir urepsppecotivret :o wPnehrso.ne: 978-250-3A3p4p3li c aotrio na Spuppsp@orht: iPtthitoen.ec: o1-m800-ANALOG-D

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