HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Typical Applications Features the HMc794LP3e is ideal for: Low noise Floor: -163 dBc/Hz at 10 MHz offset t and -160 dBc/Hz at 100 kHz offset • LO Generation with Low Noise Floor M Programmable Frequency Divider, n = 1, 2, 3 or 4 • Clock Generators s 200 MHz to 2 GHz input Frequency range • Mixer LO Drive - 50% Duty cycle outputs s • Military Applications r up to +10 dBm output Power • Test Equipment o sleep Mode: consumes <1 µA • Sensors t 16 Lead 3X3 mm sMt Package: 9mm2 c e t Functional Diagram General Description e D the HMc794LP3e is a siGe BicMos low noise programmable frequency divider in a 3x3mm lead- & less surface mount package. the circuit can be s programmed to divide from n = 1 to n = 4 in the r 200 MHz to 2 GHz input frequency range. the high e level output power (up to 10 dBm) with a very low D ssB phase noise and 50% duty cycle makes this i device ideal for low noise clock generation, Lo v generation and Lo drive applications. configurable i D bias controls allow power minimization of up to 20%. y c n e u q e Electrical Specifications, T = +25° C, Vcc = +5V, Z = 50Ω, Bias1 = GND o r A F Parameter conditions Min. typ. Max. units RF Input Characteristics Max rF input Frequency 2 GHz Min rF input Frequency 200 MHz rF input Power note: best ssB Phase noise for Pin > 5 dBm -2 3 10 dBm Divider Output Characteristics Programmable in 2 steps Differential output Power -3 10 12 dBm (see the Pout plots for each division ratio) ssB Phase noise @ 10 MHz offset -163 dBc/Hz ssB Phase noise @ 100 kHz offset +5 dBm input Power, 2 GHz input -160 dBc/Hz ssB Phase noise @ 10 kHz offset -153 dBc/Hz Duty cycle for Differential Mode +5 dBm input Power 50 ±3 % Logic Inputs viH input High voltage 3 5 v viL input Low voltage 0 0.4 v InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 1 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Electrical Specifications, T = +25° C, Vcc = +5V, Zo = 50Ω, Bias1 = GND (Continued) A Parameter conditions Min. typ. Max. units Power Supplies t vcc Analog supply 4.75 5 5.25 v M Current Consumption s itot - total current consumption 5v supply 100 150 mA - 5v supply, ctrL = 0v, BiAs0 = 0v 100 130 mA s itot - total current consumption [1] ctrL = 0v, BiAs0 = 5v 109 150 mA r ctrL = 5v, BiAs0 = 0v 115 150 mA o sleep current en = 0v 1 µA t cBias reference voltage [2] Measured with 10 GΩ volt meter 3.8 v c [1] Bias0 = 0v, for maximum frequency range; Bias0 = 5v, for better phase noise floor; ctrL = 5v, for maximum output power e [2] cBias voltage pin cannot drive external load. it must be measured with a 10 GΩ volt meter such as Agilent 34410A, typical 10 Mohms DvM will read erroneously. t e D Residual Phase Noise Input Sensitivity Window Divide by 1, 2, 3 & 4, (Differential) [3] & 20 -120 s r 15 -130 Div By 1 z) Div By 2 e WER (dBm) 105 Recommended OISE (dBc/H--115400 DDiivv BByy 34 viD PO Operating Window E N Di INPUT -05 SB PHAS--117600 cy S n -10 -180 0 0.5 1 1.5 2 2.5 101 102 103 104 105 106 107 e INPUT FREQUENCY (GHz) OFFSET FREQUENCY (Hz) u q e Pout vs. Div Ratio [4], (Single-Ended) Pout vs. Div Ratio [4], (Differential) r F 15 15 10 10 m) m) B B d d R ( 5 R ( 5 E E W W O O T P 0 Div by 1 T P 0 Div by 1 PU Div by 2 PU Div by 2 OUT -5 DDiivv bbyy 34 OUT -5 DDiivv bbyy 34 -10 -10 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) [3] ctrL = +5v, Bias0 = 0v, Pin = +8 dBm @ 2 GHz [4] ctrL = +5v, Bias0 = 0v, Pin = +4 dBm InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 2 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Pout Divide-by-1 vs. Temperature [1], Pout Divide-by-2 vs. Temperature [1], (Single-Ended) (Single-Ended) 10 10 t M 5 5 m) m) s ER (dB 0 ER (dB 0 - W W O O +25°C rs PUT P -5 PUT P -5 + -8450°°CC o OUT -10 ++2855°°CC OUT-10 -40°C t c -15 -15 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 e INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) t e D Pout Divide-by-3 vs. Temperature [1], Pout Divide-by-4 vs. Temperature [1], & (Single-Ended) (Single-Ended) s 10 10 r e 5 5 m) m) D B B d d i R ( 0 R ( 0 v E E W W Di T PO -5 ++2855°°CC T PO -5 ++2855°°CC PU -40°C PU -40°C y OUT -10 OUT-10 c n -15 -15 e 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) u q e Pout Divide-by-3 vs. CTRL & Bias0 [2] Pout Divide-by-4 vs. CTRL & Bias0 [2] r (Single-Ended) (Differential) F 10 15 10 5 m) m) B B 5 d d R ( 0 R ( E CTRL = 0V, BIAS0= 0V E OW CTRL = 5V, BIAS0 = 0V OW 0 CTRL = 0V, BIAS0 = 0V UT P -5 CTRL = 0V, BIAS0 = 5V UT P -5 CCTTRRLL == 50VV,, BBIIAASS00 == 05VV P P T T OU -10 OU -10 -15 -15 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) [1] ctrL = 0v, Bias0 = 0v, Pin = +4 dBm [2] Pin = +4 dBm InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 3 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Pout Divide-by-4 vs. Temperature [1], Pout Divide-by-4 vs. Supply Voltage [1], (Differential) (Differential) 10 10 t 5 5 M m) m) WER (dB 0 ++ -284550°°°CCC WER (dB 0 455...702505VVV - s O O P -5 P -5 s T T U U r P P OUT-10 OUT -10 o t -15 -15 c 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) e t e D Divide-by-1 Harmonics [1], (Differential) Divide-by-2 Harmonics [1], (Differential) & 10 10 s 0 H2 r 0 H3 -10 H4 e Bc) Bc) -10 H5 D d -20 d L ( L ( i E E v V -30 V -20 E E L L i PUT -40 PUT -30 D T H2 T U -50 U y O H3 O -60 H4 -40 c H5 n -70 -50 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 e INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) u q e r Divide-by-3 Harmonics [1], (Differential) Divide-by-4 Harmonics [1], (Differential) F 10 10 H2 H2 0 H3 0 H3 H4 H4 Bc) -10 H5 Bc) -10 H5 d d L ( L ( E E V -20 V -20 E E L L T T PU -30 PU -30 T T U U O O -40 -40 -50 -50 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) [1] ctrL = 0v, Bias0 = 0v, Pin = +4 dBm InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 4 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Divide-by-4 Harmonics [1], (Differential) Divide-by-4 Harmonics [2], (Single-Ended) 10 0 t 0 -10 M s dBc) -10 dBc) -20 EL ( EL ( -30 - V -20 V E E s T L T L -40 r TPU -30 H2 TPU -50 H2 to OU -40 HHH345 OU -60 HHH345 c -50 -70 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 e INPUT FREQUENCY (GHz) INPUT FREQUENCY (GHz) t e D Programming Truth Table & Absolute Maximum Ratings for Frequency Division Ratios s rF input Power 13 dBm B1 B0 Divide-by r supply voltage (vcc) 5.5v 0 0 1 e control inputs 0 1 2 5.5v D (B0, B1, ctrL, Bias0, en) 1 0 3 i Junction temperature 125 °c v 1 1 4 continuous Pdiss (t = 85 °c) i 1.3W 0 = Logic Low D (derate 33 mW/ °c above 85 °c) 1 = Logic High thermal resistance y 30 °c/W (Junction to ground paddle) Digital Control Input Voltages c storage temperature -65 to +125 °c n operating temperature -40 to +85 °c state B0, B1, ctrL, BiAs1, BiAs0, en e esD sensitivity (HBM) class 1A Low 0 to 0.4v u High 3v to 5v q e r eLectrostAtic sensitive Device Typical Supply Current vs. Vcc F oBserve HAnDLinG PrecAutions vcc (v) icc (mA) 4.75 105* 5.00 115* 5.25 125* note: HMc794LP3e will work over full voltage range above. * For ctrL = 0v, Bias0 = 0v [1] ctrL = 5v, Bias0 = 0v, Pin = +4 dBm [2] ctrL = 0v, Bias0 = 0v, Pin = +4 dBm InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 5 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Outline Drawing t M s - s r o t c e t e D & notes: s 1. LeADFrAMe MAteriAL: coPPer ALLoy 2. DiMensions Are in incHes [MiLLiMeters]. r 3. LeAD sPAcinG toLerAnce is non-cuMuLAtive e 4. PAD Burr LenGtH sHALL Be 0.15mm MAXiMuM. D PAD Burr HeiGHt sHALL Be 0.05mm MAXiMuM. i 5. PAcKAGe WArP sHALL not eXceeD 0.05mm. v 6. ALL GrounD LeADs AnD GrounD PADDLe Must i Be soLDereD to PcB rF GrounD. D 7. reFer to Hittite APPLicAtion note For suGGesteD Package Information PcB LAnD PAttern. y c Part number Package Body Material Lead Finish MsL rating Package Marking [1] n HMc794LP3e roHs-compliant Low stress injection Molded Plastic 100% matte sn MsL1 [2] 794 e XXX u [1] 4-Digit lot number XXXX q [2] Max peak reflow temperature of 260 °c e r F InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 6 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Pin Description Pin number Function Description interface schematic t M s 1 vcc +5v voltage supply - s r o t c rF Positive input. 2 rFinP e input is Dc coupled, external Dc blocks required.. t e D & s r e rF negative input. D 3 rFinn input is Dc coupled, external Dc blocks required... i v i D y c 4 GnD this pin must be connected to rF/Dc ground. n e Division ratio (LsB) 5 B0 u see programming truth table. q Division ratio (MsB) e 6 B1 see programming truth table. r F 7 ctrL Divider output Buffer Power control 13 BiAs1 For proper operation this pin should be grounded. 14 BiAs0 Digital core Bias control [1] 15 en chip enable no connection required. this pin may be 8, 9, 12 n/c connected to ground, without affecting performance. [1] Divider core Bias control Bit Bias0 = 0v, Divider core Minimum Bias Bias0 = 5v, Divider core Maximum Bias InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Pin Description (Continued) Pin number Function Description interface schematic t M s Divider negative output, open Drain. 10 ioutn typically 100 ohms connected to vcc. - s r o t c Divider Positive output, open Drain. e 11 ioutP typically 100 ohms connected to vcc. t e D & s r e D 16 cBiAs external Bypass Decoupling for Precision/Low noise Bias vi circuit i D y c n e u q e r F Application Note: the HMc794LP3e is a high performance rF divider. such dividers are high gain devices with internal feedback. the device will oscillate if used with Ac coupled rF inputs and if no rF input is applied. normally, if the rF input signal is removed the device should be disabled, or it should be placed in divide by 1 mode. the device is stable in divide by one mode with no rF input. the device will oscillate in divide 2, 3, or 4 modes with no rF input. in general very small rF input levels will stop all oscillations. At the minimum rated rF input sensitivity level or higher, no oscillations or spurious signals exist and excellent low noise performance is achieved. For input frequency lower than 200 MHz, square wave input signal is recommended. the divider output power for the differential mode, shows a roll off at lower frequencies due to the limited frequency range of the t6 & t7 (4:1) rF transformers, 500 MHz to 3000 MHz. InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 8 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Evaluation PCB t M s - s r o t c e t e D & s r e D i v i D y c n e u List of Materials for Evaluation PCB 124842 [1] q item Description item Description e J3 Dc connectors t6, t7 4:1 rF transformer, MABAct0065 r J7, J8 sMA-F Johnson connector tP1, tP3, tP4 Pc compact sMt F c1, c2, c4, c6, FB1, FB2 Murata BLM21AG02sniD 1 nF capacitor, 0402 Pkg. c10, c11 c12, c18 u1 HMc794LP3e Programmable Divider c3, c9, c14, c30, 0.1 µF capacitor, 0402 Pkg. u9 Hittite ultra Low noise quad regulator c31, c33, c34, c36 PcB [2] 124709 eval Board c5 10 µF capacitor, 1206 Pkg. [1] reference this number when ordering complete evaluation PcB c7 10,000 pF capacitor, 0402 Pkg. [2] circuit Board Material: rogers 4350 or Arlon 25Fr c8 10 pF capacitor, 0402 Pkg. c15, c35, c37, the circuit board used in the application should use 4.7 µF capacitor, 0805 Pkg. c68, c69, c72, c74 rF circuit design techniques. signal lines should have c32 1 µF capacitor, 0603 Pkg. 50 ohm impedance while the package ground leads r1, r7 100 ohm, resistor, 0402 Pkg. and backside ground paddle should be connected r2 - r6, r9 100 kohm, resistor, 0402 Pkg. directly to the ground plane similar to that shown. A r8, L2 0 ohm, resistor, 0402 Pkg. sufficient number of via holes should be used to con- r47 27 k ohm, resistor, 0402 Pkg. nect the top and bottom ground planes. the evalua- r48 15 k ohm, resistor, 0402 Pkg. tion circuit board shown is available from Hittite upon request. InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 9 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Evaluation PCB Schematic t M s - s r o t c e t e D & s r e D i v i D y c n e u q e r F InFfoormra tpiorni cfuern,is hdeed lbivy eArnyal oag nDdev itcoes pisl abcelieev eodr dto ebres a: cHcuirtatteit ean dM reicliarbolew. Haovweev eCr, onor poFroart ipornic,e 2, dEelliivzearby,e atnhd D tor ivpela,c eC horedlemrss: fAonradl,o gM DAe v0ic1e8s2, 4Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 10 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D