1 GHz to 11 GHz, GaAs, HEMT, MMIC Low Noise Amplifier Data Sheet HMC753 FEATURES FUNCTIONAL BLOCK DIAGRAM Noise figure: 1.5 dB at 4 GHz (see Figure 10) ND C C C C ND G NI NI NI NI G Gain 42 32 22 12 02 91 16.5 dB at 1 GHz to 6 GHz GND 1 HMC753 18 GND 14 dB at 6 GHz to 11 GHz GND 2 17 GND RFIN 3 16 RFOUT Output power for 1 dB compression (P1dB): 18 dBm GND 4 15 GND at 1 GHz to 6 GHz GND 5 14 GND Supply voltage (VDD): 5 V at 55 mA GND 6 13 GND O50u tΩp muta tthcihrded-o irndpeurt i/notuetrpceupt t( I(/IOP)3 ): 30 dBm at 1 GHz to 6 GHz GND7 V28GGV19GG01VDDNIC11 21GND 13494-001 24-lead lead frame chip scale package (LFCSP): 16 mm2 Figure 1. APPLICATIONS Point to point radios Point to multipoint radios Military and space Test instrumentation GENERAL DESCRIPTION The HMC753 is a gallium arsenide (GaAs), monolithic The P1dB output power of up to 18 dBm at 1 GHz to 6 GHz microwave integrated circuit (MMIC), low noise, wideband enables the low noise amplifier (LNA) to function as a local amplifier housed in a leadless, 4 mm × 4 mm LFCSP. The amplifier oscillator (LO) driver for balanced, I/Q, or image rejection operates between 1 GHz and 11 GHz, providing up to 16.5 dB mixers. The HMC753 also features I/Os that are dc blocked and of small signal gain at 1 GHz to 6 GHz, a 1.5 dB noise figure at internally matched to 50 Ω, making the device ideal for high 4 GHz (see Figure 10), and an output IP3 of 30 dBm at 1 GHz to capacity microwave radios or very small aperture terminal (VSAT) 6 GHz, while requiring only 55 mA from a 5 V supply. applications. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

HMC753 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interface Schematics .....................................................................6 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................7 Functional Block Diagram .............................................................. 1 Theory of Operation .........................................................................9 General Description ......................................................................... 1 Applications Information .............................................................. 10 Revision History ............................................................................... 2 Biasing Procedures ..................................................................... 10 Specifications ..................................................................................... 3 Evaluation PCB ........................................................................... 11 Electrical Specifications ............................................................... 3 Outline Dimensions ....................................................................... 13 Absolute Maximum Ratings ............................................................ 4 Ordering Guide .......................................................................... 13 ESD Caution .................................................................................. 4 Pin Configuration and Function Descriptions ............................. 5 REVISION HISTORY 11/2017—Rev. D to Rev. E This Hittite Microwave Products data sheet has been reformatted Changes to Figure 1 .......................................................................... 1 to meet the styles and standards of Analog Devices, Inc. Changes to V 1 Parameter, Table 3 .............................................. 4 GG 9/2015—Rev. 03.0111 to Rev. D Changes to Figure 2 .......................................................................... 5 Changes to Features Section and General Description Section ....... 1 Added Figure 19; Renumbered Sequentially ................................ 8 Changes to Table 1 ............................................................................. 3 Updated Outline Dimensions ....................................................... 13 Added Table 2; Renumbered Sequentially ..................................... 3 Changes to Ordering Guide .......................................................... 13 Changes to Table 3 ............................................................................. 4 Changes to Table 4 ............................................................................. 5 Added Figure 3, Figure 4, Figure 5, Figure 6, and Figure 7; Renumbered Sequentially ................................................................ 6 Added Theory of Operation Section and Figure 19 ..................... 9 Added Applications Information Section, Figure 20, and Biasing Procedures Section ......................................................................... 10 Changes to Table 5 .......................................................................... 11 Changes to Ordering Guide .......................................................... 13 Rev. E | Page 2 of 13

Data Sheet HMC753 SPECIFICATIONS ELECTRICAL SPECIFICATIONS T = 25°C, V = 5 V, I = 55 mA. A DD DD Table 1. Parameter Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 1 6 GHz PERFORMANCE Gain 14 16.5 dB Gain Variation over Temperature 0.004 dB/°C Noise Figure 1.5 2 dB Input Return Loss 11 dB Output Return Loss 18 dB Output Power for 1 dB Compression (P1dB) 18 dBm Saturated Output Power (P ) 20 dBm SAT Output Third Order Intercept (IP3) 30 dBm POWER SUPPLY Supply Current (I ) 55 mA V = 5 V, set V 2 = 1.5 V, V 1 = −0.8 V typical DD DD GG GG Table 2. Parameter Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 6 11 GHz PERFORMANCE Gain 10 14 dB Gain Variation over Temperature 0.008 dB/°C Noise Figure 2 2.7 dB Input Return Loss 8 dB Output Return Loss 12 dB Output Power for 1 dB Compression (P1dB) 15 dBm Saturated Output Power (P ) 17 dBm SAT Output Third Order Intercept (IP3) 28 dBm POWER SUPPLY Supply Current (I ) 55 mA V = 5 V, set V 2 = 1.5 V, V 1 = −0.8 V typical DD DD GG GG Rev. E | Page 3 of 13

HMC753 Data Sheet ABSOLUTE MAXIMUM RATINGS Stresses at or above those listed under Absolute Maximum Table 3. Ratings may cause permanent damage to the product. This is a Parameter Rating stress rating only; functional operation of the product at these Drain Bias Voltage 6.0 V or any other conditions above those indicated in the operational RF Input Power 12 dBm section of this specification is not implied. Operation beyond Gate Bias Voltage the maximum operating conditions for extended periods may V 1 −1.4 V to +0.3 V GG affect product reliability. V 2 0 V to 2.5 V GG Channel Temperature 180°C ESD CAUTION Continuous PDISS (TA) = 85°C), Derate 8.4 mW/°C Above 85°C 0.8 W Thermal Resistance (Channel to Die Bottom) 119°C/W Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C ESD Sensitivity Human Body Model (HBM) Class 0, Passed 100 V Rev. E | Page 4 of 13

Data Sheet HMC753 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ND C C C C ND G NI NI NI NI G 4 3 2 1 0 9 2 2 2 2 2 1 GND 1 18 GND GND 2 17 GND RFIN 3 HMC753 16 RFOUT GND 4 TOP VIEW 15 GND (Not to Scale) GND 5 14 GND GND 6 13 GND 7 8 9 0 1 2 1 1 1 D 2 1 DC D GN VGGVGGVDNI GN NOTES 1.NIC = NOT INTERNALLY CONNECTED. THESE PINS ARE NOT INTERNALLY CONNECTED; HOWEVER, ALL DATA SHOWN IS MEASURED WITH THESE PINS 2. CCEXOOPNNONNSEEECCDTT EEPDDA DETO.X TT RHEFER/ NDEACXL PGLORYSO ETUODN PRDAF./DD CM UGSRTO BUEND. 13494-002 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1, 2, 4 to 7, 12 to 15, 17 GND Ground. The package bottom has an exposed metal pad that must be connected to RF/dc to 19, 24 ground. 3 RFIN RF Input. This pad is ac-coupled and matched to 50 Ω. 8, 9 V 2, V 1 Gate Control for the Amplifier. Follow the biasing procedures described in the Biasing GG GG Procedure section. See Figure 23 for required external components. 10 V Power Supply Voltage for the Amplifier. See Figure 23 for required external components. DD 11, 20 to 23 NC Not Internally Connected. These pins are not internally connected; however, all data shown is measured with these pins connected externally to RF/dc ground. 16 RFOUT RF Output. This pad is ac-coupled and matched to 50 Ω. EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground. Rev. E | Page 5 of 13

HMC753 Data Sheet INTERFACE SCHEMATICS VDD GND 13494-003 13494-006 Figure 3. GND Interface Figure 6. VDD Interface RFOUT RFIN 13494-004 13494-007 Figure 4. RFIN Interface Figure 7. RFOUT Interface VGG1, VGG2 13494-005 Figure 5. VGG1, VGG2 Interface Rev. E | Page 6 of 13

Data Sheet HMC753 TYPICAL PERFORMANCE CHARACTERISTICS 25 18 15 16 B) NSE (d 5 SSS122112 N (dB) 14 ESPO –5 GAI 12 R –15 10 +85°C +25°C –40°C –250 2 4 FREQ6UENCY 8(GHz) 10 12 14 13494-008 81 3 FR5EQUENCY (G7Hz) 9 11 13494-011 Figure 8. Broadband Gain and Return Loss (Board Loss Subtracted out for Figure 11. Gain vs. Frequency for Various Temperatures (Board Loss Gain, Power, and Noise Figure Measurements) Subtracted out for Gain, Power, and Noise Figure Measurements) 0 0 +85°C +85°C +25°C +25°C –5 –40°C –5 –40°C B) B) S (d –10 S (d –10 S S O O N L N L R R ETU –15 ETU –15 R R –20 –20 –251 3 FR5EQUENCY (G7Hz) 9 11 13494-009 –251 3 FR5EQUENCY (G7Hz) 9 11 13494-012 Figure 9. Input Return Loss vs. Frequency for Various Temperatures Figure 12. Output Return Loss vs. Frequency for Various Temperatures 10 35 +85°C +25°C 30 –40°C 8 B) 25 d E ( 6 m) SE FIGUR 4 IP3 (dB 20 OI 15 N 2 10 ++8255°°CC –40°C 01 3 FR5EQUENCY (G7Hz) 9 11 13494-010 51 3 FR5EQUENCY (G7Hz) 9 11 13494-013 Figure 10. Noise Figure vs. Frequency for Various Temperatures (Board Loss Figure 13. Output IP3 vs. Frequency for Various Temperatures Subtracted out for Gain, Power, and Noise Figure Measurements) Rev. E | Page 7 of 13

HMC753 Data Sheet 25 24 POUT 20 GAIN 20 %) PAE E ( A 16 P dBm) 15 N (dB), 12 P1dB ( 10 m), GAI 8 B d (UT 4 5 +85°C PO +25°C 0 –40°C 01 3 FR5EQUENCY (G7Hz) 9 11 13494-014 –4–20 –15 INP–U10T POWER (–d5Bm) 0 5 13494-017 Figure 14. P1dB vs. Frequency for Various Temperatures (Board Loss Figure 17. Power Compression at 6 GHz (Board Loss Subtracted out for Gain, Subtracted out for Gain, Power, and Noise Figure Measurements) Power, and Noise Figure Measurements) 0 22 7 P1dB 20 GAIN 6 –10 NOISE FIGURE B) –20 dBm) 18 5 dB) N (d dB ( 16 4 RE ( O 1 U ISOLATI ––3400 AIN (dB), P 14 3 NOISE FIG G 12 2 +85°C –50 +25°C 10 1 –40°C –601 3 FR5EQUENCY (G7Hz) 9 11 13494-015 84.5 VD5D.0 (V) 5.50 13494-018 Figure 15. Reverse Isolation vs. Frequency for Various Temperatures Figure 18. Gain, Noise Figure, and Power vs. Supply Voltage (VDD) at 6 GHz (Board Loss Subtracted out for Gain, P1dB, and Noise Figure Measurements) 24 –70 –80 20 –90 Hz) –100 m) 16 dBc/ –110 (dBSAT NOISE ( ––112300 P 12 E S –140 A H P –150 8 +85°C –160 +25°C –40°C –170 41 3 FR5EQUENCY (G7Hz) 9 11 13494-016 –18010 100 O1FkFSET FR1E0QkUENCY1 0(H0kz) 1M 10M 13494-025 Figure 16. PSAT vs. Frequency for Various Temperatures (Board Loss Figure 19. Additive Phase Noise vs. Offset Frequency, RF Frequency = 8 GHz, Subtracted out for Gain, Power, and Noise Figure Measurements) RF Input Power = 12 dBm (PSAT) Rev. E | Page 8 of 13

Data Sheet HMC753 THEORY OF OPERATION The circuit architecture of the HMC753 wideband, low noise The input and output impedances are sufficiently stable over amplifier is shown in Figure 20. The HMC753 uses a single gain variations in temperature and supply voltage that no impedance stage to form an amplifier with typical gain of 16.5 dB at 1 GHz matching compensation is required. to 6 GHz and 14 dB at the 6 GHz to 11 GHz frequency band. Both RF input and RF output ports have on-chip dc block capacitors, which eliminates the need for external ac coupling HMC753 capacitors. It is critical to supply very low inductance ground connections RFIN RFOUT to the ground pins as well as to the backside exposed paddle. This ensures stable operation. 13494-022 To achieve the best performance out of the HMC753 and not to Figure 20. Wideband Low Noise Amplifier Circuit Architecture damage the device, the recommended biasing sequence must be followed; see the Applications Information section for further The HMC753 has single-ended input and output ports whose details. impedances are nominally equal to 50 Ω over the frequency range of 1 GHz to 11 GHz. Consequently, the HMC753 can be directly inserted into a 50 Ω system with no impedance matching circuitry required. In addition, multiple HMC753 amplifiers can be cascaded back to back without the need of external matching circuitry. Rev. E | Page 9 of 13

HMC753 Data Sheet APPLICATIONS INFORMATION The HMC753 is a GaAs, MMIC, high electron mobility BIASING PROCEDURES transistor (HEMT), low noise, wideband amplifier. The recommended biasing procedure during power-up is as The amplifier uses two field effect transistors (FETs) in series, follows: source to drain. The basic schematic for a fundamental cell is 1. Connect GND. shown in Figure 21. 2. Set V 1 to −1 V. GG VDD 3. Set V to 5 V. DD 4. Set V 2 to 1.5 V. RFOUT GG 5. Increase V 1 to achieve a typical quiescent current (I ) = VGG2 GG DQ 55 mA. 6. Apply the RF signal. RFIN VGG1 13494-021 Tfohlleo wresc:o mmended biasing procedure during power-down is as Figure 21. Fundamental Cell Schematic 1. Turn off the RF signal. All measurements for this device are taken using the evaluation 2. Decrease V 1 to −1 V to achieve I = 0 mA. GG DQ printed circuit board (PCB) in its default configuration. 3. Decrease V 2 to 0 V. GG 4. Decrease VDD to 0 V. 5. Increase V 1 to 0 V. GG The V = 5 V and I = 55 mA bias conditions are the operating DD DQ points recommended to optimize the overall performance. Unless otherwise noted, the data shown is taken using the recommended bias conditions. Operation of the HMC753 at different bias conditions may result in performance that differs from the Typical Performance Characteristics shown in the data sheet. Biasing the HMC753 for higher drain current typically results in higher P1dB and output IP3 at the expense of increased power consumption. Rev. E | Page 10 of 13

Data Sheet HMC753 EVALUATION PCB J5 H753 J6 XXXX C3 C1 C6 C4 2 C 5 C U1 C9 C8 C7 J4 J1 J3 J2 GND VGG2 VGG1 VDD 13494-020 Figure 22. 122826-HMC753LP4E Evaluation PCB 42 32 22 12 02 91 1 18 2 17 RFIN 3 16 RFOUT 4 15 5 14 6 13 7 8 9 01 11 21 VGG2 C9 C6 C3 C1 C4 C7 VDD 4.7µF 1000pF 100pF 100pF 1000pF 4.7µF VGG1 C4.87µF C10500pF C1020pF 13494-019 Figure 23. Typical Application Circuit Rev. E | Page 11 of 13

HMC753 Data Sheet Table 5. List of Materials for Evaluation PCB It is recommended that the circuit board used in this application 122826-HMC753LP4E1 use RF circuit design techniques. It is also recommended that Item Description signal lines have a 50 Ω impedance, and the package ground J5, J6 SMA connectors leads and exposed pad be connected directly to the ground J1 to J4 DC pins plane, as shown in Figure 23. Use a sufficient number of via C1 to C3 100 pF capacitors, 0402 package holes to connect the top and bottom ground planes. Mount the C4 to C6 10,000 pF capacitors, 0603 package evaluation board to an appropriate heat sink. The evaluation C7 to C9 4.7 µF capacitors, tantalum circuit board shown is available from Analog Devices, Inc., U1 HMC753 amplifier upon request. PCB2 122824-2 evaluation PCB 1 Reference this number when ordering the complete evaluation PCB. 2 Circuit board material: Rogers 4350 or Arlon 25FR. Rev. E | Page 12 of 13

Data Sheet HMC753 OUTLINE DIMENSIONS DETAIL A (JEDEC 95) 4.10 0.31 4.00 SQ 0.25 PIN 1 3.90 0.19 PIN 1 INDICATOR INDICATOR AREA OPTIONS 19 24 (SEE DETAIL A) 18 1 0.50 BSC 2.85 EXPPAODSED 2.70 SQ 2.55 13 6 TOP VIEW 00..5400 12 BOTTOM VIEW 7 0.20 MIN 0.30 FOR PROPER CONNECTION OF 0.95 THE EXPOSED PAD, REFER TO 0.85 SIDE VIEW THE PIN CONFIGURATION AND 0.75 0.05 MAX FUNCTION DESCRIPTIONS 0.02 NOM SECTION OF THIS DATA SHEET. COPLANARITY SEATING 0.08 PKG-04940 PLANE 0.20 REF 10-18-2017-B Figure 24. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (HCP-24-3) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range MSL Rating Package Description Package Option HMC753LP4E −40°C to +85°C MSL1 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] HCP-24-3 HMC753LP4ETR −40°C to +85°C MSL1 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] HCP-24-3 122826-HMC753LP4E Evaluation Board 1 All models are RoHS Compliant Parts. ©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13494-0-11/17(E) Rev. E | Page 13 of 13