DATASHEET HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 FN3138 +5V Powered RS-232 Transmitters/Receivers Rev 17.00 August 6, 2015 The HIN232-HIN241 family of RS-232 transmitters/receivers Features interface circuits meet all ElA RS-232E and V.28 specifications, • Meets All RS-232E and V.28 Specifications and are particularly suited for those applications where ±12V is not available. They require a single +5V power supply (except • Requires Only Single +5V Power Supply HIN239) and feature onboard charge pump voltage converters - (+5V and +12V - HIN239) which generate +10V and -10V supplies from the 5V supply. • High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 120kbps The family of devices offer a wide variety of RS-232 transmitter/receiver combinations to accommodate various • Onboard Voltage Doubler/Inverter applications (see “Selection Table” on page1). • Low Power Consumption The drivers feature true TTL/CMOS input compatibility, • Low Power Shutdown Function slew-rate-limited output, and 300 power-off source • Three-State TTL/CMOS Receiver Outputs impedance. The receivers can handle up to ±30V, and have a 3k to 7k input impedance. The receivers also feature • Multiple Drivers hysteresis to greatly improve noise rejection. - ±10V Output Swing for 5V lnput - 300 Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible - 30V/µs Maximum Slew Rate • Multiple Receivers - ±30V Input Voltage Range - 3k to 7k Input Impedance - 0.5V Hysteresis to Improve Noise Rejection • Pb-free Available (RoHS compliant) Applications • Any System Requiring RS-232 Communication Ports - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation - Modems Selection Table NUMBER OF NUMBER OF LOW POWER PART POWER SUPPLY RS-232 RS-232 EXTERNAL SHUTDOWN/TTL NUMBER OF NUMBER VOLTAGE DRIVERS RECEIVERS COMPONENTS THREE-STATE LEADS HIN232 +5V 2 2 4 Capacitors No/No 16 HIN236 +5V 4 3 4 Capacitors Yes/Yes 24 HIN237 +5V 5 3 4 Capacitors No/No 24 HIN238 +5V 4 4 4 Capacitors No/No 24 HIN239 +5V and +7.5V to 13.2V 3 5 2 Capacitors No/Yes 24 HIN240 +5V 5 5 4 Capacitors Yes/Yes 44 HIN241 +5V 4 5 4 Capacitors Yes/Yes 28 FN3138 Rev 17.00 Page 1 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pin Descriptions PIN FUNCTION VCC Power Supply Input 5V ±10%. V+ Internally generated positive supply (+10V nominal), HIN239 requires +7.5V to +13.2V. V- Internally generated negative supply (-10V nominal). GND Ground lead. Connect to 0V. C1+ External capacitor (+ terminal) is connected to this lead. C1- External capacitor (- terminal) is connected to this lead. C2+ External capacitor (+ terminal) is connected to this lead. C2- External capacitor (- terminal) is connected to this lead. TIN Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kpull-up resistor to VCC is connected to each lead. TOUT Transmitter Outputs. These are RS-232 levels (nominally ±10V). RIN Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kpull-down resistor to GND is connected to each input. ROUT Receiver Outputs. These are TTL/CMOS levels. EN Enable input. This is an active low input which enables the receiver outputs. With EN = 5V, the receiver outputs are placed in a high impedance state. SD Shutdown Input. With SD = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state and the transmitters are shut off. NC No Connect. No connections are made to these leads. FN3138 Rev 17.00 Page 2 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Ordering Information PART PART TEMP. RANGE PKG. NUMBER MARKING (°C) PACKAGE DWG. # HIN232CBZ* HIN232CBZ 0 to +70 16 Ld SOIC M16.3 (Note) (Pb-free) HIN232CPZ HIN232CPZ 0 to +70 16 Ld PDIP** E16.3 (Note) (Pb-free) HIN232IBZ* HIN232IBZ -40 to +85 16 Ld SOIC M16.3 (Note) (Pb-free) HIN232IPZ HIN232IPZ -40 to +85 16 Ld PDIP** E16.3 (Note) (Pb-free) HIN236CBZ (No longer HIN236CBZ 0 to +70 24 Ld SOIC M24.3 available or supported (Pb-free) recommended replacement part ICL3243E) (Note) HIN237CBZ* (No longer HIN237CBZ 0 to +70 24 Ld SOIC M24.3 available or supported (Pb-free) recommended replacement part ICL3243E) (Note) HIN238CBZ*(Note) HIN238CBZ 0 to +70 24 Ld SOIC M24.3 (Pb-free) HIN238IBZ* HIN238IBZ -40 to +85 24 Ld SOIC M24.3 (Note) (Pb-free) HIN239CBZ* HIN239CBZ 0 to +70 24 Ld SOIC M24.3 (Note) (Pb-free) HIN239CPZ HIN239CPZ 0 to +70 24 Ld PDIP** E24.3 (Note) (Pb-free) HIN240CNZ* (No longer HIN240CNZ 0 to +70 44 Ld MQFP Q44.10X10 available or supported) (Note) (Pb-free) HIN241CAZ (No longer HIN241CAZ 0 to +70 28 Ld SSOP M28.209 available or supported) (Note) (Pb-free) HIN241CBZ* (No longer HIN241CBZ 0 to +70 28 Ld SOIC M28.3 available or supported) (Note) (Pb-free) HIN241IBZ (No longer HIN241IBZ -40 to +85 28 Ld SOIC M28.3 Available or supported) (Note) (Pb-free) *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. FN3138 Rev 17.00 Page 3 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts HIN232 HIN236 (16 LD PDIP, SOIC) (24 LD SOIC) TOP VIEW TOP VIEW C1+ 1 16 VCC T3OUT 1 24 T4OUT V+ 2 15 GND T1OUT 2 23 R2IN C1- 3 14 T1OUT T2OUT 3 22 R2OUT R1IN 4 21 SD C2+ 4 13 R1IN R1OUT 5 20 EN C2- 5 12 R1OUT T2IN 6 19 T4IN V- 6 11 T1IN T1IN 7 18 T3IN T2OUT 7 10 T2IN GND 8 17 R3OUT R2IN 8 9 R2OUT VCC 9 16 R3IN C1+ 10 15 V- V+ 11 14 C2- C1- 12 13 C2+ +5V +5V + 9 1µF 16 10 C1+ VCC +1µF + 11 1µF 12 +5V TO 10V V+ C1- VOLTAGE DOUBLER VCC 13 NOTE 1 +13 C1+ VOLT+A5GVE T ODO 1U0VBLER V+ 2 +NOTE 1 1µF +14 CC22+- VOL+T1A0GVE T ION V-1E0RVTER V- 15 1µF C1- + 4 +5V T1 C2+ 7 400k 2 NOTE 1 +5 VOL+T1A0GVE T ION V-1E0RVTER V- 6 T1IN T1OUT C2- NOTE 1 +5V T2 + 6 400k 3 T2IN T2OUT +5V T1 T1IN 11 400k 14 T1OUT 18 +5V400k T3 1 T3IN T3OUT +5V T2 +5V T4 T2IN 10 400k 7 T2OUT T4IN 19 400k 24 T4OUT 5 4 R1OUT 12 13 R1IN R1OUT R1IN R1 5k R1 5k 22 23 9 8 R2OUT R2IN R2OUT R2IN R2 5k R2 5k 17 16 R3OUT R3IN 15 20 R3 5k 21 EN SD NOTE: 8 1. Either 0.1µF or 1µF capacitors may be used. FN3138 Rev 17.00 Page 4 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) HIN237 HIN238 (24 LD SOIC) (24 LD PDIP, SOIC) TOP VIEW TOP VIEW T3OUT 1 24 T4OUT T2OUT 1 24 T3OUT T1OUT 2 23 R2IN T1OUT 2 23 R3IN T2OUT 3 22 R2OUT R2IN 3 22 R3OUT R1IN 4 21 T5IN R2OUT 4 21 T4IN R1OUT 5 20 T5OUT T1IN 5 20 T4OUT T2IN 6 19 T4IN R1OUT 6 19 T3IN T1IN 7 18 T3IN R1IN 7 18 T2IN GND 8 17 R3OUT GND 8 17 R4OUT VCC 9 16 R3IN VCC 9 16 R4IN C1+ 10 15 V- C1+ 10 15 V- V+ 11 14 C2- V+ 11 14 C2- C1- 12 13 C2+ C1- 12 13 C2+ +5V +5V 9 9 1µF +1102 C1+ +5V VTOCC 10V V+ 11 +1µF 1µF +1102 C1+ +5V VTOCC 10V V+ 11 +1µF C1- VOLTAGE DOUBLER C1- VOLTAGE DOUBLER 13 13 1µF +14 CC22+- VOL+T1A0GVE T ION V-1E0RVTER V- 15 1µF 1µF +14 CC22+- VOL+T1A0GVE T ION V-1E0RVTER V- 15 1µF + + +5V T1 +5V T1 T1IN 7 400k 2 T1OUT T1IN 5 400k 2 T1OUT +5V T2 +5V T2 T2IN 6 400k 3 T2OUT T2IN 18 400k 1 T2OUT +5V T3 +5V T3 18 400k 1 19 400k 24 T3IN T3OUT T3IN T3OUT +5V T4 +5V T4 T4IN 19 400k 24 T4OUT T4IN 21 400k 20 T4OUT +5V T5 6 7 T5IN 21 400k 20 T5OUT R1OUT R1 5k R1IN 5 4 R1OUT R1IN 4 3 R1 5k R2OUT R2IN R2 5k 22 23 R2OUT R2IN 22 23 R2 5k R3OUT R3IN R3 5k 17 16 R3OUT R3IN 17 16 R3 5k R4OUT R4IN R4 5k 8 8 FN3138 Rev 17.00 Page 5 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) HIN239 HIN240 (24 LD PDIP, SOIC) (44 LD MQFP) TOP VIEW TOP VIEW T T T R1OUT 1 24 T1IN NC SD EN T5OU R4INR4OU T4IN T3IN R5OU R5IN NC R1IN 2 23 T2IN GND 3 22 R2OUT VCC 4 21 R2IN NC 144 43 42 41 40 39 38 37 36 353343 NC V+ 5 20 T2OUT T5IN 2 32 NC C1+ 6 19 T1OUT R3OUT 3 31 NC C1- 7 18 R3IN R3IN 4 30 V- V- 8 17 R3OUT T4OUT 5 29 C2- R5IN 9 16 T3IN T3OUT 6 28 C2+ R5OUT 10 15 NC T1OUT 7 27 C1- T2OUT 8 26 V+ R4OUT 11 14 EN NC 9 25 C1+ R4IN 12 13 T3OUT R2IN 10 24 NC NC 11 23 NC 12 13 14 15 16 17 18 19 20 2122 C T N N T N D C C C C N OU T2I T1I OU R1I GN VC N N N 2 1 R R FN3138 Rev 17.00 Page 6 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) +5V +5V +7.5V TO +13.2V (NOTE) 19 4 +25 C1+ VCC 26 +1µF + 6 C1+ VCC 5 1µF 27 C1- VOLT+A5GVE T ODO 1U0VBLER V+ 1µF 7 +10V TO -10V V+ 28 C2+ (NOTE) C1- VOLTAGE INVERTER V- 8 1µF +29 VOL+T1A0GVE T ION V-1E0RVTER V- 30 +1µF C2- 1µF +5V T1 +5V T1 24 400k 19 15 400k 7 T1IN T1OUT T1IN T1OUT +5V T2 +5V T2 T2IN 23 400k 20 T2OUT T2IN 14 400k 8 T2OUT +5V T3 37 +5V400k T3 6 T3IN 16 400k 13 T3OUT T3IN T3OUT R1OUT 1 2 R1IN T4IN 38 +5V400k T4 5 T4OUT R1 5k +5V T5 2 400k 41 22 21 T5IN T5OUT R2OUT R2IN 16 17 R2 5k R1OUT R1IN R1 5k 17 18 R3OUT R3IN R2OUT 13 10 R2IN R3 5k R2 5k 11 12 3 4 R4OUT R4IN R3OUT R3IN R4 5k R3 5k 10 9 39 40 R5OUT R5IN R4OUT R4IN R5 5k R4 5k 14 EN 36 35 R5OUT R5IN 3 42 R5 5k 43 EN SD NOTE: For V+ > 11V, use C1  0.1µF. 18 HIN241 (28 SOIC, SSOP) TOP VIEW T3OUT 1 28 T4OUT T1OUT 2 27 R3IN T2OUT 3 26 R3OUT R2IN 4 25 SD R2OUT 5 24 EN T2IN 6 23 R4IN T1IN 7 22 R4OUT R1OUT 8 21 T4IN R1IN 9 20 T3IN GND 10 19 R5OUT VCC 11 18 R5IN C1+ 12 17 V- V+ 13 16 C2- C1- 14 15 C2+ FN3138 Rev 17.00 Page 7 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts (Continued) +5V 11 12 1µF C1+ VCC 13 + 1µF +14 +5V TO 10V V+ C1- VOLTAGE DOUBLER 15 C2+ 1µF +16 VOL+T1A0GVE T ION V-1E0RVTER V- 17 C2- 1µF + +5V T1 7 400k 2 T1IN T1OUT +5V T2 6 400k 3 T2IN T2OUT +5V T3 20 400k 1 T3IN T3OUT +5V T4 21 400k 28 T4IN T4OUT 8 9 R1OUT R1IN R1 5k 5 4 R2OUT R2IN R2 5k 26 27 R3OUT R3IN R3 5k 22 23 R4OUT R4IN R4 5k 19 18 R5OUT R5IN R5 5k 24 25 EN SD 10 FN3138 Rev 17.00 Page 8 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . .(GND -0.3V) < VCC < 6V Thermal Resistance (Typical, Note 3) JC (°C/W) V+ to Ground (Note 2. . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 13.2V 16 Ld PDIP Package* 90 V- to Ground. . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V) 24 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 70 V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V 16 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . 100 Input Voltages 24 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . 75 TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V < VIN < (V+ +0.3V) 28 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . 70 RIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 95 Output Voltages 44 Ld MQFP Package . . . . . . . . . . . . . . . . . . . . . . . 80 TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V) Maximum Junction Temperature (Plastic Package) . . . . . . .+150°C ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V) Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C Short Circuit Duration Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous http://www.intersil.com/pbfree/Pb-FreeReflow.asp ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous *Pb-free PDIPs can be used for through hole wave solder processing Operating Conditions only. They are not intended for use in Reflow solder processing Temperature Range applications. HIN2xxcx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C HIN2xxIx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 2. Only HIN239. For V+ > 11V, C1 must be 0.1µF. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range MIN MAX PARAMETER TEST CONDITIONS (Note 5) TYP (Note 5) UNITS SUPPLY CURRENTS Power Supply Current, ICC No Load, HIN232 - 5 10 mA TA = +25°C HIN236-HIN238, HIN240-HIN241 - 7 15 mA HIN239 - 0.4 1 mA V+ Power Supply Current, ICC No Load, HIN239 - 5.0 15 mA No Load, TA = +25°C TA = +25°C Shutdown Supply Current, ICC(SD) TA = +25°C - 1 10 µA LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL TIN, EN, Shutdown - - 0.8 V Input Logic High, VlH TIN 2.0 - - V EN, Shutdown 2.4 - - V Transmitter Input Pull-up Current, IP TIN = 0V - 15 200 µA TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 1.6mA - 0.1 0.4 V TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1.0mA 3.5 4.6 - V RECEIVER INPUTS RS-232 Input Voltage Range VIN -30 - +30 V Receiver Input Impedance RIN VIN = ±3V 3.0 5.0 7.0 k Receiver Input Low Threshold, VlN (H-L) VCC = 5V, TA = +25°C 0.8 1.2 - V Receiver Input High Threshold, VIN (L-H) VCC = 5V, TA = +25°C - 1.7 2.4 V Receiver Input Hysteresis VHYST 0.2 0.5 1.0 V FN3138 Rev 17.00 Page 9 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range (Continued) MIN MAX PARAMETER TEST CONDITIONS (Note 5) TYP (Note 5) UNITS TIMING CHARACTERISTICS Baud Rate (1 Transmitter Switching) RL = 3k 120 - - kbps Output Enable Time, tEN HIN236, HIN239, HIN240, HIN241 - 400 - ns Output Disable Time, tDIS HIN236, HIN239, HIN240, HIN241 - 250 - ns Propagation Delay, tPD RS-232 to TTL - 0.5 - µs Instantaneous Slew Rate SR CL = 10pF, RL = 3k, TA = +25°C (Note 4) - - 30 V/µs Transition Region Slew Rate, SRT RL = 3k, CL = 2500pF Measured from +3V to -3V - 3 - V/µs or -3V to +3V, 1 Transmitter Switching TRANSMITTER OUTPUTS Output Voltage Swing, TOUT Transmitter Outputs, 3k to Ground ±5 ±9 ±10 V Output Resistance, TOUT VCC = V+ = V- = 0V, VOUT = 2V 300 - -  RS-232 Output Short Circuit Current, ISC TOUT shorted to GND - ±10 - mA NOTE: 4. Limits established by characterization and are not production tested. 5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. VOLTAGE DOUBLER VOLTAGE INVERTER S1 C1+ S2 V+ = 2VCC S5 C2+ S6 VCC GND + + + + C1 C3 C2 C4 - - - - GND VCC GND V- = -(V+) S3 C1- S4 S7 C2- S8 RC OSCILLATOR FIGURE 1. CHARGE PUMP Detailed Description inverted with respect to ground to produce a signal across C4 The HIN232 thru HIN241 family of RS-232 equal to -2VCC. The charge pump accepts input voltages up to 5.5V. The output impedance of the voltage doubler section transmitters/receivers are powered by a single +5V power (V+) is approximately 200, and the output impedance of the supply (except HIN239), feature low power consumption, and voltage inverter section (V-) is approximately 450. A typical meet all ElA RS-232C and V.28 specifications. The circuit is application uses 1µF capacitors for C1-C4, however, the value divided into three sections: The charge pump, transmitter, and is not critical. Increasing the values of C1 and C2 will lower the receiver. output impedance of the voltage doubler and inverter, Charge Pump increasing the values of the reservoir capacitors, C3 and C4, An equivalent circuit of the charge pump is illustrated in lowers the ripple on the V+ and V- supplies. Figure 1. The charge pump contains two sections: the voltage During shutdown mode (HIN236, HIN240 and HIN241), doubler and the voltage inverter. Each section is driven by a SHUTDOWN control line set to logic “1”, the charge pump is two-phase, internally generated clock to generate +10V and turned off, V+ is pulled down to VCC, V- is pulled up to GND, -10V. The nominal clock frequency is 16kHz. During phase and the supply current is reduced to less than 10µA. The one of the clock, capacitor C1 is charged to VCC. During transmitter outputs are disabled and the receiver outputs are phase two, the voltage on C1 is added to VCC, producing a placed in the high impedance state. signal across C3 equal to twice VCC. During phase one, C2 is also charged to 2VCC, and then during phase two, it is FN3138 Rev 17.00 Page 10 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Transmitters Receivers The transmitters are TTL/CMOS compatible inverters which The receiver inputs accept up to ±30V while presenting the translate the inputs to RS-232 outputs. The input logic threshold required 3k to 7k input impedance even if the power is off is about 26% of VCC, or 1.3V for VCC = 5V. A logic 1 at the (VCC = 0V). The receivers have a typical input threshold of input results in a voltage of between -5V and V- at the output, 1.3V which is within the ±3V limits, known as the transition and a logic 0 results in a voltage between +5V and (V+ -0.6V). region, of the RS-232 specifications. The receiver output is Each transmitter input has an internal 400k pullup resistor so 0V to VCC. The output will be low whenever the input is any unused input can be left unconnected and its output greater than 2.4V and high whenever the input is floating or remains in its low state. The output voltage swing meets the driven between +0.8V and -30V. The receivers feature 0.5V RS-232C specifications of ±5V minimum with the worst case hysteresis to improve noise rejection. The receiver Enable conditions of: all transmitters driving 3k minimum load line EN, when set to logic “1”, (HIN236, HIN239, HIN240, impedance, VCC = 4.5V, and maximum allowable operating and HIN241) disables the receiver outputs, placing them in temperature. The transmitters have an internally limited output the high impedance mode. The receiver outputs are also slew rate which is less than 30V/µs. The outputs are short placed in the high impedance state when in shutdown mode. circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300 with ±2V applied to the outputs and VCC= 0V. V+ VCC VCC 400k 300 RXIN ROUT TXIN TOUT -30V < RXIN < +30V 5k GND < VROUT < VCC GND < TXIN < VCC V- < VTOUT < V+ GND V- FIGURE 2. TRANSMITTER FIGURE 3. RECEIVER TIN OR RIN TOUT VOL OR ROUT VOL tPHL tPLH tPHL + tPLH AVERAGE PROPAGATION DELAY = 2 FIGURE 4. PROPAGATION DELAY DEFINITION FN3138 Rev 17.00 Page 11 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Typical Performance Curves TA = +25°C 12 12 TRANSMITTER OUTPUTS OPEN CIRCUIT 1µF TAGE 10 0.47µF E (|V|) 10 OL 8 AG 8 V+ (VCC = 5V) V T PPLY 6 0.10µF Y VOL 6 V+ (VCC = 4.5V) U L V- S 4 UPP 4 V- (VCC = 4.5V) S V- (VCC = 5V) 2 2 0 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 5 10 15 20 25 30 35 VCC |ILOAD| (mA) FIGURE 5. V- SUPPLY VOLTAGE vs VCC, VARYING FIGURE 6. V+, V- OUTPUT VOLTAGE vs LOAD (HIN232) CAPACITORS Test Circuits (HIN232) +4.5V TO +5.5V INPUT - 1 C1+ VCC 16 1µF C3 + 2 V+ GND 15 1 C1+ VCC 16 3 C1- T1OUT 14 1µF + 2 V+ GND 15 3k C1 - 4 C2+ R1IN 13 3 C1- T1OUT 14 T1 OUTPUT 5 C2- R1OUT 12 1µF+ 4 C2+ R1IN 13 RS-232 30V INPUT 6 V- T1IN 11 C2-+ - 5 C2- R1OUT 12 TTL/CMOS OUTPUT 7 T2OUT T2IN 10 1µF C4 6 V- T1IN 11 TTL/CMOS INPUT 8 R2IN R2OUT 9 3k 7 T2OUT T2IN 10 TTL/CMOS INPUT 8 R2IN R2OUT 9 TTL/CMOS OUTPUT ROUT = VIN/1T2OUT OUTT2PUT T1OUT VIN = 2V A RS-232 30V INPUT FIGURE 7. GENERAL TEST CIRCUIT FIGURE 8. POWER-OFF SOURCE RESISTANCE CONFIGURATION FN3138 Rev 17.00 Page 12 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Applications +5V - The HIN2xx may be used for all RS-232 data terminal and + communication links. It is particularly useful in applications 1 16 DTR (20) DATA where 12V power supplies are not available for C1 + 2 TERMINAL READY conventional RS-232 interface circuits. The applications 1µF - 3 DSRS (24) DATA HIN232 SIGNALING RATE presented represent typical interface configurations. 4 6 SELECT C2 + - A simple duplex RS-232 port with CTS/RTS handshaking is 1µF - 5 + RS-232 INPUTS AND OUTPUTS illustrated in Figure 9. Fixed output signals such as DTR 11 T1 14 TD TD (2) TRANSMIT DATA (data terminal ready) and DSRS (data signaling rate select) T2 10 7 is generated by driving them through a 5k resistor TTL/CMOS RTS RTS (4) REQUEST TO SEND INPUTS AND 12 13 connected to V+. OUTPUTS RD RD (3) RECEIVE DATA 9 R2 R1 8 In applications requiring four RS-232 inputs and outputs CTS CTS (5) CLEAR TO SEND (Figure 10), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir 15 SIGNAL GROUND (7) capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters. 1 4 C1 + HIN232 + C2 1µF - 3 5 - 1µF 11 T1 14 TD TD (2) TRANSMIT DATA T2 10 7 TTL/CMOS RTS RTS (4) REQUEST TO SEND INPUTS AND 12 13 OUTPUTS RD RD (3) RECEIVE DATA 9 R2 R1 8 CTS CTS (5) CLEAR TO SEND 15 16 6 2 C4 C3 +5V + - + - V- V+ 2µF 2µF RS-232 6 2 INPUTS AND OUTPUTS 16 HIN232 1 4 C1 + + C2 1µF - 3 5 - 1µF 11 T1 14 DTR DTR (20) DATA TERMINAL READY T2 10 7 TTL/CMOS DSRS DSRS (24) DATA SIGNALING RATE SELECT INPUTS AND 12 13 OUTPUTS DCD DCD (8) DATA CARRIER DETECT 9 R2 R1 8 R1 R1 (22) RING INDICATOR 15 SIGNAL GROUND (7) FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS FN3138 Rev 17.00 Page 13 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Die Characteristics SUBSTRATE POTENTIAL TRANSISTOR COUNT V+ 238 Metallization Mask Layout HIN240 T2OUT T1OUT T3OUT T4OUT R3IN R3OUT T5IN R2IN SHUTDOWN R2OUT EN T2IN T1IN T5OUT R1OUT R4IN R1IN R4OUT T4IN GND T3IN R5OUT VCC R5IN C1+ V+ C1- C2+ C2- V- FN3138 Rev 17.00 Page 14 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE August 6, 2015 FN3138.17 Added Rev History beginning with Rev 17. Added About Intersil Verbiage Updated Ordering Information Table on page 3. Updated POD M24.3 to most current version change is as follows: Updated to new POD standard by removing table listing dimensions and putting dimensions on drawing. Added Land Pattern. Updated POD M28.3 to most current version change is as follows: Added land pattern About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support FN3138 Rev 17.00 Page 15 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Dual-In-Line Plastic Packages (PDIP) N E16.3 (JEDEC MS-001-BB ISSUE D) E1 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INDEX AREA 1 2 3 N/2 INCHES MILLIMETERS -B- SYMBOL MIN MAX MIN MAX NOTES -A- A - 0.210 - 5.33 4 D E A1 0.015 - 0.39 - 4 BASE PLANE -C- A2 A A2 0.115 0.195 2.93 4.95 - SEATING B 0.014 0.022 0.356 0.558 - PLANE L CL B1 0.045 0.070 1.15 1.77 8, 10 DB11 e D1 A1 eC eAC C 0.008 0.014 0.204 0.355 - B D 0.735 0.775 18.66 19.68 5 e B 0.010 (0.25) M C A B S D1 0.005 - 0.13 - 5 NOTES: E 0.300 0.325 7.62 8.25 6 1. Controlling Dimensions: INCH. In case of conflict between English and E1 0.240 0.280 6.10 7.11 5 Metric dimensions, the inch dimensions control. e 0.100 BSC 2.54 BSC - 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of eA 0.300 BSC 7.62 BSC 6 Publication No. 95. eB - 0.430 - 10.92 7 4. Dimensions A, A1 and L are measured with the package seated in JE- L 0.115 0.150 2.93 3.81 4 DEC seating plane gauge GS-3. N 16 16 9 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). Rev. 0 12/93 6. E and eA are measured with the leads constrained to be perpendic- ular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). FN3138 Rev 17.00 Page 16 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Dual-In-Line Plastic Packages (PDIP) N E24.3 (JEDEC MS-001-AF ISSUE D) E1 24 LEAD NARROW BODY DUAL-IN-LINE PLASTIC INDEX AREA 1 2 3 N/2 PACKAGE -B- INCHES MILLIMETERS -A- SYMBOL MIN MAX MIN MAX NOTES D E A - 0.210 - 5.33 4 BASE PLANE A2 A1 0.015 - 0.39 - 4 -C- A SEATING A2 0.115 0.195 2.93 4.95 - PLANE L CL B 0.014 0.022 0.356 0.558 - D1 D1 A1 eA B1 0.045 0.070 1.15 1.77 8 B1 B e eC C C 0.008 0.014 0.204 0.355 - e B 0.010 (0.25) M C A B S D 1.230 1.280 31.24 32.51 5 D1 0.005 - 0.13 - 5 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and E 0.300 0.325 7.62 8.25 6 Metric dimensions, the inch dimensions control. E1 0.240 0.280 6.10 7.11 5 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. e 0.100 BSC 2.54 BSC - 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eA 0.300 BSC 7.62 BSC 6 4. Dimensions A, A1 and L are measured with the package seated in eB - 0.430 - 10.92 7 JEDEC seating plane gauge GS-3. L 0.115 0.150 2.93 3.81 4 5. D, D1, and E1 dimensions do not include mold flash or protrusions. N 24 24 9 Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). Rev. 0 12/93 6. E and eA are measured with the leads constrained to be perpendic- ular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). FN3138 Rev 17.00 Page 17 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC) M16.3 (JEDEC MS-013-AA ISSUE C) N 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0926 0.1043 2.35 2.65 - 1 2 3 A1 0.0040 0.0118 0.10 0.30 - L B 0.013 0.0200 0.33 0.51 9 SEATING PLANE C 0.0091 0.0125 0.23 0.32 - -A- D 0.3977 0.4133 10.10 10.50 3 D A h x 45° E 0.2914 0.2992 7.40 7.60 4 -C- e 0.050 BSC 1.27 BSC -  H 0.394 0.419 10.00 10.65 - e A1 C h 0.010 0.029 0.25 0.75 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M B S N 16 16 7 NOTES:  0° 8° 0° 8° - 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Rev. 1 6/05 Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN3138 Rev 17.00 Page 18 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Package Outline Drawing M24.3 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOIC) Rev 2, 3/11 24 INDEX AREA 7.60 (0.299) 7.40 (0.291) 10.65 (0.419) 10.00 (0.394) DETAIL "A" 1 2 3 TOP VIEW 1.27 (0.050) SEATING PLANE 0.40 (0.016) 15.60 (0.614) 2.65 (0.104) 15.20 (0.598) 2.35 (0.093) 0.75 (0.029) x 45° 0.25 (0.010) 1.27 (0.050) 0.30 (0.012) 8° 0.10 (0.004) 0° 0.51 (0.020) 0.33 (0.013) 0.32 (0.012) 0.23 (0.009) SIDE VIEW “A” SIDE VIEW “B” 1.981 (0.078) NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual 9.373 (0.369) index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions in ( ) are not necessarily exact. 8. This outline conforms to JEDEC publication MS-013-AD ISSUE C. 1.27 (0.050) 0.533 (0.021) TYPICAL RECOMMENDED LAND PATTERN FN3138 Rev 17.00 Page 19 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC) M28.3 (JEDEC MS-013-AE ISSUE C) N 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - 1 2 3 L B 0.013 0.0200 0.33 0.51 9 SEATING PLANE C 0.0091 0.0125 0.23 0.32 - -A- D 0.6969 0.7125 17.70 18.10 3 D A h x 45o E 0.2914 0.2992 7.40 7.60 4 -C- e 0.05 BSC 1.27 BSC - a H 0.394 0.419 10.00 10.65 - e A1 C h 0.01 0.029 0.25 0.75 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M B S N 28 28 7  0o 8o 0o 8o - Rev. 1, 1/13 NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. TYPICAL RECOMMENDED LAND PATTERN Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead (1.50mm) flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. (9.38mm) 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) (1.27mm TYP) (0.51mm TYP) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN3138 Rev 17.00 Page 20 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Shrink Small Outline Plastic Packages (SSOP) M28.209 (JEDEC MO-150-AH ISSUE B) N 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES MILLIMETERS E GAUGE SYMBOL MIN MAX MIN MAX NOTES -B- PLANE A - 0.078 - 2.00 - 1 2 3 A1 0.002 - 0.05 - - A2 0.065 0.072 1.65 1.85 - L SEATING PLANE 0.25 B 0.009 0.014 0.22 0.38 9 0.010 -A- C 0.004 0.009 0.09 0.25 - D A D 0.390 0.413 9.90 10.50 3 -C- E 0.197 0.220 5.00 5.60 4  e 0.026 BSC 0.65 BSC - e A1 A2 C H 0.292 0.322 7.40 8.20 - B 0.10(0.004) L 0.022 0.037 0.55 0.95 6 0.25(0.010) M C A M B S N 28 28 7 NOTES:  0° 8° 0° 8° - 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 Rev. 2 6/05 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN3138 Rev 17.00 Page 21 of 22 August 6, 2015

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Metric Plastic Quad Flatpack Packages (MQFP) D D1 Q44.10x10 (JEDEC MS-022AB ISSUE B) 44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE -D- INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.096 - 2.45 - A1 0.004 0.010 0.10 0.25 - -A- -B- A2 0.077 0.083 1.95 2.10 - b 0.012 0.018 0.30 0.45 6 E E1 b1 0.012 0.016 0.30 0.40 - D 0.515 0.524 13.08 13.32 3 D1 0.389 0.399 9.88 10.12 4, 5 E 0.516 0.523 13.10 13.30 3 e E1 0.390 0.398 9.90 10.10 4, 5 L 0.029 0.040 0.73 1.03 - PIN 1 N 44 44 7 SEATING e 0.032 BSC 0.80 BSC - -H- A PLANE Rev. 2 4/99 NOTES: 0.076 0.003 1. Controlling dimension: MILLIMETER. Converted inch 12o-16o -C- dimensions are not necessarily exact. 00..04106MIN 00.0.2008 M C A-B S D S 2. All dimensions and tolerances per ANSI Y14.5M-1982. 0o MIN 3. Dimensions D and E to be determined at seating plane -C- . b 4. Dimensions D1 and E1 to be determined at datum plane A2 A1 0o-7o b1 -H- . 5. Dimensions D1 and E1 do not include mold protrusion. 0.13/0.17 Allowable protrusion is 0.25mm (0.010 inch) per side. 12o-16o 0.005/0.007 6. Dimension b does not include dambar protrusion. Allowable L dambar protrusion shall be 0.08mm (0.003 inch) total. BASE METAL 7. “N” is the number of terminal positions. WITH PLATING 0.13/0.23 0.005/0.009 © Copyright Intersil Americas LLC 2004-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN3138 Rev 17.00 Page 22 of 22 August 6, 2015