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  • 型号: HFA1105IBZ
  • 制造商: Intersil
  • 库位|库存: xxxx|xxxx
  • 要求:
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HFA1105IBZ产品简介:

ICGOO电子元器件商城为您提供HFA1105IBZ由Intersil设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 提供HFA1105IBZ价格参考以及IntersilHFA1105IBZ封装/规格参数等产品信息。 你可以下载HFA1105IBZ参考资料、Datasheet数据手册功能说明书, 资料中有HFA1105IBZ详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
-3db带宽

330MHz

产品目录

集成电路 (IC)

描述

IC OPAMP CFA 330MHZ LP 8-SOIC

产品分类

线性 - 放大器 - 视频放大器和频缓冲器

品牌

Intersil

数据手册

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产品图片

产品型号

HFA1105IBZ

PCN组件/产地

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rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

产品目录页面

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供应商器件封装

8-SOIC

包装

管件

压摆率

1000 V/µs

安装类型

表面贴装

封装/外壳

8-SOIC(0.154",3.90mm 宽)

应用

电流反馈

标准包装

98

电压-电源,单/双 (±)

±4.5 V ~ 5.5 V

电流-电源

5.8mA

电流-输出/通道

60mA

电路数

1

输出类型

-

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PDF Datasheet 数据手册内容提取

DATASHEET HFA1105 FN3395 330MHz, Low Power, Current Feedback Video Operational Amplifier Rev.8.00 June 6, 2006 The HFA1105 is a high speed, low power current feedback Features amplifier built with Intersil’s proprietary complementary • Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . . 5.8mA bipolar UHF-1 process. • High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 1M This amplifier features an excellent combination of low power dissipation (58mW) and high performance. The slew • Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 330MHz rate, bandwidth, and low output impedance (0.08) make • Very Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . . 1000V/s this amplifier a good choice for driving Flash ADCs. Component and composite video systems also benefit from • Gain Flatness (to 75MHz) . . . . . . . . . . . . . . . . . . . ±0.1dB this op amp’s excellent gain flatness, and good differential • Differential Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02% gain and phase specifications. The HFA1105 is ideal for • Differential Phase. . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03° interfacing to Intersil’s line of video crosspoint switches (HA4201, HA4600, HA4314, HA4404, HA4344), to create • Pin Compatible Upgrade for CLC406 high performance, low power switchers and routers. • Pb-Free Plus Anneal Available (RoHS Compliant) The HFA1105 is a low power, high performance upgrade for Applications the CLC406. For a comparable amplifier with output disable or output limiting functions, please see the data sheets for • Flash A/D Drivers the HFA1145 and HFA1135 respectively. • Video Switching and Routing For Military grade product, please refer to the HFA1145/883 • Professional Video Processing data sheet • Video Digitizing Boards/Systems Ordering Information • Multimedia Systems PART PART TEMP. PKG. NUMBER MARKING RANGE (°C) PACKAGE DWG. # • RGB Preamps HFA1105IB 1105IB -40 to 85 8 Ld SOIC M8.15 • Medical Imaging HFA1105IB96 1105IB 8 Ld SOIC Tape and Reel • Hand Held and Miniaturized RF Equipment HFA1105IBZ 1105IBZ -40 to 85 8 Ld SOIC M8.15 • Battery Powered Communications (Note 1) (Pb-free) Pinout HFA1105IBZ96 1105IBZ 8 Ld SOIC Tape and Reel (Pb-free) (Note 1) HFA1105 (SOIC) HFA11XXEVAL DIP Evaluation Board for High Speed TOP VIEW (Note 2) Op Amps NOTES: NC 1 8 NC 1. Intersil Pb-free plus anneal products employ special Pb-free -IN 2 - 7 V+ material sets; molding compounds/die attach materials and + 100% matte tin plate termination finish, which are RoHS +IN 3 6 OUT compliant and compatible with both SnPb and Pb-free soldering V- 4 5 NC operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Requires a SOIC-to-DIP adapter. See “Evaluation Board” section inside. FN3395 Rev.8.00 Page 1 of 12 June 6, 2006

HFA1105 Absolute Maximum Ratings Thermal Information Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V Thermal Resistance (Typical, Note 4) JA (°C/W) DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . .175°C Output Current (Note 3). . . . . . . . . . . . . . . . .Short Circuit Protected Maximum Junction Temperature (Plastic Package) . . . . . . . .150°C 30mA Continuous Maximum Storage Temperature Range. . . . . . . . . . -65°C to 150°C  60mA  50% Duty Cycle Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>600V (Lead Tips Only) Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 3. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30mA for maximum reliability. 4. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 510W, RL = 100W, Unless Otherwise Specified (NOTE 5) TEST TEMP. PARAMETER TEST CONDITIONS LEVEL (°C) MIN TYP MAX UNITS INPUT CHARACTERISTICS Input Offset Voltage A 25 - 2 5 mV A Full - 3 8 mV Average Input Offset Voltage Drift B Full - 1 10 V/°C Input Offset Voltage VCM =1.8V A 25 47 50 - dB Common-Mode Rejection Ratio VCM =1.8V A 85 45 48 - dB VCM =1.2V A -40 45 48 - dB Input Offset Voltage VPS =1.8V A 25 50 54 - dB Power Supply Rejection Ratio VPS =1.8V A 85 47 50 - dB VPS =1.2V A -40 47 50 - dB Non-Inverting Input Bias Current A 25 - 6 15 A A Full - 10 25 A Non-Inverting Input Bias Current Drift B Full - 5 60 nA/°C Non-Inverting Input Bias Current VPS =1.8V A 25 - 0.5 1 A/V Power Supply Sensitivity VPS =1.8V A 85 - 0.8 3 A/V VPS =1.2V A -40 - 0.8 3 A/V Non-Inverting Input Resistance VCM =1.8V A 25 0.8 1.2 - M VCM =1.8V A 85 0.5 0.8 - M VCM =1.2V A -40 0.5 0.8 - M Inverting Input Bias Current A 25 - 2 7.5 A A Full - 5 15 A Inverting Input Bias Current Drift B Full - 60 200 nA/°C Inverting Input Bias Current VCM =1.8V A 25 - 3 6 A/V Common-Mode Sensitivity VCM =1.8V A 85 - 4 8 A/V VCM =1.2V A -40 - 4 8 A/V Inverting Input Bias Current VPS =1.8V A 25 - 2 5 A/V Power Supply Sensitivity VPS =1.8V A 85 - 4 8 A/V VPS =1.2V A -40 - 4 8 A/V FN3395 Rev.8.00 Page 2 of 12 June 6, 2006

HFA1105 Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 510W, RL = 100W, Unless Otherwise Specified (Continued) (NOTE 5) TEST TEMP. PARAMETER TEST CONDITIONS LEVEL (°C) MIN TYP MAX UNITS Inverting Input Resistance C 25 - 60 -  Input Capacitance C 25 - 1.6 - pF Input Voltage Common Mode Range A 25, 85 1.8 2.4 - V (Implied by VIO CMRR, +RIN, and -IBIAS CMS Tests) A -40 1.2 1.7 - V Input Noise Voltage Density (Note 8) f = 100kHz B 25 - 3.5 - nV/Hz Non-Inverting Input Noise Current Density (Note 8) f = 100kHz B 25 - 2.5 - pA/Hz Inverting Input Noise Current Density (Note 8) f = 100kHz B 25 - 20 - pA/Hz TRANSFER CHARACTERISTICS Open Loop Transimpedance Gain AV = -1 C 25 - 500 - k AC CHARACTERISTICS RF = 510, Unless Otherwise Specified -3dB Bandwidth AV = +1, +RS = 510 B 25 - 270 - MHz (VOUT = 0.2VP-P, Note 8) B Full - 240 - MHz AV = -1, RF = 425 B 25 - 300 - MHz AV = +2 B 25 - 330 - MHz B Full - 260 - MHz AV = +10, RF = 180 B 25 - 130 - MHz B Full - 90 - MHz Full Power Bandwidth AV = +1, +RS = 510 B 25 - 135 - MHz ( 4VVOPU-TP =a t5 AVVP -=P + a1t, ANVo =te + 82)/-1, AV = -1 B 25 - 140 - MHz AV = +2 B 25 - 115 - MHz Gain Flatness To 25MHz B 25 - 0.03 - dB (AV = +2, VOUT = 0.2VP-P, Note 8) B Full - 0.04 - dB To 75MHz B 25 - 0.11 - dB B Full - 0.22 - dB Gain Flatness To 25MHz B 25 - 0.03 - dB (AV = +1, +RS = 510, VOUT = 0.2VP-P, Note 8) To 75MHz B 25 - 0.09 - dB Minimum Stable gain A Full - 1 - V/V OUTPUT CHARACTERISTICS AV = +2, RF = 510 Unless Otherwise Specified Output Voltage Swing (Note 8) AV = -1, RL = 100 A 25 3 3.4 - V A Full 2.8 3 - V Output Current (Note 8) AV = -1, RL = 50 A 25, 85 50 60 - mA A -40 28 42 - mA Output Short Circuit Current B 25 - 90 - mA Closed Loop Output Impedance (Note 8) DC B 25 - 0.08 - W Second Harmonic Distortion 10MHz B 25 - -48 - dBc (VOUT = 2VP-P, Note 8) 20MHz B 25 - -44 - dBc Third Harmonic Distortion 10MHz B 25 - -50 - dBc (VOUT = 2VP-P, Note 8) 20MHz B 25 - -45 - dBc Reverse Isolation (S12, Note 8) 30MHz B 25 - -55 - dB FN3395 Rev.8.00 Page 3 of 12 June 6, 2006

HFA1105 Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 510W, RL = 100W, Unless Otherwise Specified (Continued) (NOTE 5) TEST TEMP. PARAMETER TEST CONDITIONS LEVEL (°C) MIN TYP MAX UNITS TRANSIENT CHARACTERISTICS AV = +2, RF = 510, Unless Otherwise Specified Rise and Fall Times VOUT = 0.5VP-P B 25 - 1.1 - ns B Full - 1.4 - ns Overshoot (Note 6) +OS B 25 - 3 - % (VOUT = 0 to 0.5V, VIN tRISE = 1ns) -OS B 25 - 5 - % Overshoot (Note 6) +OS B 25 - 3 - % (VOUT = 0.5VP-P, VIN tRISE = 1ns) -OS B 25 - 11 - % Slew Rate +SR B 25 - 1000 - V/s (VOUT = 4VP-P, AV = +1, +RS = 510) B Full - 975 - V/s -SR (Note 7) B 25 - 650 - V/s B Full - 580 - V/s Slew Rate +SR B 25 - 1400 - V/s (VOUT = 5VP-P, AV = +2) B Full - 1200 - V/s -SR (Note 7) B 25 - 800 - V/s B Full - 700 - V/s Slew Rate +SR B 25 - 2100 - V/s (VOUT = 5VP-P, AV = -1) B Full - 1900 - V/s -SR (Note 7) B 25 - 1000 - V/s B Full - 900 - V/s Settling Time To 0.1% B 25 - 15 - ns (VOUT = +2V to 0V step, Note 8) To 0.05% B 25 - 23 - ns To 0.02% B 25 - 30 - ns Overdrive Recovery Time VIN =2V B 25 - 8.5 - ns VIDEO CHARACTERISTICS AV = +2, RF = 510 Unless Otherwise Specified Differential Gain RL = 150 B 25 - 0.02 - % (f = 3.58MHz) RL = 75 B 25 - 0.03 - % Differential Phase RL = 150 B 25 - 0.03 - ° (f = 3.58MHz) RL = 75 B 25 - 0.05 - ° POWER SUPPLY CHARACTERISTICS Power Supply Range C 25 4.5 - 5.5 V Power Supply Current (Note 8) A 25 - 5.8 6.1 mA A Full - 5.9 6.3 mA NOTES: 5. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only. 6. Undershoot dominates for output signal swings below GND (e.g., 0.5VP-P), yielding a higher overshoot limit compared to the VOUT = 0 to 0.5V condition. See the “Application Information” section for details. 7. Slew rates are asymmetrical if the output swings below GND (e.g. a bipolar signal). Positive unipolar output signals have symmetric positive and negative slew rates comparable to the +SR specification. See the “Application Information” section, and the pulse response graphs for details. 8. See Typical Performance Curves for more information. FN3395 Rev.8.00 Page 4 of 12 June 6, 2006

HFA1105 Application Information negative slew rate. Positive only signals have symmetrical slew rates as illustrated in the large signal positive pulse Optimum Feedback Resistor response graphs (See Figures 4, 7, and 10). Although a current feedback amplifier’s bandwidth dependency on closed loop gain isn’t as severe as that of a PC Board Layout voltage feedback amplifier, there can be an appreciable The amplifier’s frequency response depends greatly on the decrease in bandwidth at higher gains. This decrease may care taken in designing the PC board. The use of low be minimized by taking advantage of the current feedback inductance components such as chip resistors and chip amplifier’s unique relationship between bandwidth and RF. capacitors is strongly recommended, while a solid All current feedback amplifiers require a feedback resistor, ground plane is a must! even for unity gain applications, and RF, in conjunction with Attention should be given to decoupling the power supplies. the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is A large value (10F) tantalum in parallel with a small value inversely proportional to RF. The HFA1105 design is (0.1F) chip capacitor works well in most cases. optimized for RF = 510 at a gain of +2. Decreasing RF Terminated microstrip signal lines are recommended at the decreases stability, resulting in excessive peaking and device’s input and output connections. Capacitance, overshoot (Note: Capacitive feedback will cause the same parasitic or planned, connected to the output must be problems due to the feedback impedance decrease at higher minimized, or isolated as discussed in the next section. frequencies). At higher gains, however, the amplifier is more Care must also be taken to minimize the capacitance to stable so RF can be decreased in a trade-off of stability for ground at the amplifier’s inverting input (-IN), as this bandwidth. capacitance causes gain peaking, pulse overshoot, and if The table below lists recommended RF values for various large enough, instability. To reduce this capacitance, the gains, and the expected bandwidth. For a gain of +1, a designer should remove the ground plane under traces resistor (+RS) in series with +IN is required to reduce gain connected to peaking and increase stability. -IN, and keep connections to -IN as short as possible. An example of a good high frequency layout is the GAIN BANDWIDTH Evaluation Board shown in Figure 2. (ACL) RF () (MHz) -1 425 300 Driving Capacitive Loads +1 510 (+RS = 510) 270 Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s +2 510 330 phase margin resulting in frequency response peaking and +5 200 300 possible oscillations. In most cases, the oscillation can be +10 180 130 avoided by placing a resistor (RS) in series with the output prior to the capacitance. Non-Inverting Input Source Impedance Figure 1 details starting points for the selection of this For best operation, the DC source impedance seen by the non-inverting input should be 50This is especially resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and important in inverting gain configurations where the non- settling time, but experimental fine tuning is recommended. inverting input would normally be connected directly to GND. Picking a point above or to the right of the curve yields an Pulse Undershoot and Asymmetrical Slew Rates overdamped response, while points below or left of the curve The HFA1105 utilizes a quasi-complementary output stage to indicate areas of underdamped performance. achieve high output current while minimizing quiescent supply RS and CL form a low pass network at the output, thus limiting current. In this approach, a composite device replaces the system bandwidth well below the amplifier bandwidth of traditional PNP pulldown transistor. The composite device 270MHz (for AV = +1). By decreasing RS as CL increases (as switches modes after crossing 0V, resulting in added illustrated in the curves), the maximum bandwidth is obtained distortion for signals swinging below ground, and an without sacrificing stability. In spite of this, the bandwidth increased undershoot on the negative portion of the output decreases as the load capacitance increases. For example, at waveform (See Figures 5, 8, and 11). This undershoot isn’t AV = +1, RS = 62, CL = 40pF, the overall bandwidth is limited present for small bipolar signals, or large positive signals. to 180MHz, and bandwidth drops to 75MHz at AV = +1, Another artifact of the composite device is asymmetrical slew RS=8, CL = 400pF. rates for output signals with a negative voltage component. The slew rate degrades as the output signal crosses through 0V (See Figures 5, 8, and 11), resulting in a slower overall FN3395 Rev.8.00 Page 5 of 12 June 6, 2006

HFA1105 50 ) E ( 40 VH C N A ST 1 SI 30 E R T +IN U P 20 UT AV = +1 OUT V+ ES O AV = +2 VL V- GND RI 10 E S 0 0 50 100 150 200 250 300 350 400 FIGURE 2A. TOP LAYOUT LOAD CAPACITANCE (pF) FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE Evaluation Board The performance of the HFA1105 may be evaluated using the HFA11XX Evaluation Board and a SOIC to DIP adaptor like the Aries Electronics Part Number 14-350000-10. The layout and schematic of the board are shown in Figure2. To order evaluation boards (part number HFA11XXEVAL), please contact your local sales office. FIGURE 2B. BOTTOM LAYOUT 510 510 VH R1 1 8 0.1F 10F 50 2 7 +5V 50 IN 3 6 OUT 4 5 VL 10F 0.1F GND -5V GND FIGURE 2C. SCHEMATIC FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT FN3395 Rev.8.00 Page 6 of 12 June 6, 2006

HFA1105 Typical Performance Curves VSUPPLY = 5V, RF = 510 TA = 25°C, RL = 100 Unless Otherwise Specified 200 3.0 AV = +1 AV = +1 150 +RS = 510 2.5 +RS = 510 100 2.0 V) V) E (m 50 GE ( 1.5 G A LTA 0 OLT 1.0 O V V T T -50 U 0.5 U P P T T U U -100 O 0 O -150 -0.5 -200 -1.0 TIME (5ns/DIV) TIME (5ns/DIV) FIGURE 3. SMALL SIGNAL PULSE RESPONSE FIGURE 4. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 200 AV = +1 AV = +2 1.5 +RS = 510 150 1.0 100 V) V) GE ( 0.5 E (m 50 A G OLT 0 LTA 0 V O T V U -0.5 T -50 P U T P U T O -1.0 U -100 O -1.5 -150 -2.0 -200 TIME (5ns/DIV) TIME (5ns/DIV) FIGURE 5. LARGE SIGNAL BIPOLAR PULSE RESPONSE FIGURE 6. SMALL SIGNAL PULSE RESPONSE 3.0 2.0 AV = +2 AV = +2 2.5 1.5 GE (V) 21..05 GE (V) 10..05 OLTA 1.0 OLTA 0 UTPUT V 0.5 UTPUT V -0.5 O 0 O -1.0 -0.5 -1.5 -1.0 -2.0 TIME (5ns/DIV) TIME (5ns/DIV) FIGURE 7. LARGE SIGNAL POSITIVE PULSE RESPONSE FIGURE 8. LARGE SIGNAL BIPOLAR PULSE RESPONSE FN3395 Rev.8.00 Page 7 of 12 June 6, 2006

HFA1105 Typical Performance Curves VSUPPLY = 5V, RF = 510 TA = 25°C, RL = 100 Unless Otherwise Specified (Continued) 200 3.0 AV = +10 AV = +10 150 RF = 180 2.5 RF = 180 100 2.0 V) V) E (m 50 GE ( 1.5 G A LTA 0 OLT 1.0 O V V T T -50 U 0.5 U P P T T U U -100 O 0 O -150 -0.5 -200 -1.0 TIME (5ns/DIV) TIME (5ns/DIV) FIGURE 9. SMALL SIGNAL PULSE RESPONSE FIGURE 10. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 1.5 ARVF == +18100 dB) 3 V++RROSSU T== =50 1200 (0-1m ()+V1P)-P AV = +1 N ( 0 V) 1.0 GAI -3 AV = -1 GE ( 0.5 OLTA 0 SE (°) T V 0 HA U -0.5 AV = -1 P UTP 90 ED O -1.0 180 LIZ A M -1.5 AV = +1 270 OR N -2.0 0.3 1 10 100 500 TIME (5ns/DIV) FREQUENCY (MHz) FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE FIGURE 12. FREQUENCY RESPONSE N (dB) 3 AV = +2 N (dB) 3 AV = +2 VOUT = 200mVP-P AI AI G 0 G 0 D D ZE -3 AV = +10 ZE -3 VOUT = 1.5VP-P MALI AV = +5 MALI VOUT = 5VP-P R R O O N N AV = +2 VOUT = 200mVP-P 0 0 90 E (°) 90 E (°) VROF U=T 5 =1 0200 (m+2V)P-P AV = +5 180 HAS VOUT = 1.5VP-P 180 HAS RF = 200 (+5) AV = +10 270 P 270 P RF = 180 (+10) VOUT = 5VP-P 0.3 1 10 100 500 0.3 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) FIGURE 13. FREQUENCY RESPONSE FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES FN3395 Rev.8.00 Page 8 of 12 June 6, 2006

HFA1105 Typical Performance Curves VSUPPLY = 5V, RF = 510 TA = 25°C, RL = 100 Unless Otherwise Specified (Continued) B) dB) VOUT = 200mVP-P RL = 1k GAIN (d 30 AV = -1 D GAIN ( 30 AV = +2 RL = 500 LIZED -3 VVOOUUTT == 45VVPP--PP ((+-11,) +2) AV = +1 ALIZE -3 RL R= L5 0= 100 MA +RS = 510(+1) RM OR AV = +2 NO N RL = 50 RL = 100 0 RL = 1k 90 SE (°) RL = 500 180HA P 270 1 10 100 200 0.3 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) FIGURE 15. FULL POWER BANDWIDTH FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS 500 AV = +2 VOUT = 200mVP-P VOUT = 200mVP-P RF = 180 (+10) +RS = 510 (+1) 400 +RS = 510 (+1) 0.25 DTH (MHz) 300 AV = +1 GAIN (dB) 000...211050 DWI 200 ZED 0.05 AV = +2 BAN 100 AV = +10 ORMALI -0.050 AV = +1 N -0.10 0 -100 -50 0 50 100 150 1 10 75 TEMPERATURE (°C) FREQUENCY (MHz) FIGURE 17. -3dB BANDWIDTH vs TEMPERATURE FIGURE 18. GAIN FLATNESS -40 dB) VOUT = 2VP-P AV = +2 ON ( -50 AV = +1, +2 ) 1K OLATI --6700 AV = -1 NCE ( 100 S A E I -80 ED 10 S P VER -90 T IM 1 E U 0.1 R P T U 0.01 O 0.3 1 10 100 0.3 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) FIGURE 19. REVERSE ISOLATION FIGURE 20. OUTPUT IMPEDANCE FN3395 Rev.8.00 Page 9 of 12 June 6, 2006

HFA1105 Typical Performance Curves VSUPPLY = 5V, RF = 510 TA = 25°C, RL = 100 Unless Otherwise Specified (Continued) -30 AV = +2 AV = +2 0.8 VOUT = 2V 0.6 -40 %) 0.4 c) R ( dB 10MHz RO 0.2 N ( ETTLING ER --000...1024 DISTORTIO --6500 20MHz S -0.6 -0.8 -70 -5 0 5 10 15 3 8 13 18 23 28 33 38 43 48 TIME (ns) OUTPUT POWER (dBm) FIGURE 21. SETTLING RESPONSE FIGURE 22. SECOND HARMONIC DISTORTION vs POUT -30 3.6 AV = +2 3.5 AV = -1 |-VOUT| (RL= 100 +VOUT (RL= 100 3.4 -40 V) N (dBc) 20MHz LTAGE ( 33..32 TORTIO -50 10MHz PUT VO 33..10 +VOUT (RL= 50 DIS UT 2.9 -60 O 2.8 |-VOUT| (RL= 50 2.7 2.6 -70 -50 -25 0 25 50 75 100 125 -5 0 5 10 15 OUTPUT POWER (dBm) TEMPERATURE (°C) FIGURE 23. THIRD HARMONIC DISTORTION vs POUT FIGURE 24. OUTPUT VOLTAGE vs TEMPERATURE 100 100 6.1 A) m Hz) INI- Hz) ENT ( 6.0 nV/ pA/ RR 5.9 E ( T ( CU AG 10 10 EN LY LT RR PP 5.8 O U U V C S E ENI E R NOIS INI+ NOIS OWE 5.7 P 5.6 1 1 0.1 1 10 100 3.5 4 4.5 5 5.5 6 6.5 7 7.5 FREQUENCY (kHz) POWER SUPPLY VOLTAGE (V) FIGURE 25. INPUT NOISE CHARACTERISTICS FIGURE 26. SUPPLY CURRENT vs SUPPLY VOLTAGE FN3395 Rev.8.00 Page 10 of 12 June 6, 2006

HFA1105 Die Characteristics PASSIVATION: Type: Nitride DIE DIMENSIONS: Thickness: 4kÅ 0.5kÅ 59 mils x 59 mils x 19 mils 1500m x 1500m x 483m TRANSISTOR COUNT: 75 METALLIZATION: Type: Metal 1: AICu(2%)/TiW SUBSTRATE POTENTIAL (POWERED UP): Thickness: Metal 1: 8kÅ 0.4kÅ Floating (Recommend Connection to V-) Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ 0.8kÅ Metallization Mask Layout HFA1105 -IN NC V+ OUT +IN V- NC FN3395 Rev.8.00 Page 11 of 12 June 6, 2006

HFA1105 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - 1 2 3 L B 0.013 0.020 0.33 0.51 9 SEATING PLANE C 0.0075 0.0098 0.19 0.25 - -A- D 0.1890 0.1968 4.80 5.00 3 D A h x 45° E 0.1497 0.1574 3.80 4.00 4 -C- e 0.050 BSC 1.27 BSC -  H 0.2284 0.2440 5.80 6.20 - e A1 C h 0.0099 0.0196 0.25 0.50 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M B S N 8 8 7 NOTES:  0° 8° 0° 8° - 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Rev. 1 6/05 Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. © Copyright Intersil Americas LLC 2003-2006. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN3395 Rev.8.00 Page 12 of 12 June 6, 2006