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H C P L August 2013 0 6 X HCPL0600, HCPL0601, HCPL0611, X — HCPL0637, HCPL0638, HCPL0639 H i High Speed-10 MBit/s Logic Gate Optocouplers g h S p Single Channel: HCPL0600, HCPL0601, HCPL0611 e e Dual Channel: HCPL0637, HCPL0638, HCPL0639 d - 1 0 Features Description M ■ Compact SO8 package The HCPL06XX optocouplers consist of an AlGaAS B i ■ Very high speed-10 MBit/s LED, optically coupled to a very high speed integrated t/s ■ Superior CMR photo-detector logic gate with a strobable output (single L channel devices). The devices are housed in a compact o ■ Logic gate output g small-outline package. This output features an open col- i ■ Strobable output (single channel devices) lector, thereby permitting wired OR outputs. The c ■ Wired OR-open collector HCPL0600, HCPL0601 and HCPL0611 output consists G a ■ U.L. recognized (File # E90700) of bipolar transistors on a bipolar process while the t e ■ IEC60747-5-2 approved (VDE option) HCPL0637, HCPL0638, and HCPL0639 output consists O of bipolar transistors on a CMOS process for reduced p – HCPL0600, HCPL0601, HCPL0611 only power consumption. The coupled parameters are guar- to Applications anteed over the temperature range of -40°C to +85°C. co An internal noise shield provides superior common u ■ Ground loop elimination mode rejection. p l ■ LSTTL to TTL, LSTTL or 5-volt CMOS er s ■ Line receiver, data transmission ■ Data multiplexing ■ Switching power supplies ■ Pulse transformer replacement ■ Computer-peripheral interface Package Dimensions 0.164 (4.16) 0.144 (3.66) E N PLA Pin 1 0.202 (5.13) G 0.182 (4.63) N TI A E S 0.019 (0.48) 0.143 (3.63) 0.010 (0.25) 0.123 (3.13) 0.006 (0.16) 0.244 (6.19) 0.008 (0.20) 0.224 (5.69) 0.021 (0.53) 0.003 (0.08) 0.011 (0.28) 0.050 (1.27) TYP Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9

H C P L 0 6 X N/C 1 8 VCC + 1 8 VCC X — V F1 H + 2 7 VE _ 2 7 V01 ig h V F S _ 3 6 V _ 3 6 V p O 02 e e V d F2 - 1 N/C4 5 GND + 4 5 GND 0 M B i t / s Single-channel circuit drawing Dual-channel circuit drawing L (HCPL0600, HCPL0601 and HCPL0611) (HCPL0637, HCPL0638 and HCPL0639) o g i c G a t e Truth Table (Positive Logic) O p Input Enable Output to c H H L o u L H H p l e H L H r s L L H H* NC* L* L* NC* H* *Dual channel devices or single channel devices with pin 7 not connected. A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 2

H C Absolute Maximum Ratings (No derating required up to 85°C) P L Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be 0 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 6 X In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. X The absolute maximum ratings are stress ratings only. — Symbol Parameter Value Units H i g TSTG Storage Temperature -40 to +125 °C h T Operating Temperature -40 to +85 °C S OPR p EMITTER e e d I DC/Average Forward Input Current Single Channel 50 mA F - 1 (each channel) Dual Channel 0 M V Enable Input Voltage Single Channel 5.5 V E B Not to exceed VCC by more than 500mV i t / V Reverse Input Voltage (each channel) 5.0 V s R L P Power Dissipation Single Channel 45 mW o I g Dual Channel i c DETECTOR G a V Supply Voltage 7.0 V t CC e (1 minute max) O p I Output Current (each channel) Single Channel 50 mA O t o Dual Channel 15 c o V Output Voltage (each channel) 7.0 V u O p PO Collector Output Power Dissipation Single Channel 85 mW le r Dual Channel 85 s Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Units I Input Current, Low Level 0 250 µA FL I Input Current, High Level *6.3 15 mA FH V Supply Voltage, Output 4.5 5.5 V CC V Enable Voltage, Low Level Single Channel only 0 0.8 V EL V Enable Voltage, High Level Single Channel only 2.0 V V EH CC T Operating Temperature -40 +85 °C A N Fan Out (TTL load) Single Channel 8 TTL Loads Dual Channel 5 R Output Pull-up 330 4K Ω L *6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 3

H C Electrical Characteristics (T = -40°C to +85°C unless otherwise specified.) P A L Individual Component Characteristics 0 6 Symbol Parameter Test Conditions Min. Typ.* Max. Unit X X EMITTER — V Input Forward Voltage I = 10mA 1.8 V F F H TA = 25°C 1.75 ig h BVR Input Reverse Breakdown Voltage IR = 10µA 5.0 V S ΔVF/ΔTA Input Diode Temperature Coefficient I = 10mA -1.5 mV/°C p F e DETECTOR e d I High Level Supply Current I = 0mA, V = 0.5 V Single Channel 10 mA - CCH F E 1 V = 5.5V 0 CC Dual Channel 15 M ICCL Low Level Supply Current IF = 10mA, VE = 0.5 V Single Channel 13 mA B VCC = 5.5V Dual Channel 21 it / s I Low Level Enable Current V = 5.5V, V = 0.5V Single Channel -1.6 mA EL CC E L o I High Level Enable Current V = 5.5V, V = 2.0V Single Channel -1.6 mA EH CC E g VEH High Level Enable Voltage VCC = 5.5V, IF = 10mA Single Channel 2.0 V ic V Low Level Enable Voltage V = 5.5V, I = 10mA(2) Single Channel 0.8 V G EL CC F a t e Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA unless otherwise specified.) O p Symbol AC Characteristics Test Conditions Device Min. Typ. Max. Unit t o T Propagation Delay Time R = 350Ω, C = 15pF(3) T = 25°C All 20 75 ns c PLH L L A o to Output High Level (Fig. 20) 100 u p TPHL Propagation Delay Time RL = 350Ω, CL = 15pF(4) TA = 25°C All 25 75 ns le to Output Low Level (Fig. 20) 100 rs |T -T | Pulse Width Distortion R = 350Ω, C = 15pF (Fig. 20) All 35 ns PHL PLH L L t Output Rise Time (10-90%) R = 350Ω, C = 15pF(5) (Fig. 20) Single Ch 50 ns r L L Dual Ch 17 t Output Fall Time (90-10%) R = 350Ω, C = 15pF(6) (Fig. 20) Single Ch 12 ns f L L Dual Ch 5 t Enable Propagation Delay I = 7.5mA, V = 3.5V, R = 350Ω, HCPL0600 20 ns ELH F EH L Time to Output High Level C = 15pF(7) (Fig. 21) HCPL0601 L HCPL0611 t Enable Propagation Delay I = 7.5mA, V = 3.5V, R = 350Ω, HCPL0600 20 ns EHL F EH L Time to Output Low Level C = 15 pF(8) (Fig. 21) HCPL0601 L HCPL0611 |CM | Common Mode R = 350Ω, T =25°C, |V | = 10V HCPL0600 5,000 V/µs H L A CM Transient Immunity I = 0mA, HCPL0637 F (at Output High Level) V (Min.) = 2.0 V(9) OH |V | = 50V HCPL0601 10,000 (Fig. 22, 23) CM HCPL0638 |V | = 1,000V HCPL0611 15,000 CM HCPL0639 25,000 |CM | Common Mode R = 350Ω, T =25°C, |V | = 10V HCPL0600 5,000 V/µs L L A CM Transient Immunity I = 7.5mA, HCPL0637 F (at Output Low Level) V (Max.) = 0.8 V(10) OL |V | = 50V HCPL0601 10,000 (Fig. 22, 23) CM HCPL0638 |V | = 1,000V HCPL0611 15,000 CM HCPL0639 25,000 ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 4

H C Transfer Characteristics (T = -40°C to +85°C unless otherwise specified.) P A L 0 Symbol DC Characteristics Test Conditions Min. Typ.* Max. Unit 6 X IOH High Level Output Current VCC = 5.5V, VO = 5.5 V, IF = 250µA, 100 µA X VE = 2.0V(2) — VOL Low Level Output Voltage VCC = 5.5V, IF = 5mA, VE = 2.0V, 0.6 V H IOL = 13mA(2) ig I Input Threshold Current V = 5.5V, V = 0.6V, V = 2.0V, 5 mA h FT CC O E I = 13mA S OL p e Isolation Characteristics (T = -40°C to +85°C unless otherwise specified.) e A d - Symbol Characteristics Test Conditions Min. Typ.* Max. Unit 1 0 I Input-Output Relative humidity = 45%, 1.0* µA M I-O Insulation Leakage Current T = 25°C, t = 5s, B A VI-O = 3000 VDC(11) it/ s VISO Withstand Insulation Test Voltage RH < 50%, TA = 25°C, 3750 VRMS L II-O ≤ 2µA, t = 1 min.(11) o g RI-O Resistance (Input to Output) VI-O = 500V(11) 1012 Ω ic CI-O Capacitance (Input to Output) f = 1MHz(11) 0.6 pF G a *All typical values are at VCC = 5 V, TA = 25°C te O Notes: p t 1. The V supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic o CC c or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible o to the package V and GND pins of each device. u CC p 2. Enable Input – No pull up resistor required as the device has an internal pull up resistor. l e 3. tPLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current rs pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 4. t – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current PHL pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 5. t – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. r 6. t – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. f 7. t – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input ELH voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 8. t – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input EHL voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 9. CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high H state (i.e., V > 2.0V). Measured in volts per microsecond (V/µs). OUT 10.CM – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low L output state (i.e., V < 0.8V). Measured in volts per microsecond (V/µs). OUT 11.Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together. ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 5

H C Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) P L 0 6 Fig. 1 Forward Current vs. Input Forward Voltage Fig. 2 Output Voltage vs. Forward Current X X 100 6 TA = 25°C — VCC = 5V H 5 )Am 10 ig ( TNERRUC 1 TTA A= = 2 57°0C°CTA = 85°C TA = -40°C )V( EGATLOV 34 RL = 350Ω h Spee D T d RAW 0.1 TA = 0°C UPT RL = 1kΩ -1 R U 2 0 OF O – M – F0.01 Vo B I 1 i t / s L 0.001 0 o 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 0 1 2 3 4 5 g i VF – FORWARD VOLTAGE (V) IF – FORWARD INPUT CURRENT (mA) c G a Fig. 3 Input Threshold Current vs. Temperature Fig. 4 High Level Output Current vs. Temperature t e 5 16 O )Am( TNERRUC DLOH 34 VVCOC = = 0 5.6VVRL = 350Ω μ)A( TNERRUC TUPTU 1118024 ptocouplers S O ER 2 LE 6 HT RL = 1KΩ VE TU L H 4 P G NI – IHT 1 IH – I HO 02 VIVFOE = == 2 2V5V0CμCA = 5.5V 0 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TA – TEMPERATURE (˚C) TA – TEMPERATURE (˚C) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 6

H C Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) P L 0 6 Fig. 5 Low Level Output Voltage vs. Temperature Fig. 6 Low Level Output Current vs. Temperature X X 0.8 60 )V( EGATL 00..67 VVIFCE = C= 5 =2m V5A.5V )Am( TNER 5505 VVVCEO CL= = =2 V05.V6V — High OV TU 0.5 RUC T 45 IF = 10-15mA Sp PTUO 0.4 IO = 16mA IO = 12.8mA UPTU 40 eed LEVE 0.3 O LEV 35 IF = 5mA -10 L WOL – 0.2 IO = 6.4mA IO = 9.6mA EL WOL 30 MBi VLO 0.1 – LO 25 t/s I L 0.0 20 o -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 g TA – TEMPERATURE (˚C) TA – TEMPERATURE (˚C) ic G a Fig. 7 Propagation Delay vs. Temperature Fig. 8 Propagation Delay vs. Pulse Input Current t e 100 90 O V = 5V V = 5V CC CC p )sn( YALE 8900 IF = 7.5mA )sn( YALE 7800 TA = 25°C tRPLL H= 1kΩ tocoup D NO 70 tRPLL H= 1kΩ D NO 60 ler ITAGAPO 5600 tRPLL H= 350Ω ITAGAPO 50 tRPLL H= 350Ω s R R P – TP 40 tRPLH L= 350Ω & 1kΩ P – TP 40 tRPLH L= 350Ω & 1kΩ 30 30 20 20 -40 -20 0 20 40 60 80 100 5 7 9 11 13 15 TA – TEMPERATURE (˚C) IF – PULSE INPUT CURRENT (mA) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 7

H C Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) P L 0 6 Fig. 9 Typical Enable Propagation Delay vs. Temparature Fig. 10 Typical Rise and Fall Time vs. Temperature X X 90 240 — V = 5V V = 5V )sn 80 VCEHC = 3V IFC =C 7.5mA H ( Y VEL = 0V 200 i ALED N 6700 IF = 7.5mA RtELL H= 1kΩ )s 160 tRrL = 1kΩ gh S OIT n( E pe AGAPORP ELB 345000 tRELL H= 350Ω MIT LLAFt – f 12800 tr ed-10 M ANE – t E 1200 tRELH L= 350Ω & 1kΩ 40 RtRf LL == 335500ΩΩ & 1kΩ Bit/s L 0 0 o -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 g i c TA – TEMPERATURE (˚C) TA – TEMPERATURE (˚C) G a t e O Fig. 11 Typical Pulse Width Distortion vs. Temperature p t o 40 c V = 5V o )sn( N 35 IFC =C 7.5mA upl O e ITR 30 rs O T S 25 ID H RL = 1kΩ T 20 D IW E 15 S L U P 10 – D RL = 350Ω W 5 P 0 -40 -20 0 20 40 60 80 100 TA – TEMPERATURE (˚C) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 8

H C Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only) P L 0 Fig. 12 Input Forward Current vs. Forward Voltage Fig. 13 Input Threshold Current vs. Ambient Temperature 6 X 100 2.5 X VCC = 5.5V — mA) VO = 0.6V NT (mA) 10 TA = 100°C RRENT ( 2.0 High URRE 1 D CU 1.5 RL = 350Ω Sp FORWARD C 0.1 TA = 85°C TTAA == 0-4°C0°C T THRESHOL 1.0 RL = 1kΩ eed-10 I – F 0.01 TA = 25°C – INPU 0.5 RL = 4kΩ MB I TH it/s 0.001 0.0 L 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 -40 -20 0 20 40 60 80 100 o VF – FORWARD VOLTAGE (V) TA – AMBIENT TEMPERATURE (°C) gi c Fig. 14 High Level Output Current vs. Fig. 15 Low Level Output Current vs. G Ambient Temperature Ambient Temperature a 20 40 te NT (nA) 16 VVIFOE = == 2 2V5V0C C(μS A=in 5g.l5eV Channel Only) NT (mA) 35 VVVCEO CL= = =2 V05.. 65(SVVingle Channel Only) Opto RE RE IF = 5 – 15mA c R R o CU CU 30 u T 12 T p UTPU UTPU 25 ler O O s EL 8 EL EV EV 20 H L W L I – HIGOH 4 I – LOOL 15 0 10 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C) Fig. 16 Low Level Output Voltage vs. Fig. 17 Pulse Width Distortion vs. Ambient Temperature Ambient Temperature 0.6 70 V = 5V AGE (V) 0.5 VVIFCE = C= 5 =2m V5A. 5(SVingle Channel Only) ON (ns) 60 IFC =C 7.5mA PUT VOLT 0.4 IO = 12.8mA IO = 16mA DISTORTI 4500 RL = 4kΩ OUT 0.3 DTH EL WI 30 LOW LEV 0.2 IO = 6.4mA IO = 9.6mA – PULSE 20 RL = 1kΩ – OL 0.1 WD 10 RL = 350Ω V P 0.0 0 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 9

H C Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only) P L 0 Fig. 18 Propagation Delay vs. Fig. 19 Rise and Fall Times vs. 6 Ambient Temperature Ambient Temperature X X 120 350 7 VCC = 5V VCC = 5V — IF = 7.5mA 300 IF = 7.5mA 6 H 100 ns) tr – RL = 4kΩ ig Y ( 250 5 h N DELA 80 tRPLL H= 1kΩ tRPLL H= 4kΩ ME (ns) 200 4 ME (ns) Spe PROPAGATIO 4600 tPLH t – RISE TIr 110500 tf – RL = 350Ω, 1kΩ, 4kΩ 23 t – FALL TIf ed-10 M T – P 20 tRPLH L= 350Ω, 1kΩ, 4kΩ RL = 350Ω 50 ttrr – – R RLL = = 3 15k0ΩΩ 1 Bit/s 0 0 0 L -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 o g TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C) ic G a t e O p t o c o u p l e r s ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 10

H C P L tPfZ u=Ol st =re = 5G 05e Ωnns. +5V tPfZ u=Ol st =re = 5G 05e Ωnns. Dual Channel +5 V Input II FF == 37..755 m mAA 06X IF (I F ) X MoInnip(tI4ouF7rt)Ω 1234 GVCNCD 8765 .B1yμpfass RCLLO(VuOt)putMonitoNInropindugetRM 1234 GVNCCD8765 0B.y1pμaFRsLs CMNOL*ouodtnpeituotr VinOg O(O(VVuuOO tt))ppuutttPHL 9100%% tPLH 1.5 V — High S p tf tr e e Test Circuit for HCPL0600, Test Circuit for HCPL0637, d HCPL0601 and HCPL0611 HCPL0638 and HCPL0639 - 1 0 M Fig. 20 Test Circuit and Waveforms for t , t t and t. PLH PHL, r f B i t / s L o g i c PGuelnseerator Input G tr = 5ns Monitor Z O = 50Ω (V E ) at e +5V O p 3.0 V 1 VCC 8 I(nVpE u)t 1.5 V toc o 7.5 mA tEHL tELH u 2 7 b.1yμpfa ss RL (OVuO t)put 1.5 V pler Output s 3 6 (VO ) CL 4 5 GND Fig. 21 Test Circuit t and t . EHL ELH ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 11

H C P L 0 V 6 1 CC 8 +5V X X I — A F 2 7 b0.y1pμaf ss 350Ω H B i Output g VFF 3 6 (VO ) h S p 4 5 e GND e d V - CM 1 0 Pulse Gen M Test Circuit for HCPL0600, HCPL0601, and HCPL0611 B i t / s L o Peak g i c VCM G 0V a t e O p 5V CMH t Switching Pos. (A), I = 0 o VO F co VO (Min) u p l e r VO (Max) s Switching Pos. (B), I F = 7.5 mA VO 0.5 V CML Fig. 22 Test Circuit Common Mode Transient Immunity (HCPL0600, HCPL0601 and HCPL0611) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 12

H C P L IF 0 6 Dual Channel X B X A 1 VCC 8 +3.3V — RL Output VO H 2 7 Monitoring i VFF 0.1μF Node gh 3 6 Bypass S p 4 GND 5 e e d VCM -1 + – 0 Pulse M Generator ZO = 50 Ω Bi t Test Circuit for HCPL0637, HCPL0638 and HCPL0639 / s L o g i VCM c 0V G a t e Peak O p t o c o 3.3V CMH u Switching Pos. (A), I = 0 F p VO l e VO (Min) r s VO (Max) Switching Pos. (B), I = 7.5 mA F VO 0.5 V CML Fig. 23 Test Circuit Common Mode Transient Immunity (HCPL0637, HCPL0638 and HCPL0639) ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 13

H C 8-Pin Small Outline P L 0 6 X X 0.024 (0.61) — H i g 0.060 (1.52) h 0.275 (6.99) S p 0.155 (3.94) e e d - 1 0 M B 0.050 (1.27) it / s L o g i c G a t e O p t o c o u p l e r s ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 14

H C Ordering Information P L 0 Option Order Entry Identifier Description 6 X No Suffix HCPL0600 Shipped in tubes (50 units per tube) X V* HCPL0600V IEC60747-5-2 approval — R2 HCPL0600R2 Tape and Reel (2500 units per reel) H i g R2V* HCPL0600R2V IEC60747-5-2 approval, Tape and Reel (2500 units per reel) h S *Available for HCPL0600, HCPL0601, HCPL0611 only. p e Marking Information e d - 1 1 0 M B i t 600 2 /s L o g V X YY S 6 i c G a t e O p 3 4 5 to c o u p l Definitions e r s 1 Fairchild logo 2 Device number 3 VDE mark indicates IEC60747-5-2 approval (Note: Only appears on parts ordered with VDE option – See order entry table) 4 One digit year code, e.g., ‘3’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 15

H C Carrier Tape Specifications P L 0 8.0 ± 0.10 6 X 3.50 ± 0.20 X 2.0 ± 0.05 Ø1.5 MIN — 0.30 MAX 4.0 ± 0.10 1.75 ± 0.10 H i g h S 5.5 ± 0.05 p e 8.3 ± 0.10 12.0 ± 0.3 e 5.20 ± 0.20 d - 1 0 M B 0.1 MAX 6.40 ± 0.20 Ø1.5 ± 0.1/-0 it / s User Direction of Feed L o g i c G a t e O p t o c o u p l e r s ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 16

H C Reflow Profile P L 0 Max. Ramp-up Rate = 3°C/S 6 TP Max. Ramp-down Rate = 6°C/S X 260 X 240 tP — TL 220 H 200 Tsmax ig C) 180 Preheat Area tL h S °( 160 p Tsmin e e ur 140 ts ed t 120 a - r 1 e 100 0 p m 80 M e B T 60 i t / 40 s 20 L o 0 g i 120 240 360 c G Time 25°C to Peak a t Time (seconds) e O p t o c Profile Freature Pb-Free Assembly Profile o u p Temperature Min. (Tsmin) 150°C l e Temperature Max. (Tsmax) 200°C r s Time (t ) from (Tsmin to Tsmax) 60–120 seconds S Ramp-up Rate (t to t ) 3°C/second max. L P Liquidous Temperature (T ) 217°C L Time (t ) Maintained Above (T ) 60–150 seconds L L Peak Body Package Temperature 260°C +0°C / –5°C Time (t ) within 5°C of 260°C 30 seconds P Ramp-down Rate (T to T ) 6°C/second max. P L Time 25°C to Peak Temperature 8 minutes max. ©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com HCPL06XX Rev. 1.0.9 17

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