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0 2 P 2 1 October 2008 QI QF ET® F / FQB12P20 / FQI12P20 0 2 P 200V P-Channel MOSFET 2 1 B General Description Features Q F These P-Channel enhancement mode power field effect • -11.5A, -200V, RDS(on) = 0.47Ω @VGS = -10 V transistors are produced using Fairchild’s proprietary, • Low gate charge ( typical 31 nC) planar stripe, DMOS technology. • Low Crss ( typical 30 pF) This advanced technology has been especially tailored to • Fast switching minimize on-state resistance, provide superior switching • 100% avalanche tested performance, and withstand high energy pulse in the • Improved dv/dt capability avalanche and commutation mode. These devices are well • RoHS Compliant suited for high efficiency switching DC/DC converters. D S !!!!!!!! G!!!!!!!! ●●●●●●●●●●●●●●●● ▶▶▶▶▶▶▶▶ ▲▲▲▲▲▲▲▲ G S D2-PAK I2-PAK ●●●●●●●● G D S FQB Series FQI Series !!!!!!!! D Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol Parameter FQB12P20 / FQI12P20 Units VDSS Drain-Source Voltage -200 V ID Drain Current - Continuous (TC = 25°C) -11.5 A - Continuous (TC = 100°C) -7.27 A IDM Drain Current - Pulsed (Note 1) -46 A VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 810 mJ IAR Avalanche Current (Note 1) -11.5 A EAR Repetitive Avalanche Energy (Note 1) 12 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) -5.5 V/ns PD Power Dissipation (TA = 25°C) * 3.13 W Power Dissipation (TC = 25°C) 120 W - Derate above 25°C 0.96 W/°C TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, TL 1/8" from case for 5 seconds 300 °C Thermal Characteristics Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case -- 1.04 °C/W RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

F Elerical Characteristics Q TC = 25°C unless otherwise noted B Symbol Parameter Test Conditions Min Typ Max Units 1 2 Off Characteristics P 2 BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -200 -- -- V 0 /∆ B V D∆STS BCroeeaffkicdioewntn Voltage Temperature ID = -250 µA, Referenced to 25°C -- - -- V/°C / F J Q IDSS VDS = -200 V, VGS = 0 V -- -- -1 µA I Zero Gate Voltage Drain Current 1 VDS = -160 V, TC = 125°C -- -- -10 µA 2 IGSSF Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA P 2 IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA 0 On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -3.0 -- -5.0 V RDS(on) SOtna-tRice Dsirsatiann-Sceource VGS = -10 V, ID = -5.75 A -- 0.36 0.47 Ω gFS Forward Transconductance VDS = -40 V, ID = -5.75 A (Note 4) -- 6.4 -- S Dynamic Characteristics Ciss Input Capacitance V = -25 V, V = 0 V, -- 920 1200 pF DS GS Coss Output Capacitance f = 1.0 MHz -- 190 250 pF Crss Reverse Transfer Capacitance -- 30 40 pF Switching Characteristics td(on) Turn-On Delay Time V = -100 V, I = -11.5 A, -- 20 50 ns DD D tr Turn-On Rise Time R = 25 Ω -- 195 400 ns G td(off) Turn-Off Delay Time -- 40 90 ns tf Turn-Off Fall Time ( N o te 4, 5) -- 60 130 ns Qg Total Gate Charge VDS = -160 V, ID = -11.5 A, -- 31 40 nC Qgs Gate-Source Charge VGS = -10 V -- 8.1 -- nC Qgd Gate-Drain Charge ( N ote 4, 5) -- 16 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -11.5 A ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- -46 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -11.5 A -- -- -5.0 V trr Reverse Recovery Time VGS = 0 V, IS = -11.5 A, -- 180 -- ns Qrr Reverse Recovery Charge dIF / dt = 100 A/µs (Note 4) -- 1.44 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 9.2mH, IAS = -11.5A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ -11.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤300µs, Duty cycle ≤2% 5. Essentially independent of operating temperature ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

0 2 Typical Characteristics P 2 1 I Q F / T o p : - 1 5 V.0G SV 0 -10.0 V -8.0 V P2 101 --76..05 VV 101 B12 Current [A] B o t t o m : --56..50 VV Current [A] 150℃ Q ain 100 ain 100 F Dr Dr -I, D ※ Notes : -I , D 25℃ ※ Notes : 12.. 2T5C 0=μ 2s5 ℃Pulse Test -55℃ 12.. 2V5DS0 μ= s-4 P0uVlse Test 10-1 10-1 10-1 100 101 2 4 6 8 10 -VDS, Drain-Source Voltage [V] -VGS , Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 2.0 ΩR [],DS(on)Drain-Source On-Resistance011...505 VGVSG =S =- 2- 01V0V※ Note : TJ = 25℃ -I , Reverse Drain Current [A]DR110001 150℃ 25℃ ※ 12 N.. 2Vo5GteS0 sμ= : s0 VPulse Test 0.0 10-1 0 10 20 30 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -I , Drain Current [A] -V , Source-Drain Voltage [V] D SD Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs. Source Current and Temperature 2400 12 2000 CCCiorssssss === CCCggdsds ++ CCggdd (Cds = shorted) 10 VDS = -40V V = -100V DS V] V = -160V 1600 e [ 8 DS Capacitance [pF]1482000000 CCCroissssss ※ 12 N.. Vfo =GteS 1 s= M: 0H Vz , Gate-Source VoltagGS 246 V - ※ Note : ID = -11.5 A 0 0 10-1 100 101 0 5 10 15 20 25 30 35 -VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

F Typical Characteristics Q (Continued) B 1 2 P 1.2 2.5 2 0 / -BV, (Normalized)DSSDrain-Source Breakdown Voltage011...901 ※ 12 N.. VIoDG t=eS s =- 2: 05 0V μA R, (Normalized)DS(ON)Drain-Source On-Resistance 0112....5050 ※ 12 N.. VIoDG te=S s =- 5: -.1705 VA FQI12P20 0.8 0.0 -100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200 T, Junction Temperature [oC] T, Junction Temperature [oC] J J Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs. Temperature vs. Temperature 12 102 Operation in This Area is Limited by R DS(on) 10 100 µs A] 1 ms A] 8 ent [ 101 10 ms ent [ n Curr DC n Curr 6 ai ai -I, DrD100 ※ Notes : -I, DrD 4 1. TC = 25 oC 2 32.. STJin =g l1e5 P0 uolCse 10-1 0 100 101 102 25 50 75 100 125 150 -VDS, Drain-Source Voltage [V] TC, Case Temperature [℃] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature e ns 100 o sp D=0.5 e ermal R 10-1 00..12 ※ 132 N... ZTDoθJtuMeJt sCy-( tTF:) Ca= c= t1 oP.r0D,4 MD ℃*= Zt/1Wθ/t2J CM(t)ax. h 0.05 T Z(t), θJC 00..0021 single pulse PDM t1t2 10-2 10-5 10-4 10-3 10-2 10-1 100 101 t , Square Wave Pulse Duration [sec] 1 Figure 11. Transient Thermal Response Curve ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

0 2 P Gate Charge Test Circuit & Waveform 2 1 I Q F / 0 VV 2 GGSS SSaammee TTyyppee P 2 5500KKΩΩ aass DDUUTT QQ gg 1 1122VV 220000nnFF --1100VV B 330000nnFF Q VV VV DDSS F GGSS QQ QQ ggss ggdd DDUUTT --33mmAA CChhaarrggee Resistive Switching Test Circuit & Waveforms RR LL VVDDSS ttoonn ttooffff VVGGSS VVDDDD VV ttdd((oonn)) ttrr ttdd((ooffff)) ttff RR GGSS GG 1100%% DDUUTT --1100VV VV 9900%% DDSS Unclamped Inductive Switching Test Circuit & Waveforms BBVV LLL 1111 DDSSSS EEE ===---------------- LLLIII 222 ---------------------------------------- VVDDSS AAASSS 2222 AAASSS BBVV --VV DDSSSS DDDD tt TTiimmee pp III DDD RRGG VV VVDDDD VVDDSS ((tt)) DDDD II ((tt)) DD --1100VV DDUUTT II AASS tt BBVV pp DDSSSS ©2008 Fairchild Semiconductor International Rev. A1, Oct 20008

F Q B 1 Peak Diode Recovery dv/dt Test Circuit & Waveforms 2 P 2 0 / F ++ Q I 1 2 VVDDSS P 2 DDUUTT __ 0 II SSDD LLL DDrriivveerr RR GG CCoommpplliimmeenntt ooff DDUUTT ((NN--CChhaannnneell)) VVDDDD VV GGSS ••ddvv//ddttccoonnttrroolllleedd bbyy RR GG ••II ccoonnttrroolllleedd bbyy ppuullssee ppeerriioodd SSDD GGGaaattteee PPPuuulllssseee WWWiiidddttthhh VVGGSS DDD ===------GGG------aaa------ttt---eee------ PPP------uuu------lll---sss---eee------ ---PPP------eee------rrr---iiiooo------ddd--- 1100VV (( DDrriivveerr )) BBooddyy DDiiooddee RReevveerrssee CCuurrrreenntt II SSDD (( DDUUTT )) IIRRMM ddii//ddtt II ,, BBooddyy DDiiooddee FFoorrwwaarrdd CCuurrrreenntt FFMM VV VV DDSS SSDD (( DDUUTT )) BBooddyy DDiiooddee VV DDDD FFoorrwwaarrdd VVoollttaaggee DDrroopp BBooddyy DDiiooddee RReeccoovveerryyddvv//ddtt ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

0 2 P Mechanical Dimensions 2 1 QI D2 - PAK F / 0 2 P 2 1 B Q F Dimensions in Millimeters ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

F Q Mechanical Dimensions B 1 2 2 I - PAK P 2 0 / F Q I 1 2 P 2 0 Dimensions in Millimeters ©2008 Fairchild Semiconductor International Rev. A1, Oct 2008

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