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F P F 1 0 April 2015 4 8 — I n te l l i FPF1048 M A IntelliMAX™ 3 A-Capable, Slew-Rate-Controlled Load Switch X ™ with True Reverse Current Blocking 3 A -C a p Features Description a b l e  Input Voltage Operating Range: 1.5 V to 5.5 V The FPF1048 advanced load management switch , targets applications requiring a highly integrated S  Typical RDS(ON): solution. It disconnects loads powered from the DC le w - 21 mΩ at VIN=5.5 V power rail (<6 V) with stringent off-state current targets - and high load capacitances (up to 100 µF). The R - 23 mΩ at VIN=4.5 V FPF1048 consists of slew-rate controlled low- a t - 41 mΩ at VIN=1.8 V impedance MOSFET switch (23 mΩ typical) and e- - 90 mΩ at VIN=1.5 V integrated analog features. The slew-rate controlled Co turn-on characteristic prevents inrush current and the  Slew Rate/Inrush Control with tR: 2.7 ms (Typ.) resulting excessive voltage droop on power rails. ntr  3 A Maximum Continuous Current Capability The FPF1048 has a True Reverse Current Blocking ol l e  Low Off Switch Current: <1 µA (TRCB) function that obstructs unwanted reverse d  True Reverse Current Blocking (TRCB) cTuhrer enetx fcreopmti oVnOaUlTly t o lVowIN doufrfi-nsgta bteo thc uOrNre natn dd OraFinF s(t<a1teµsA. Lo  Logic CMOS IO Meets JESD76 Standard for GPIO maximum) facilitates compliance with standby power ad Interface and Related Power Supply Requirements requirements. The input voltage range operates from S 1.5 V to 5.5 VDC to support a wide range of applications w  ESD Protected: in consumer, optical, medical, storage, portable, and i t - Human Body Model: >8 kV industrial-device power management. Switch control is c h managed by a logic input (active HIGH) capable of - Charged Device Model: >1.5 kV w interfacing directly with low-voltage control signal / i - IEC 61000-4-2 Air Discharge: >15 kV General-Purpose Input / Output (GPIO) without an th - IEC 61000-4-2 Contact Discharge: >8 kV external pull-down resistor. T r The device is packaged in advanced, fully “green” u e Applications compliant, 1.0 mm x 1.5 mm, Wafer-Level Chip-Scale R Package (WLCSP) with backside lamination. e  Smart Phones, Tablet PCs v e  Storage, DSLR, and Portable Devices rs e B l o c k i n Ordering Information g Switch R Top ON Input Output ON Pin Part Number (Typical) t Package Mark Buffer Discharge Activity R at 4.5V IN 6-Ball, WLCSP with Active FPF1048BUCX RA 23 mΩ CMOS NA 2.7 ms Backside Laminate, 2x3 Array, HIGH 0.5 mm Pitch, 300 µm Balls © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8

F P Application Diagram F 1 0 4 8 — VIN VOUT I + n t 1.5~5.5V FPF1048 COUT el l CIN OFF ON ON iM A X GND ™ 3 A - C a Figure 1. General Application p a b l e , S l e w VIN=5V R VIN VOUT + -R PU a CIN 10MΩ FPF1048 0.1µCF~O1UT00µF te 1µF~22µF ON -C R OUT o R (optional) n PD RIN NC GND tro l l e d L o a Figure 2. Specific Application with 10 MΩ Pull-Up Resistor at ON Pin d S Notes: w 1. Turn-on operation with a 10 MΩ pull-up resistor at ON pin is acceptable. i t 2. V should be high enough to generate V greater than V at the ON pin. c IN ON IH h 3. NC means no connection. w 4. R and R can be added to reduce transient peak voltage. 1 Ω~10 Ω is recommended. IN OUT i th T r u e R e v e r s e B l o c k i n g © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 2

F P Functional Block Diagram F 1 0 4 8 — TRCB VIN VOUT In t FPF1048 e l l i M A CONTROL X ON LOGIC ™ Turn-On Slew Rate Controlled Driver 3 A - C ESD Protection a RON p a b l e , S l e w GND - R a Figure 3. Functional Block Diagram t e - C o n Pin Configurations t r o l l e Pin 1 d L o a d S w i tc h w VOUT A1 A2 VIN VIN AA22 A1 VOUT ith T r V V V V u OUT B1 B2 IN IN B2 B1 OUT e R e v GND C1 C2 ON ON C2 C1 GND e r s e Figure 4. Pin Assignments (Top View) Figure 5. Pin Assignments (Bottom View) B l o c k Pin Description i n g Pin # Name Description A1, B1 V Switch Output OUT A2, B2 V Supply Input: Input to the Power Switch IN C1 GND Ground C2 ON ON/OFF Control, Active High, GPIO Compatible © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 3

F P Absolute Maximum Ratings F 1 0 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be 4 8 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. — In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. I n t e Symbol Parameters Min. Max. Unit l l i M V V , V , V to GND -0.3 6.0 V IN IN OUT ON A I Maximum Continuous Switch Current 3.0 A X SW ™ P Power Dissipation at T =25°C 1.2 W D A 3 T Storage Junction Temperature -65 +150 °C A STG - C T Operating Temperature Range -40 +85 °C A a 85(5) p a JA Thermal Resistance, Junction-to-Ambient 110(6) °C/W bl e Human Body Model, JESD22-A114 8.0 , S Electrostatic Charged Device Model, JESD22-C101 1.5 le ESD Discharge kV w Capability IEC61000-4-2 Air Discharge (VIN, VON, VOUT to GND) 15.0 -R System Level Contact Discharge (V V V to GND) 8.0 a IN, ON, OUT t e Notes: - C 5. Measured using 2S2P JEDEC std. PCB. o 6. Measured using 2S2P JEDEC PCB cold plate method. n t r o l l e d Recommended Operating Conditions L o a The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended d operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not S recommend exceeding them or designing to Absolute Maximum Ratings. w i t c Symbol Parameters Min. Typ. Max. Unit h w V Input Voltage 1.5 5.5 V IN i t h TA Ambient Operating Temperature -40 +85 °C T I Continuous Switch Current 2.5 3 A r SW u e R e v e r s e B l o c k i n g © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 4

F Electrical Characteristics P F 1 Unless otherwise noted, V =1.5 to 5.5 V, T =-40 to +85°C; typical values are at V =4.5 V and T =25°C. 0 IN A IN A 4 8 Symbol Parameters Conditions Min. Typ. Max. Units — Basic Operation I n V Input Voltage 1.5 5.5 V t IN e l IQ(OFF) Off Supply Current VON=GND, VOUT=Open 1 μA liM ISD Shutdown Current VON=GND, VOUT=GND, TA= -40 to +85°C 0.2 4.0 μA A X IQ Quiescent Current IOUT=0 mA 11 μA ™ VIN=5.5 V, IOUT=3 A(7) 22.0 3 A VIN=5.5 V, IOUT=2 A(7) 21.5 - C VIN=5.5 V, IOUT=1 A, TA=25°C 21.0 28.0 a p V =4.5 V, I =3 A(7) 24.0 a IN OUT b VIN=4.5 V, IOUT=2 A(7) 23.5 le RON On Resistance VIN=4.5 V, IOUT=1 A, TA=25°C 23.0 30.0 mΩ , S l V =3.3 V, I =500 mA, T =25°C 26.0 e IN OUT A w VIN=2.5 V, IOUT=500 mA, TA=25°C 30.0 -R VIN=1.8 V, IOUT=250 mA, TA=25°C 41.0 at e VIN=1.5 V, IOUT=250 mA, TA=25°C 90.0 110.0 -C o V ON Input Logic High Voltage V =1.5 V to 5.5 V 1.15 V IH IN n t V =1.8 V to 5.5 V 0.65 V r V ON Input Logic Low Voltage IN o IL VIN=1.5 V to 1.8 V 0.60 V lle d I ON Input Leakage V = V or GND 1.0 μA ON ON IN L R Pull-Down Resistance at ON Pin V = V = 1.5 V to 5.5 V, T = -40 - +85°C 6.38 7.65 8.86 MΩ o ON_PD IN ON A a True Reverse Current Blocking d S VT_RCB RCB Protection Trip Point VOUT - VIN 45 mV w i RCB Protection Release Trip t V V -V 25 mV c R_RCB Point IN OUT h w RCB Hysteresis 70 mV i t I V Shutdown Current V = 0, V = 4.5 V, V = Short to GND 2 μA h SD_OUT OUT ON OUT IN T tRCB_ON RCB Response Time, Device ON VOUT - VIN=100 mV, VON = HIGH 4 µs ru t RCB Response Time, Device OFF V - V =100 mV, V = LOW 2.5 µs e RCB_OFF OUT IN ON R Dynamic Characteristics e v t Turn-On Delay(8,9) 1.7 ms e DON r t V Rise Time(8,9) V =4.5 V, R =5 Ω, C =100 µF, T =25°C 2.7 ms s R OUT IN L L A e t Turn-On Time(8,9) 4.4 ms B ON l tDON Turn-On Delay(8,9) 1.7 ms oc tR VOUT Rise Time(8,9) VTIN==245.°5C V , RL=150 Ω, CL=100 µF, 1.5 ms kin A t Turn-On Time(8,9) 3.2 ms g ON t Turn-Off Delay(8,10) 1.8 ms DOFF V =4.5 V, R =150 Ω, C =100 µF, t V Fall Time(8,10) IN L L 34 ms F OUT T =25°C A t Turn-Off Time(8,10) 35 ms OFF Notes: 7. This parameter is guaranteed by design and characterization; not production tested. 8. t /t /t /t are defined in Figure 22. DON DOFF R F 9. t =t + t . ON R DON 10. t =t + t . OFF F DOFF © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 5

F P Typical Characteristics F 1 0 4 8 8.00 8.00 — 7.00 ON = VIN VIN= 5.5V 7.00 ON = VIN I n RENT (A)m 56..0000 VIN= 4.5V RENT (A)m 56..0000 85 C 25 C telliM UR 4.00 UR 4.00 A PLY C 3.00 PLY C 3.00 -40 C X™ UP 2.00 VIN= 1.5V UP 2.00 S S 3 1.00 1.00 A - 0.00 0.00 C -40 -25 -10 5 20 35 50 65 80 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 a p TJ, JUNCTION TEMPERATURE (°C) SUPPLY VOLTAGE (V) a b l Figure 6. Supply Current vs. Temperature Figure 7. Supply Current vs. Supply Voltage e , S l e w - R 9.00 ON = 0V 2.50 ON = 0V at RENT (A)m 57..0000 RENT (A)m 12..5000 85 C e-Con VSHUTDOWN CURIN--3113....00000000 VVININ== 51..55VV VSHUTDOWN CURIN001...050000 -2450 CC trolled Loa -5.00 -0.50 d -40 -25 -10 5 20 35 50 65 80 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 S TJ, JUNCTION TEMPERATURE (°C) SUPPLY VOLTAGE (V) w i t Figure 8. Shutdown Current vs. Temperature Figure 9. Shutdown Current vs. Supply Voltage c h w i t h T 80.0 80 r Ohm)6700..00 ON = VIN VIN= 1.5V, IOUT= 250mA Ohm) 6700 OIIIOOONUUUTTT ==== V251I50AN00 @mmAA V @@IN = VV 4IINN.0==- 512...555V--13..83VV ue Re m m v ANCE (4500..00 VIN= 1.8V, IOUT= 250mA ANCE ( 4500 ers ESIST30.0 VIN= 3.3V, IOUT= 500mA ESIST 30 85 C e B N R20.0 N R 20 lo O10.0 VIN= 5.5V, IOUT= 1A O 10 25 C -40 C ck 0.0 0 in -40 -25 -10 5 20 35 50 65 80 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 g TJ, JUNCTION TEMPERATURE (°C) SUPPLY VOLTAGE (V) Figure 10. R vs. Temperature Figure 11. R vs. Supply Voltage ON ON © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 6

F Typical Characteristics P F 1 0 4 1.20 1.00 8 E (V) 1.10 E (V) 0.95 — LTAG 1.00 VIN= 5.5V LTAG 0.90 25 C In OW VO 0.90 OW VO 0.85 -40 C tell UT LOGIC L 000...678000 VIN= 1.5V UT LOGIC L 000...787500 85 C iMAX™ P P N N N I 0.50 N I 0.65 3 O O A 0.40 0.60 - -40 -25 -10 5 20 35 50 65 80 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 C TJ, JUNCTION TEMPERATURE (°C) SUPPLY VOLTAGE (V) ap a Figure 12. V vs. Temperature Figure 13. V vs. Supply Voltage b IL IL l e , S l e w 1.05 1.05 - V) V) R E ( 1.00 E ( 1.00 a LTAG 0.95 VIN= 5.5V LTAG 0.95 te- VO 0.90 VO 0.90 C H H -40 C o GIC HIG 00..8805 GIC HIG 00..8850 25 C ntro PUT LO 00..7705 VIN= 1.5V PUT LO 00..7705 85 C lled N IN 0.65 N IN 0.65 L O 0.60 O 0.60 o a -40 -25 -10 5 20 35 50 65 80 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 d TJ, JUNCTION TEMPERATURE (°C) SUPPLY VOLTAGE (V) S w Figure 14. V vs. Temperature Figure 15. V vs. Supply Voltage i IH IH t c h w i t h 1.00 T V) 0.95 25 C ru TAGE ( 0.90 VIH e R L O 0.85 e C V VIL v GI 0.80 e O r UT L 0.75 se P N 0.70 B N I l O 0.65 o c 0.60 k 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 in SUPPLY VOLTAGE (V) g Figure 16. On Pin Threshold vs. Supply Voltage © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 7

F Typical Characteristics P F 1 0 4 35.0 2.0 8 — E (ms)2350..00 tF ME (ms)11..68 tDON VCRILLN=== 11450.500VµF Inte L TIM20.0 AY TI1.4 lliM FAL15.0 DEL A RISE/105..00 tR VCRILLN=== 11405.500VµF ON/OFF 11..02 tDOFF X™3 A 0.0 0.8 - -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 5 20 35 50 65 80 C TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) ap a Figure 17. t / t vs. Temperature Figure 18. t vs. Temperature b R F DON l e , S l e w 50.0 22.0 - R 45.0 a V) V) 20.0 te m 40.0 m - E ( E ( 18.0 C AG 35.0 AG o RCB TRIP VOLT 223050...000 RCB REL VOLT 111246...000 ntrolled 15.0 L 10.0 10.0 o a -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 5 20 35 50 65 80 d TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) S w Figure 19. RCB Trip vs. Temperature Figure 20. RCB Release vs. Temperature it c h w i t h T r u e R 80.0 e v E (mV)70.0 4.5V ers AG60.0 e S VOLT50.0 Blo RISI40.0 c E k YST30.0 in CB H20.0 g R 10.0 -40 -25 -10 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (°C) Figure 21. RCB Hysteresis vs. Temperature Figure 22. Timing Diagram © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 8

F Typical Characteristics P F 1 0 4 8 — I n t e l l i M A X ™ 3 A - C a p a b l Figure 23. Turn-On Response Figure 24. Turn-On Response e , (VIN=4.5 V, CIN=10 µF, COUT=100 µF, RL=5 Ω) (VIN=4.5 V, CIN=10 µF, COUT=100 µF, RL=150 Ω) S l e w - R a t e - C o n t r o l l e d L o a d S w i t c h Figure 25. Turn-Off Response w (VIN=4.5 V, CIN=10 µF, COUT=100 µF, RL=150 Ω) it h T r u e R e v e r s e B l o c k i n g Figure 26. RCB Response During Off (V =Open, Figure 27. RCB Response During On (V =V =3.6 V, IN IN ON V =GND, V =5.5 V, C =10 µF, C =100 µF) V =5 V, C =10 µF, C =100 µF) ON OUT IN OUT OUT IN OUT © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 9

F P Operation and Application Description F 1 0 The FPF1048 is a low-R P-channel load switch with 4 ON 8 controlled turn-on and True Reverse Current Blocking — (TRCB). The core is a 23 mΩ P-channel MOSFET and controller capable of functioning over a wide input I n operating range of 1.5 to 5.5 V. The ON pin, an active- t e HIGH, GPIO/CMOS-compatible input; controls the state l l i of the switch. TRCB functionality blocks unwanted M reverse current during both ON and OFF states when A higher V than V is applied. X OUT IN ™ Input Capacitor 3 A To limit the voltage drop on the input supply caused by - transient inrush current when the switch turns on into a C a discharged load capacitor; a capacitor must be placed p between the V and GND pins. At least 1 µF ceramic a IN b capacitor, CIN, placed close to the pins is usually le svoulftfaicgieen dt.r oHpi ginh ehrig-vhaelur-ec uCrrIeN nct aanp pbleic autsioends .t o reduce the Figure 28. Inrush Current Waveform, Under 5 VIN, , S COUT=100 μF, no Load le Inrush Current w Output Capacitor - Inrush current occurs when the device is turned on. R Inrush current is dependent on output capacitance and At least 0.1 µF capacitor, COUT, should be placed a slew rate control capability, as expressed by: between the VOUT and GND pins. This capacitor te prevents parasitic board inductance from forcing VOUT -C V V below GND when the switch is on. o IINRUSH COUT  IN t INITIAL ILOAD (1) True Reverse Current Blocking ntr R o The true reverse current blocking feature protects the ll where: input source against current flow from output to input ed COUT: Output capacitance; regardless of whether the load switch is on or off. L t : Slew rate or rise time at V ; o R OUT Board Layout a V : Input voltage; d IN V : Initial voltage at C , usually GND; and For best performance, all traces should be as short as S INITIAL OUT possible. To be most effective, the input and output w I : Load current. LOAD capacitors should be placed close to the device to it minimize the effect that parasitic trace inductance on ch Higher inrush current causes higher input voltage drop, normal and short-circuit operation. Using wide traces or w depending on the distributed input resistance and input capacitance. High inrush current can cause problems. lGaNrgDe) cmoipnpimeri zepsla nthees pfoarr aasiltl icp ienlse c(tVricINa,l VefOfeUTc,t sO aNn,d atnhde ith FPF1048 has a 2.7 ms of slew rate capability under case-to-ambient thermal impedance. T r 4.5 V at 1000 µF of C and 5 Ω of R so inrush u IN OUT L e current can be minimized and no input voltage drop R appears. Table 1 and Figure 28 show the values and e actual waveforms with C =10 µF, C =100 µF, and no v IN OUT e load current. r s Table 1. Inrush Current by Input Voltage e B Inrush Current [mA] lo c VIN [V] tR [ms] Calculated k Measured in with 2.7 ms t R g 1.5 1.62 76 56 3.3 2.03 140 122 5.0 2.33 196 185 © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 10

F Physical Dimensions P F 1 0 4 0.03 C 8 F E A (Ø0.250) — 2X Cu Pad B (Ø0.350) I SOLDER MASK A1 n t OPENING e l l BALL A1 (1.00) iM INDEX AREA D A X (0.50) ™ 0.03 C 2X 3 A TOP VIEW RECOMMENDED LAND PATTERN -C a (NSMD PAD TYPE) p a b 0.06 C l e 0.625 0.332±0.018 , 0.05 C 0.539 E 0.250±0.025 S l e w - R C SEATING PLANE D a t e SIDE VIEWS - C o n NOTES: tr o l A. NO JEDEC REGISTRATION APPLIES. le d 0.005 C A B B. DIMENSIONS ARE IN MILLIMETERS. L o Ø0.315 +/- .025 C. DIMENSIONS AND TOLERANCE a 0.50 6X PER ASMEY14.5M, 1994. d S C D. DATUM C IS DEFINED BY THE SPHERICAL w 1.00 B (Y) ±0.018 CROWNS OF THE BALLS. itc 0.50 h A E. PACKAGE NOMINAL HEIGHT IS 582 MICRONS w ±43 MICRONS (539-625 MICRONS). 1 2 F it h F. FOR DIMENSIONS D, E, X, AND Y SEE (X) ±0.018 T PRODUCT DATASHEET. r u BOTTOM VIEW G. DRAWING FILNAME: MKT-UC006AFrev2. e R e v e r s Figure 29. 6-Ball WLCSP, 2x3 Array, 0.5 mm Pitch, 300 µm Ball e B l o Product-Specific Dimensions c k i n Product D E X Y g FPF1048BUCX 1460 µm ±30 µm 960 µm ±30 µm 230 µm 230 µm © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 11

F P F 1 0 4 8 — I n t e l l i M A X ™ 3 A - C a p a b l e , S l e w - R a t e - C o n t r o l l e d L o a d S w i t c h w i t h T r u e R e v e r s e B l o c k i n g © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FPF1048 • Rev. 1.8 12

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