Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

F D S 8 December 2008 8 7 8 FDS8878 N - ® C N-Channel PowerTrench MOSFET h a 30V, 10.2A, 14mΩ n n e Features General Description l P (cid:132) r = 14mΩ, V = 10V, I = 10.2A This N-Channel MOSFET has been designed specifically to o DS(on) GS D improve the overall efficiency of DC/DC converters using w (cid:132) rDS(on) = 17mΩ, VGS = 4.5V, ID = 9.3A either synchronous or conventional switching PWM e controllers. It has been optimized for low gate charge, low rT (cid:132) High performance trench technology for extremely low rDS(on) and fast switching speed. r r e DS(on) Applications n (cid:132) Low gate charge c h (cid:132) DC/DC converters ® (cid:132) High power and current handling capability M (cid:132) RoHS Compliant O S F E T Branding Dash 5 4 6 3 5 1 7 2 2 3 4 8 1 SO-8 ©2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDS8878 Rev. C

F MOSFET Maximum Ratings TA = 25°C unless otherwise noted D S Symbol Parameter Ratings Units 8 V Drain to Source Voltage 30 V 8 DSS 7 VGS Gate to Source Voltage ±20 V 8 Drain Current N Continuous (T = 25oC, V = 10V, R = 50oC/W) 10.2 A - I A GS θJA C D Continuous (TA = 25oC, VGS = 4.5V, RθJA = 50oC/W) 9.3 A h Pulsed 80 A a n EAS Single Pulse Avalanche Energy (Note 1) 57 mJ n Power dissipation 2.5 W e PD Derate above 25oC 20 mW/oC l P T , T Operating and Storage Temperature -55 to 150 oC o J STG w Thermal Characteristics e r T RθJC Thermal Resistance, Junction to Case (Note 2) 25 oC/W r e RθJA Thermal Resistance, Junction to Ambient (Note 2a) 50 oC/W n R Thermal Resistance, Junction to Ambient (Note 2b) 125 oC/W c θJA h ® Package Marking and Ordering Information M O Device Marking Device Package Reel Size Tape Width Quantity S FDS8878 FDS8878 SO-8 330mm 12mm 2500 units F E Electrical Characteristics T = 25°C unless otherwise noted T J Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics B Drain to Source Breakdown Voltage I = 250µA, V = 0V 30 - - V VDSS D GS V = 24V - - 1 I Zero Gate Voltage Drain Current DS µA DSS V = 0V T = 150oC - - 250 GS J I Gate to Source Leakage Current V = ±20V - - ±100 nA GSS GS On Characteristics V Gate to Source Threshold Voltage V = V , I = 250µA 1.2 - 2.5 V GS(TH) GS DS D I = 10.2A, V = 10V - 11.0 14.0 D GS I = 9.3A, V = 4.5V - 13.8 17.0 r Drain to Source On Resistance D GS mΩ DS(on) I = 10.2A, V = 10V, D GS - 17.5 22.7 T = 150oC J Dynamic Characteristics C Input Capacitance - 897 - pF ISS V = 15V, V = 0V, C Output Capacitance DS GS - 190 - pF OSS f = 1MHz C Reverse Transfer Capacitance - 111 - pF RSS R Gate Resistance V = 0.5V, f = 1MHz 0.7 2.9 5.0 Ω G GS Q Total Gate Charge at 10V V = 0V to 10V - 17 26 nC g(TOT) GS V = 15V Q Total Gate Charge at 5V V = 0V to 5V DD - 9 14 nC g(5) GS I = 10.2A Q Threshold Gate Charge V = 0V to 1V D - 0.9 1.4 nC g(TH) GS I = 1.0mA g Q Gate to Source Gate Charge - 2.5 - nC gs Q Gate Charge Threshold to Plateau - 1.7 - nC gs2 Q Gate to Drain “Miller” Charge - 3.3 - nC gd ©2008 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDS8878 Rev. C

F Switching Characteristics (V = 10V) D GS S t Turn-On Time - - 54 ns ON 8 t Turn-On Delay Time - 7 - ns 8 d(ON) 7 tr Rise Time VDD = 15V, ID = 10.2A - 29 - ns 8 td(OFF) Turn-Off Delay Time VGS = 10V, RGS = 16Ω - 45 - ns N tf Fall Time - 18 - ns -C t Turn-Off Time - - 94 ns OFF h a Drain-Source Diode Characteristics n n I = 10.2A - - 1.25 V V Source to Drain Diode Voltage SD e SD I = 2.1A - - 1.0 V l SD P t Reverse Recovery Time I = 10.2A, dI /dt = 100A/µs - - 19 ns rr SD SD o QRR Reverse Recovered Charge ISD = 10.2A, dISD/dt = 100A/µs - - 9.5 nC w e Notes: r 1: Starting TJ = 25°C, L = 1mH, IAS = 10.7A, VDD = 30V, VGS = 10V. T 2: RdrθaJiAn ips inthse. sRuθmJC o ifs t hgeu ajurancnttieoend-t ob-yc adsees igann dw chailsee R-toθJ-Aa m isb ideentte trhmeirnmeadl breys tihseta unsceer w’sh beorea rtdh ed ecsaisgen .thermal reference is defined as the solder mounting surface of the re a) 50°C/W when mounted on a 1in2 pad of 2 oz copper. n b) 125°C/W when mounted on a minimum pad. c h ® M O S F E T ©2008 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDS8878 Rev. C

F Typical Characteristics T = 25°C unless otherwise noted D J S 8 8 1.2 12 7 8 R 1.0 N ATION MULTIPLIE 00..68 N CURRENT (A) 69 VGS = 4.5V VGS = 10V -Chann R DISSIP 0.4 I, DRAID 3 el P WE 0.2 o PO RθJA=50oC/W w e 0 0 r 0 25 50 75 100 125 150 25 50 75 100 125 150 T TA, AMBIENT TEMPERATURE (oC) TA, AMBIENT TEMPERATURE (oC) re Figure 1. Normalized Power Dissipation vs Figure 2. Maximum Continuous Drain Current vs n c Ambient Temperature Ambient Temperature h ® 2 M 1 DUTY CYCLE-DESCENDING ORDER O S D = 0.5 AL 0.2 F M A 0.1 E ERZJθ 0.1 0.05 T TH E, 0.02 ALIZED PEDANC 0.01 RMIM 0.01 O N SINGLE PULSE R = 125oC/W θJA 0.001 10-4 10-3 10-2 10-1 100 101 102 103 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 1000 V = 10V W) GS SINGLE PULSE R ( RθJA = 125oC/W WE 100 T = 25oC O A P T N E NSI A 10 R T K A E P , PK) 1 P( 0.5 10-4 10-3 10-2 10-1 100 101 102 103 t, PULSE WIDTH ( s) Figure 4. Single Pulse Maximum Power Dissipation ©2008 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDS8878 Rev. C

F Typical Characteristics T = 25°C unless otherwise noted D J S 8 100 80 8 7 If R = 0 PULSE DURATION = 80µs tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) DUTY CYCLE = 0.5%MAX 8 URRENT (A) ItfA VR =≠ (0L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] ENT (A) 60 VDS = 5V N-Ch LANCHE C 10 STARTING TJ = 25oC AIN CURR 40 TJ = 25oC anne I, AVAAS STARTING TJ = 150oC I, DRD 20 TJ = 150oC TJ = -55oC l Po w 0 1 1 2 3 4 5 e r 0.01 0.1 1 10 100 VGS, GATE TO SOU RCE VOLTAGE (V) T tAV, TIME IN AVALANCHE (ms) r e n NOTE: Refer to Fairchild Application Notes AN7514 and AN7515 Figure 6. Transfer Characteristics Figure 5. Unclamped Inductive Switching c h Capability ® M 80 50 O TA = 25oC PULSE DURATION = 80µs S PULSE DURATION = 80µs V = 10V DUTY CYCLE = 0.5% MAX F GS DUTY CYCLE = 0.5%MAX E 40 E I, DRAIN CURRENT (A) D 246000 VGS = 5V VGS = 3.5V r, DRAIN TO SOURCDS(ON)ON RESISTANCE (mW) 123000 ID = 1AID = 10.2A T VGS = 3V 0 0.0 0.2 0.4 0.6 0.8 0 2 4 6 8 10 VDS, DRAIN TO SO URCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 7. Saturation Characteristics Figure 8. Drain to Source On Resistance vs Gate Voltage and Drain Current 1.6 1.2 PULSE DURATION = 80µs VGS = VDS, ID = 250µA DUTY CYCLE = 0.5% MAX E C R 1.4 ALIZED DRAIN TO SOUON RESISTANCE 11..20 NORMALIZED GATEHRESHOLD VOLTAGE 01..80 M T R 0.8 O N VGS = 10V, ID = 10.2A 0.6 0.6 -80 -40 0 40 80 120 160 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC) Figure 9. Normalized Drain to Source On Figure 10. Normalized Gate Threshold Voltage vs Resistance vs Junction Temperature Junction Temperature ©2008 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDS8878 Rev. C

F Typical Characteristics T = 25°C unless otherwise noted D J S 8 8 1.6 2000 PULSE DURATION = 80µs 7 E DUTY CYCLE = 0.5% MAX CISS = CGS + CGD 8 C 1000 N R TO SOUNCE 1.4 E (pF) -Ch D DRAIN RESISTA 1.2 ACITANC CRSS = CGD COSS ≅ CDS + CGD ann MALIZEON 1.0 C, CAP el P R O o N w VGS = 10V, ID = 10.2A VGS = 0V, f = 1MHz e 0.8 10 -80 -40 0 40 80 120 160 r 0.1 1 10 30 T TJ, JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V) re n Figure 11. Normalized Drain to Source Figure 12. Capacitance vs Drain to Source c Breakdown Voltage vs Junction Temperature Voltage h ® M 10 100 VDD = 15V O V) S VOLTAGE ( 8 ENT (A) 10 110m0uss FET RCE 6 URR 1 10ms U C THIS AREA IS V, GATE TO SOGS 24 WDEASVCEIIDDEF ==NO DR110AIMN.2SGA IONRDER: I, DRAIN D00.0.11 LIMITED BY rSTRTDJAIθSN J =(=AoG n M2=L)5 AE1oX C2P 5RUoCALS/TWEED 101D100Csmss 0 0.01 0.1 1 10 100 0 3 6 9 12 15 18 VDS, DRAIN to SOU RCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 13. Gate Charge Waveforms for Constant Figure 14. Forward Bias Safe Operating Area Gate Currents ©2008 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDS8878 Rev. C

F D Test Circuits and Waveforms S 8 8 7 VDS BVDSS 8 tP N L VDS -C IAS h VARY tP TO OBTAIN + VDD a REQUIRED PEAK IAS RG VDD nn VGS - e DUT l P tP o 0V IAS 0 w 0.01Ω e tAV r T r e n Figure 15. Unclamped Energy Test Circuit Figure 16. Unclamped Energy Waveforms c h ® M VDS VDD Qg(TOT) O VDS VGS S L F VGS = 10V E VGS +VDD Qgs2 Qg(5) VGS = 5V T - DUT VGS = 1V Ig(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveforms VDS tON tOFF td(ON) td(OFF) RL tr tf VDS 90% 90% + VGS VDD 10% 10% - 0 DUT 90% RGS VGS 50% 50% PULSE WIDTH VGS 0 10% Figure 19. Switching Time Test Circuit Figure 20. Switching Time Waveforms ©2008 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDS8878 Rev. C

F Thermal Resistance vs. Mounting Pad Area D S The maximum rated junction temperature, TJM, and the thermal impedance curve. 8 thermal resistance of the heat dissipating path determines 8 the maximum allowable device power dissipation, P , in an Thermal resistances corresponding to other copper areas 7 DM application. Therefore the application’s ambient can be obtained from Figure 21 or by calculation using 8 temperature, T (oC), and thermal resistance R (oC/W) Equation 2. The area, in square inches is the top copper N A θJA must be reviewed to ensure that T is never exceeded. area including the gate and source pads. - JM C Equation 1 mathematically represents the relationship and 26 h serves as the basis for establishing the rating of the part. RθJA = 64+0----.-2----3-----+-----A----r--e----a-- (EQ. 2) a (T –T ) n PDM = -------J-R--M---θ----J---A-----A------ (EQ. 1) The transient thermal impedance (ZθJA) is also effected by ne varied top copper board area. Figure 22 shows the effect of l In using surface mount devices such as the SO8 package, copper pad area on single pulse transient thermal imped- P the environment in which it is applied will have a significant ance. Each trace represents a copper pad area in square o w influence on the part’s current and maximum power inches corresponding to the descending list in the graph. dissipation ratings. Precise determination of P is complex Spice and SABER thermal models are provided for each of e DM r and influenced by many factors: the listed pad areas. T r 1. Mounting pad area onto which the device is attached and Copper pad area has no perceivable effect on transient e n whether there is copper on one side or both sides of the thermal impedance for pulse widths less than 100ms. For c board. pulse widths less than 100ms the transient thermal h impedance is determined by the die and package. ® 2. The number of copper layers and the thickness of the Therefore, CTHERM1 through CTHERM5 and RTHERM1 M board. through RTHERM5 remain constant for each of the thermal O models. A listing of the model component values is available 3. The use of external heat sinks. in Table 1. S F 4. The use of thermal vias. E 5. Air flow and board orientation. 200 T RθJA = 64 + 26/(0.23+Area) 6. For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in. W)150 C/ Fairchild provides thermal information to assist the design- o(A er’s preliminary application evaluation. Figure 21 defines the RJθ R for the device as a function of the top copper (compo- 100 θJA nent side) area. This is for a horizontally positioned FR-4 board with 1oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary in- 50 formation for calculation of the steady state junction temper- ature or power dissipation. Pulse applications can be 0.001 0.01 0.1 1 10 AREA, TOP COPPER AREA (in2) evaluated using the Fairchild device Spice thermal model or Figure 21. Thermal Resistance vs Mounting manually utilizing the normalized maximum transient Pad Area 150 COPPER BOARD AREA - DESCENDING ORDER 0.04 in2 120 0.28 in2 ALC/W) 00..5726 iinn22 , THERMAoDANCE ( 6900 1.00 in2 ZJθMPE I 30 0 10-1 100 101 102 103 t, RECTANGULAR PULSE DURATION (s) Figure 22. Thermal Impedance vs Mounting Pad Area ©2008 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com FDS8878 Rev. C

F PSPICE Electrical Model D S .SUBCKT FDS8878 2 1 3 8 *February 2005 8 7 Ca 12 8 7.8e-10 8 Cb 15 14 7.8e-10 LDRAIN N Cin 6 8 .78e-9 DPLCAP 5 DRAIN Dbody 7 5 DbodyMOD 10 2 -C Dbreak 5 11 DbreakMOD RSLC1 RLDRAIN h Dplcap 10 5 DplcapMOD 51 DBREAK a RSLC2 + n Ebreak 11 7 17 18 32.9 551 ESLC 11 n Eds 14 8 5 8 1 - e EEEEvvgsttgshe rm16e3 p1s 8062 0662 1688 111198 82 21 1 LGATE EVETSEGM+P-68 E+VT1H89RE-S 2R510DR1A6IN EBMRWEAEKAK+-1178 DBODY l Powe It 8 17 1 GATE RGATE + 18 - 6 r 1 9 20 22 MMED T Lgate 1 9 5.29e-9 RLGATE MSTRO r Ldrain 2 5 1.0e-9 LSOURCE e Lsource 3 7 0.18e-9 CIN 8 7 SOU3RCE nc RSOURCE h RLgate 1 9 52.9 RLSOURCE ® RRLLsdorauirnc e2 35 71 01.8 12S1A13 14S2A 15 17 RBREAK 18 M 8 13 O Mmed 16 6 8 8 MmedMOD S1B S2B RVTEMP S MMswteroa k1 61 66 281 8 8 M 8s MtrowMeOakDM OD CA 13++ CB+ 14 IT -19 FE Rbreak 17 18 RbreakMOD 1 EGS 68 EDS 58 + VBAT T Rdrain 50 16 RdrainMOD 1.6e-3 -- - 8 Rgate 9 20 2.3 22 RSLC1 5 51 RSLCMOD 1e-6 RVTHRES RSLC2 5 50 1e3 Rsource 8 7 RsourceMOD 8.9e-3 Rvthres 22 8 RvthresMOD 1 Rvtemp 18 19 RvtempMOD 1 S1a 6 12 13 8 S1AMOD S1b 13 12 13 8 S1BMOD S2a 6 15 14 13 S2AMOD S2b 13 15 14 13 S2BMOD Vbat 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*170),5))} .MODEL DbodyMOD D (IS=2.0E-12 IKF=10 N=1.01 RS=7.0e-3 TRS1=8e-4 TRS2=2e-7 + CJO=3.5e-10 M=0.55 TT=7e-11 XTI=2) .MODEL DbreakMOD D (RS=0.2 TRS1=1e-3 TRS2=-8.9e-6) .MODEL DplcapMOD D (CJO=3.8e-10 IS=1e-30 N=10 M=0.45) .MODEL MstroMOD NMOS (VTO=2.36 KP=150 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL MmedMOD NMOS (VTO=1.95 KP=5.0 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=2.3) .MODEL MweakMOD NMOS (VTO=1.57 KP=0.02 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=23 RS=0.1) .MODEL RbreakMOD RES (TC1=8.3e-4 TC2=-8e-7) .MODEL RdrainMOD RES (TC1=15e-3 TC2=0.1e-5) .MODEL RSLCMOD RES (TC1=1e-4 TC2=1e-6) .MODEL RsourceMOD RES (TC1=1e-3 TC2=3e-6) .MODEL RvtempMOD RES (TC1=-1.8e-3 TC2=2e-7) .MODEL RvthresMOD RES (TC1=-2.0e-3 TC2=-6e-6) MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4 VOFF=-3.5) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-4) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.5 VOFF=-1.0) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.0 VOFF=-1.5).ENDSNote: For further discussion of the PSPICE mod- el, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. ©2008 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com FDS8878 Rev. C

F SABER Electrical Model D S REV February 2005 8 template FDS8878 n2,n1,n3 8 electrical n2,n1,n3 7 { 8 var i iscl N dp..model dbodymod = (isl=2.0e-12,ikf=10,nl=1.01,rs=7.0e-3,trs1=8e-4,trs2=2e-7,cjo=3.5e-10,m=0.55,tt=7e-11,xti=2) - dp..model dbreakmod = (rs=0.2,trs1=1e-3,trs2=-8.9e-6) C dp..model dplcapmod = (cjo=3.8e-10,isl=10e-30,nl=10,m=0.45) h m..model mstrongmod = (type=_n,vto=2.36,kp=150,is=1e-30, tox=1) a m..model mmedmod = (type=_n,vto=1.95,kp=5.0,is=1e-30, tox=1) n m..model mweakmod = (type=_n,vto=1.57,kp=0.02,is=1e-30, tox=1,rs=0.1) LDRAIN n sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-4,voff=-3.5) DPLCAP 5 DRAIN e ssww__vvccsspp....mmooddeell ss21abmmoodd == ((rroonn==11ee--55,,rrooffff==00..11,,vvoonn==--31..55,,vvooffff==--14.)0) 10 RLDRAIN 2 l P sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=-1.0,voff=-1.5) RSLC1 o c.ca n12 n8 = 7.8e-10 RSLC2 51 w c.cb n15 n14 = 7.8e-10 ISCL e c.cin n6 n8 = .78e-9 r 50 DBREAK T - dp.dbody n7 n5 = model=dbodymod r ddpp..ddpblrceaapk nn150 n n151 == mmooddeell==ddpblrceaapkmmoodd ESG+68 EVTHRES RDR1A6IN 11 DBODY en LGATE EVTEMP + 189 - 21 MWEAK ch ssspppeee...eeebdgrsse nna11k43 n nn1881 nnn567 nnn881 7== n1118 = 32.9GA1TE RLGATE 9RGATE20+ 1282 - 6 MSTROMMED EBREA+K17 M® spe.esg n6 n10 n6 n8 = 1 18 LSOURCE O ssppee..eevvtthermeps nn260 n n261 nn1198 nn82 2= = 1 1 CIN 8 - 7 SOU3RCE S RSOURCE F RLSOURCE E i.it n8 n17 = 1 l.lgate n1 n9 = 5.29e-9 12S1A183 1143S2A 15 17 RBREAK 18 T l.ldrain n2 n5 = 1.0e-9 S1B S2B RVTEMP l.lsource n3 n7 = 0.18e-9 CA 13 CB 19 res.rlgate n1 n9 = 52.9 ++ + 14 IT - res.rldrain n2 n5 = 10 EGS 68 EDS 58 + VBAT res.rlsource n3 n7 = 1.8 -- - 8 22 m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u RVTHRES m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1=8.3e-4,tc2=-8e-7 res.rdrain n50 n16 = 1.6e-3, tc1=15e-3,tc2=0.1e-5 res.rgate n9 n20 = 2.3 res.rslc1 n5 n51 = 1e-6, tc1=1e-4,tc2=1e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 8.9e-3, tc1=1e-3,tc2=3e-6 res.rvthres n22 n8 = 1, tc1=-2.0e-3,tc2=-6e-6 res.rvtemp n18 n19 = 1, tc1=-1.8e-3,tc2=2e-7 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/170))** 5)) } } ©2008 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com FDS8878 Rev. C

F SPICE Thermal Model D th JUNCTION S REV February 2005 8 FDS8878T 8 Copper Area =1.0 in2 7 CTHERM1 TH 8 2.0e-3 8 CTHERM2 8 7 5.0e-3 RTHERM1 CTHERM1 N CTHERM3 7 6 1.0e-2 - CTHERM4 6 5 4.0e-2 C CTHERM5 5 4 9.0e-2 8 h CTHERM6 4 3 2e-1 a CTHERM7 3 2 1 n CTHERM8 2 TL 3 RTHERM2 CTHERM2 n e RTHERM1 TH 8 1e-1 l RTHERM2 8 7 5e-1 7 P RTHERM3 7 6 1 o RTHERM4 6 5 5 RTHERM3 CTHERM3 w RTHERM5 5 4 8 e RTHERM6 4 3 12 r RTHERM7 3 2 18 6 T RTHERM8 2 TL 25 r e n SABER Thermal Model RTHERM4 CTHERM4 c Copper Area = 1.0 in2 h 5 ® template thermal_model th tl thermal_c th, tl M { O RTHERM5 CTHERM5 ctherm.ctherm1 th 8 =2.0e-3 S ctherm.ctherm2 8 7 =5.0e-3 F ctherm.ctherm3 7 6 =1.0e-2 4 E ctherm.ctherm4 6 5 =4.0e-2 ctherm.ctherm5 5 4 =9.0e-2 T ctherm.ctherm6 4 3 =2e-1 RTHERM6 CTHERM6 ctherm.ctherm7 3 2 1 ctherm.ctherm8 2 tl 3 3 rtherm.rtherm1 th 8 =1e-1 rtherm.rtherm2 8 7 =5e-1 rtherm.rtherm3 7 6 =1 RTHERM7 CTHERM7 rtherm.rtherm4 6 5 =5 rtherm.rtherm5 5 4 =8 2 rtherm.rtherm6 4 3 =12 rtherm.rtherm7 3 2 =18 rtherm.rtherm8 2 tl =25 RTHERM8 CTHERM8 } tl CASE TABLE 1. THERMAL MODELS COMPONANT 0.04 in2 0.28 in2 0.52 in2 0.76 in2 1.0 in2 CTHERM6 1.2e-1 1.5e-1 2.0e-1 2.0e-1 2.0e-1 CTHERM7 0.5 1.0 1.0 1.0 1.0 CTHERM8 1.3 2.8 3.0 3.0 3.0 RTHERM6 26 20 15 13 12 RTHERM7 39 24 21 19 18 RTHERM8 55 38.7 31.3 29.7 25 ©2008 Fairchild Semiconductor Corporation 11 www.fairchildsemi.com FDS8878 Rev. C

F D S 8 8 7 8 N - TRADEMARKS C The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not h intended to be an exhaustive list of all such trademarks. a Build it Now™ FRFET® Programmable Active Droop™ n CorePLUS™ Global Power ResourceSM QFET® n CorePOWER™ Green FPS™ QS™ tm e CCCTRurLOr™eSnSt VTOraLnTs™fer Logic™ GGInrTteeOelli™nM FAPXS™™ e-Series™ QRaupieidt CSeorniefigs™ure™ TTTiiinnnyyyBBLoougociksc™t®™ l Po EcoSPARK® ISOPLANAR™ ™ TTIinNyYPOoPwTeOr™™ w EfficentMax™ MegaBuck™ Saving our world, 1mW /W /kW at a time™ TinyPWM™ e E Z S W I™TCH™ * MMiIcCrRoFOECTO™UPLER™ SSMmaArRtMT aSxT™ART™ TinyWire™ rT MicroPak™ SPM® µSerDes™ r ® MillerDrive™ STEALTH™ e MotionMax™ SuperFET™ n Fairctmhild® Motion-SPM™ SuperSOT™-3 UHC® c Fairchild Semiconductor® OPTOLOGIC® SuperSOT™-6 Ultra FRFET™ h FACT Quiet Series™ OPTOPLANAR® SuperSOT™-8 UniFET™ ® FACT® ® SupreMOS™ VCX™ M FAST® SyncFET™ VisualMax™ FastvCore™ tm ® XS™ O FlashWriter® * PDP SPM™ S FF-PPSF™S™ PPPooowwweeerrrTX-SrSeP™nMc™h® The Power Franchise® FE T * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are 2. A critical component in any component of a life support, device, or intended for surgical implant into the body or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause and (c) whose failure to perform when properly used in accordance with the failure of the life support device or system, or to affect its safety or instructions for use provided in the labeling, can be reasonably effectiveness. expected to result in a significant injury of the user. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Farichild’s Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Farichild strongly encourages customers to purchase Farichild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Farichild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Farichild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Preliminary First Production Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Dmaatkaes hceheatn cgoenst aaitn asn fyin taiml sep wecitihfiocautti onnosti.c Fe atoir cimhilpdr oSveem thiceo nddeuscigtonr. reserves the right to Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I37 ©2008 Fairchild Semiconductor Corporation 12 www.fairchildsemi.com FDS8878 Rev. C

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative © Semiconductor Components Industries, LLC www.onsemi.com www.onsemi.com 1

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: FDS8878