Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

F D P 5 N December 2013 5 0 N FDP5N50NZ / FDPF5N50NZ Z / TM F N-Channel UniFET II MOSFET D 500 V, 4.5 A, 1.5 Ω P F 5 N Features Description 5 0 • R = 1.38 Ω (Typ.) @ V = 10 V, I = 2.25 A UniFETTM II MOSFET is Fairchild Semiconductor’s high voltage N DS(on) GS D • Low Gate Charge (Typ. 9 nC) MOSFET family based on advanced planar stripe and DMOS Z technology. This advanced MOSFET family has the smallest — • Low C (Typ. 4 pF) RSS on-state resistance among the planar MOSFET, and also pro- N • 100% Avalanche Tested vides superior switching performance and higher avalanche - • Improved dv/dt Capability energy strength. In addition, internal gate-source ESD diode C h allows UniFET II MOSFET to withstand over 2kV HBM surge • ESD Improved Capability a stress. This device family is suitable for switching power con- n • RoHS Compliant verter applications such as power factor correction (PFC), flat n e panel display (FPD) TV power, ATX and electronic lamp bal- l Applications lasts. U n • LCD/ LED TV iF E • Lighting T • Uninterruptible Power Supply T M • AC-DC Power Supply I I M O D S F E T G G D G S TO-220 DS TO-220F S MOSFET Maximum Ratings TC = 25oC unless otherwise noted. Symbol Parameter FDP5N50NZ FDPF5N50NZ Unit V Drain to Source Voltage 500 V DSS V Gate to Source Voltage ±25 V GSS I Drain Current - Continuous (TC = 25oC) 4.5 4.5* A D - Continuous (TC = 100oC) 2.7 2.7* I Drain Current - Pulsed (Note 1) 18 18* A DM E Single Pulsed Avalanche Energy (Note 2) 160 mJ AS I Avalanche Current (Note 1) 4.5 A AR E Repetitive Avalanche Energy (Note 1) 7.8 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) 10 V/ns (T = 25oC) 78 30 W P Power Dissipation C D - Derate above 25oC 0.62 0.24 W/oC T , T Operating and Storage Temperature Range -55 to +150 oC J STG Maximum Lead Temperature for Soldering , T 300 oC L 1/8” from Case for 5 Seconds. *Drain current limited by maximum junction temperature Thermal Characteristics Symbol Parameter FDP5N50NZ FDPF5N50NZ Unit RθJC Thermal Resistance, Junction to Case, Max. 1.6 4.1 oC/W RθJA Thermal Resistance, Junction to Ambient, Max. 62.5 62.5 ©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com 1 FDP5N50NZ / FDPF5N50NZ Rev. C1

F D Package Marking and Ordering Information P 5 N Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity 5 FDP5N50NZ FDP5N50NZ TO-220 Tube N/A N/A 50 units 0 N FDPF5N50NZ FDPF5N50NZ TO-220F Tube N/A N/A 50 units Z / Electrical Characteristics TC = 25oC unless otherwise noted. FD P Symbol Parameter Test Conditions Min. Typ. Max. Unit F 5 Off Characteristics N 5 BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V, TC = 25oC 500 - - V 0 BV Breakdown Voltage Temperature N / ∆TDJSS Coefficient ID = 250 µA, Referenced to 25oC - 0.5 - o Z — IDSS Zero Gate Voltage Drain Current VVDDSS == 450000 VV,, VVGGSS == 00 VV,TC = 125oC -- -- 110 A N - IGSS Gate to Body Leakage Current VGS = ±25 V, VDS = 0 V - - ±10 A C h a On Characteristics n n VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 µA 3.0 - 5.0 V e RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 2.25 A - 1.38 1.5  l U gFS Forward Transconductance VDS = 20 V, ID = 2.25 A - 3.54 - S n i F Dynamic Characteristics E T C Input Capacitance - 330 440 pF T Ciossss Output Capacitance Vf =D S1 =M 2H5z V, VGS = 0 V - 50 70 pF IIM Crss Reverse Transfer Capacitance - 4 8 pF M Qg(tot) Total Gate Charge at 10V - 9 12 nC O QQgs GGaattee ttoo DSorauirnc e“M Gilaleter” CChhaarrggee VVGDSS == 41000 V V I D = 4.5 A -- 24 -- nnCC SFE gd (Note 4) T Switching Characteristics t Turn-On Delay Time - 12 35 ns d(on) tr Turn-On Rise Time VDD = 250 V, ID = 4.5 A - 22 55 ns t Turn-Off Delay Time VGS = 10 V, RGEN = 25 Ω - 28 65 ns d(off) tf Turn-Off Fall Time (Note 4) - 21 50 ns Drain-Source Diode Characteristics I Maximum Continuous Drain to Source Diode Forward Current - - 4.5 A S I Maximum Pulsed Drain to Source Diode Forward Current - - 18 A SM VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 4.5 A - - 1.4 V trr Reverse Recovery Time VGS = 0 V, ISD = 4.5 A - 210 - ns Qrr Reverse Recovery Charge dIF/dt = 100 A/µs - 1.1 - C Notes: 1: Repetitive rating: pulse-width limited by maximum junction temperature. 2: L = 15.8 mH, IAS = 4.5 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C. 3: ISD ≤ 2.8 A, di/dt ≤ 200 A/µs , VDD ≤ BVDSS, starting TJ = 25°C. 4: Essentially independent of operating temperature typical characteristics. ©2010 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D Typical Performance Characteristics P 5 N 5 0 Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics N Z 10 20 VGS = 15.0 V *Notes: / 10.0 V 10 1. VDS = 20V FD 8.0 V 2. 250s Pulse Test P 7.0 V F nt[A] 665...505 VVV nt[A] 150oC 5N e e 5 Curr 1 Curr 25oC 0N n n 1 Z ai ai Dr Dr — , D , D I I N *Notes: -55oC - C 1. 250s Pulse Test h 2. TC = 25oC a 0.1 0.1 n 0.1 1 10 20 2 4 6 8 n VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage[V] el U Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage n i Drain Current and Gate Voltage Variation vs. Source Current F E and Temperature T T 4 20 M I I M ce A] 10 O stan3 ent [ SF ,[]N)On-Resi ain Curr 150oC ET RDS(OSource 2 VGS = 10V erse Dr 25oC n- VGS = 20V ev Drai , RS *Notes: I 1. V = 0V GS 1 *Notes: TC = 25oC 1 2. 250s Pulse Test 0 2 4 6 8 10 0.4 0.6 0.8 1.0 1.2 1.4 ID, Drain Current [A] VSD, Body Diode Forward Voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 600 10 Ciss = Cgs + Cgd (Cds = shorted) 500 CCoissss CCorssss == CCgdds + Cgd age [V] 8 VVVDDDSSS === 124050000VVV s [pF] 400 ce Volt 6 ce 300 ur n *Notes: o a S pacit 200 21.. fV =G S1 M= H0Vz Gate- 4 Ca Crss , GS V 2 100 *Notes: ID = 4.5A 0 0 0.1 1 10 30 0 2 4 6 8 10 VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC] ©2010 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D Typical Performance Characteristics (Continued) P 5 N 5 0 Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation N vs. Temperature vs. Temperature Z / 1.2 3.0 F D ge P olta nce2.5 F5 BV, [Normalized]DSSn-Source Breakdown V 011...901 R, [Normalized]DS(on)ain-Source On-Resista112...050 N50NZ — N-C ai *Notes: Dr0.5 *Notes: h Dr 1. VGS = 0V 1. VGS = 10V an 2. ID = 250A 2. ID = 2.25A n 0.8 0.0 e -100 -50 0 50 100 150 -100 -50 0 50 100 150 l TJ, Junction Temperature [oC] TJ, Junction Temperature [oC] U n i Figure 9. Maximum Safe Operating Area Figure 10. Maximum Safe Operating Area F E for FDP5N50NZ for FDPF5N50NZ T T 30 30 M I 10 100s 10 100us I M 1ms O A] 1ms A] nt [ 10ms nt [ 10ms SF e e E urr 1 DC urr 1 T C C DC n n ai ai r Operation in This Area r Operation in This Area D D , D is Limited by R DS(on) , D is Limited by R DS(on) I 0.1 I 0.1 *Notes: *Notes: 1. TC = 25oC 1. TC = 25oC 2. TJ = 150oC 2. TJ = 150oC 3. Single Pulse 3. Single Pulse 0.01 0.01 1 10 100 1000 1 10 100 1000 V , Drain-Source Voltage [V] V , Drain-Source Voltage [V] DS DS Figure 11. Maximum Drain Current vs. Case Temperature 5 4 A] nt [ 3 e urr C n ai 2 Dr , D I 1 0 25 50 75 100 125 150 TC, Case Temperature [oC] ©2010 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D Typical Performance Characteristics (Continued) P 5 N 5 0 Figure 12. Transient Thermal Response Curve for FDP5N50NZ N Z / F 1 D W] 0.5 P C/ F [se 0.2 5N n po 5 es 0.1 0 R P N mal 0.1 0.05 DM t Z her 1t2 — Z(t), TθJC S00i.n.00g21le pulse *N21o.. tDZesuJ:tCy( tF) a=c 1to.6r,o CD/=W t 1M/t2ax. N-C h 3. TJM - TC = PDM * ZJC(t) a 0.01 n 10-5 10-4 10-3 10-2 10-1 100 101 102 n e t1, Rectangular Pulse Duration [sec] l U n i F E T Figure 13. Transient Thermal Response Curve for FDPF5N50NZ T M I 5 I M O W] 0.5 S [nseC/ 1 0.2 FET o sp 0.1 Re PDM al 0.05 herm 0.1 0.02 t1t2 T Z(t), θJC S0in.0g1le pulse *N1o. tZesJ:C(t) = 4.1oC/W Max. 2. Duty Factor, D= t1/t2 3. TJM - TC = PDM * ZJC(t) 0.01 10-5 10-4 10-3 10-2 10-1 100 101 102 t1, Rectangular Pulse Duration [sec] ©2010 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D P 5 N 5 0 N Z / F D P F 5 N 5 0 N Z — N - C IG = const. h a n n e l U Figure 14. Gate Charge Test Circuit & Waveform n i F E T T M I I VVDDSS RRLL VVDDSS 9900%% MO S VVGGSS VVDDDD FE RR GG T 1100%% VV V1100GVVS DDUUTT GGSS tt tt tt dd((oonn)) rr dd((ooffff)) tt ff tt tt oonn ooffff Figure 15. Resistive Switching Test Circuit & Waveforms V GS Figure 16. Unclamped Inductive Switching Test Circuit & Waveforms ©2010 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D P 5 N 5 0 N Z / F DDUUTT ++ D P F 5 VVDDSS N 5 0 __ N Z — II SSDD N LLL - C h a n DDrriivveerr n e RRGG l SSaammee TTyyppee U aass DDUUTT VVDDDD n i F E VVGGSS ••ddvv//ddttccoonnttrroolllleedd bbyy RR T GG T ••II ccoonnttrroolllleedd bbyy ppuullssee ppeerriioodd M SSDD I I M O S F E T GGGaaattteee PPPuuulllssseee WWWiiidddttthhh VV DDD ===------------------------------------------------------------------------------ GGSS GGGaaattteee PPPuuulllssseee PPPeeerrriiioooddd 1100VV (( DDrriivveerr )) II ,, BBooddyy DDiiooddee FFoorrwwaarrdd CCuurrrreenntt FFMM II SSDD ddii//ddtt (( DDUUTT )) II RRMM BBooddyy DDiiooddee RReevveerrssee CCuurrrreenntt VV DDSS (( DDUUTT )) BBooddyy DDiiooddee RReeccoovveerryyddvv//ddtt VV VV SSDD DDDD BBooddyy DDiiooddee FFoorrwwaarrdd VVoollttaaggee DDrroopp Figure 17. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2010 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D Mechanical Dimensions P 5 N 5 0 N Z / F D P F 5 N 5 0 N Z — N - C h a n n e l U n i F E T T M I I M O S F E T Figure 18. TO-220, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif- ically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT220-003 ©2010 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

F D Mechanical Dimensions P 5 N 5 0 N Z / F D P F 5 N 5 0 N Z — N - C h a n n e l U n i F E T T M I I M O S F E T Figure 19. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif- ically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TF22S-003 ©2010 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

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Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Datasheet contains the design specifications for product development. Specifications Advance Information Formative / In Design may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Obsolete Not In Production Semiconductor. The datasheet is for reference information only. Rev. I66 ©2010 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com FDP5N50NZ / FDPF5N50NZ Rev. C1

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