Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

F D P 1 2 November 2013 N 5 0 FDP12N50 / FDPF12N50T / F TM D N-Channel UniFET MOSFET P 500 V, 11.5 A, 650 mΩ F 1 2 N Features Description 5 0 • R = 550 mΩ (Typ.) @ V = 10 V, I = 6 A UniFETTM MOSFET is Fairchild Semiconductor’s high voltage T DS(on) GS D MOSFET family based on planar stripe and DMOS technology. — • Low Gate Charge (Typ. 22 nC) This MOSFET is tailored to reduce on-state resistance, and to N • Low Crss (Typ. 11 pF) provide better switching performance and higher avalanche - • 100% Avalanche Tested energy strength. This device family is suitable for switching C h power converter applications such as power factor correction a • RoHS Compliant (PFC), flat panel display (FPD) TV power, ATX and electronic n Applications lamp ballasts. n e l U • LCD/LED/PDP TV n • Lighting iF E • Uninterruptible Power Supply T T D M M O S F E G T G D G S TO-220 DS TO-220F S MOSFET Maximum Ratings TC = 25oC unless otherwise noted. Symbol Parameter FDP12N50 FDPF12N50T Unit V Drain to Source Voltage 500 V DSS V Gate to Source Voltage ±30 V GSS - Continuous (T = 25oC) 11.5 11.5 * I Drain Current C A D - Continuous (T = 100oC) 6.9 6.9 * C I Drain Current - Pulsed (Note 1) 46 46 * A DM E Single Pulsed Avalanche Energy (Note 2) 456 mJ AS I Avalanche Current (Note 1) 11.5 A AR E Repetitive Avalanche Energy (Note 1) 16.7 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns (T = 25oC) 165 42 W P Power Dissipation C D - Derate Above 25oC 1.33 0.3 W/oC T , T Operating and Storage Temperature Range -55 to +150 oC J STG T Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds 300 oC L *Drain current limited by maximum junction temperature Thermal Characteristics Symbol Parameter FDP12N50 FDPF12N50T Unit RθJC Thermal Resistance, Junction to Case, Max. 0.75 3.0 oC/W RθJA Thermal Resistance, Junction to Ambient, Max. 62.5 62.5 ©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D Package Marking and Ordering Information P 1 Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity 2 N FDP12N50 FDP12N50 TO-220 Tube N/A N/A 50 units 5 0 FDPF12N50T FDPF12N50T TO-220F Tube N/A N/A 50 units / F Electrical Characteristics T = 25oC unless otherwise noted. D C P Symbol Parameter Test Conditions Min. Typ. Max. Unit F 1 2 Off Characteristics N BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V, TJ = 25oC 500 - - V 50 ΔBV Breakdown Voltage Temperature T DSS I = 250 μA, Referenced to 25oC - 0.5 - V/oC / ΔT Coefficient D — J I Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V - - 1 μA N DSS VDS = 400 V, TC = 125oC - - 10 -C I Gate to Body Leakage Current V = ±30 V, V = 0 V - - ±100 nA h GSS GS DS a n On Characteristics n e VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 μA 3.0 - 5.0 V l U R Static Drain to Source On Resistance V = 10 V, I = 6 A - 0.55 0.65 Ω DS(on) GS D n gFS Forward Transconductance VDS = 40 V, ID = 6 A - 11.5 - S iF E Dynamic Characteristics T T C Input Capacitance - 985 1315 pF M Ciss Output Capacitance VDS = 25 V, VGS = 0 V, - 140 190 pF M oss f = 1 MHz O C Reverse Transfer Capacitance - 11 17 pF rss S Qg Total Gate Charge at 10V VDS = 400 V, ID = 11.5 A, - 22 30 nC FE Qgs Gate to Source Gate Charge VGS = 10 V - 6 - nC T Q Gate to Drain “Miller” Charge (Note 4) - 9 - nC gd Switching Characteristics t Turn-On Delay Time - 24 60 ns d(on) tr Turn-On Rise Time VDD = 250 V, ID = 11.5 A, - 50 110 ns V = 10 V, R = 25 Ω t Turn-Off Delay Time GS G - 45 100 ns d(off) tf Turn-Off Fall Time (Note 4) - 30 70 ns Drain-Source Diode Characteristics I Maximum Continuous Drain to Source Diode Forward Current - - 11.5 A S I Maximum Pulsed Drain to Source Diode Forward Current - - 46 A SM V Drain to Source Diode Forward Voltage V = 0 V, I = 11.5 A - - 1.4 V SD GS SD trr Reverse Recovery Time VGS = 0 V, ISD = 11.5 A, - 375 - ns Qrr Reverse Recovery Charge dIF/dt = 100 A/μs - 3.5 - μC Notes: 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. L = 6.9 mH, IAS = 11.5 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C. 3. ISD ≤ 11.5 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C. 4. Essentially independent of operating temperature typical characteristics. ©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D Typical Performance Characteristics P 1 2 N 5 Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0 30 40 / VGS = 10.0 V *Notes: F 10 87..00 VV 12.. V25D0Sμ =s 2P0uVlse Test DP 6.5 V F 6.0 V 1 ent[A] 5.5 V ent[A]10 150oC 2N5 urr urr -55oC 0T C 1 C n n — Drai Drai 25oC N ,D ,D I I - C *Notes: h 0.1 1. 250μs Pulse Test a 0.050.1 1 2. TC = 25oC 10 20 15 6 7 8 nne l VDS,Drain-Source Voltage[V] VGS,Gate-Source Voltage[V] U n i Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage F E Drain Current and Gate Voltage Variation vs. Source Current T and Temperature T M 1.5 100 M O S []ΩR ,()DSonSource On-Resistance01..50 VGS = 10VVGS = 20V erse Drain Current [A] 10 150oC 25oC FET ain- Rev Dr , S *Notes: I 1. V = 0V 0.0 * Note : TJ = 25oC 1 2. 25G0Sμs Pulse Test 0 6 12 18 24 30 0.0 0.5 1.0 1.5 2.0 ID, Drain Current [A] VSD, Body Diode Forward Voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 2000 10 Coss CCCiorssssss = == C CCggdsds + + C Cggdd (Cds = shorted) e [V] 8 VVVDDDSSS === 124050000VVV 1500 g *Note: a s [pF] Ciss 12.. fV =G S1 M= H0Vz ce Volt 6 ce 1000 ur n o a S acit ate- 4 p G Ca 500 , S G V 2 Crss *Note: ID = 11.5A 0 0 0.1 1 10 30 0 4 8 12 16 20 24 VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC] ©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D Typical Performance Characteristics P (Continued) 1 2 N 5 Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation 0 vs. Temperature vs. Temperature / F 1.2 3.0 D P ge F BV, [Normalized]DSSDrain-Source Breakdown Volta 011...901 * N 1o. tVeGs:S = 0V R, [Normalized]DS(on)Drain-Source On-Resistance 01122.....50505 * N 1o. tVeGs:S = 10V 12N50T — N-Chann 0.8 2. ID = 250μA 0.0 2. ID = 6A el -100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200 U TJ, Junction Temperature [oC] TJ, Junction Temperature [oC] ni F E Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area T - FDP12N50 - FDPF12N50T T M 100 100 M O 20μs 20μs S F 100μs A] 10 A] 10 100μs E nt [ nt [ 1ms T e 1ms e ain Curr 1 Operation in This Area 1D0Cms ain Curr 1 Operation in This Area 10ms , DrD is Limited by R DS(on) , DrD is Limited by R DS(on) DC I I 0.1 *Notes: 0.1 * Notes : 1. TC = 25oC 1. TC = 25oC 2. TJ = 150oC 2. TJ = 150oC 3. Single Pulse 3. Single Pulse 0.01 0.01 1 10 100 800 1 10 100 1000 VDS, Drain-Sou rce Voltage [V] VDS, Drain-Sou rce Voltage [V] Figure 10. Maximum Drain Current vs. Case Temperature 14 12 A] 10 nt [ e 8 urr C n 6 ai Dr , D 4 I 2 0 25 50 75 100 125 150 TC, Case Temperature [oC] ©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D Typical Performance Characteristics (Continued) P 1 2 N 5 Figure 11-1. Transient Thermal Res ponse Curve - FDP12N50 0 / 3 F W] D onse [C/][ZθJC 1 0.5 PF12 esponse 0.1 0.2 N5 Z(t), Thermal RθJCThermal Respo 0.01 0S000...i.000n1152gle pulse * N P12o..D tZDeMθsuJ:tCy( tF) a=c t01to.t72r,5 DoC=/tW1/t 2Max. 0T — N-C 3. TJM - TC = PDM * ZθJC(t) h 1E-3 a 10-5 10-4 10-3 10-2 10-1 100 101 n n tR1, eRcetcatnagnugulalar rP Puullssee DDuurraattiioonn [[sseecc] ] el U n Figure 11-2. Transient Thermal Response Curve - FDPF12N50T i F E T T M M ooThermal Response [C/W] Thermal Response [C/W] ][al Response ZθJC 0.115 000000......000521521 PDM t1t2 OSFET Z(t), Z(t), θθJCThermJC Single pulse * N123o... ZDTteθJusJMtC y :-( tFT) aC=c =3to oPrC,D /DMW =* tM 1Z/aθt2JxC.(t) 0.01 10-4 10-3 10-2 10-1 100 101 102 103 tR1, eRcetcatnagnguulalar rP Puullssee DDuurraattiioonn [[sseecc] ] ©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D P 1 2 N 5 0 / F D P F 1 2 N 5 0 T — N - C h a IG = const. n n e l U n Figure 12. Gate Charge Test Circuit & Waveform iF E T T M M O VVDDSS RRLL VVDDSS 9900%% SFE T VVGGSS VVDDDD RR GG 1100%% VV V1100GVVS DDUUTT GGSS tt tt tt dd((oonn)) rr dd((ooffff)) tt ff tt tt oonn ooffff Figure 13. Resistive Switching Test Circuit & Waveforms V GS Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D P 1 2 N 5 0 / F D DDUUTT ++ P F 1 2 VV N DDSS 5 0 __ T — N II SSDD -C LLL h a n n DDrriivveerr e l RR U GG SSaammee TTyyppee n aass DDUUTT VVDDDD iF E T VV T GGSS ••ddvv//ddttccoonnttrroolllleedd bbyy RR M GG ••II ccoonnttrroolllleedd bbyy ppuullssee ppeerriioodd M SSDD O S F E T GGGaaattteee PPPuuulllssseee WWWiiidddttthhh VVGGSS DDD ===------GGG------aaa------ttt---eee------ PPP------uuu------lll---sss---eee------ ---PPP------eee------rrr---iiiooo------ddd--- 1100VV (( DDrriivveerr )) II ,, BBooddyy DDiiooddee FFoorrwwaarrdd CCuurrrreenntt FFMM II SSDD (( DDUUTT )) ddii//ddtt II RRMM BBooddyy DDiiooddee RReevveerrssee CCuurrrreenntt VV DDSS (( DDUUTT )) BBooddyy DDiiooddee RReeccoovveerryyddvv//ddtt VV VV SSDD DDDD BBooddyy DDiiooddee FFoorrwwaarrdd VVoollttaaggee DDrroopp Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2012 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D Mechanical Dimensions P 1 2 N 5 0 / F D P F 1 2 N 5 0 T — N - C h a n n e l U n i F E T T M M O S F E T Figure 16. TO-220, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif- ically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT220-003 ©2012 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

F D Mechanical Dimensions P 1 2 N 5 0 / F D P F 1 2 N 5 0 T — N - C h a n n e l U n i F E T T M M O S F E T Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif- ically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TF220-003 ©2012 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

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Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Datasheet contains the design specifications for product development. Specifications Advance Information Formative / In Design may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Obsolete Not In Production Semiconductor. The datasheet is for reference information only. Rev. I66 ©2012 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com FDP12N50 / FDPF12N50T Rev. C1

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