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F D M S 8 December 2014 3 3 FDMS8333L 3 L N ® N-Channel PowerTrench MOSFET - C 40 V, 76 A, 3.1 mΩ h a n Features General Description n e (cid:132) Max rDS(on) = 3.1 mΩ at VGS = 10 V, ID = 22 A This N-Channel MOSFET has been designed specifically to l P improve the overall efficiency and to minimize switch node (cid:132) Max r = 4.3 mΩ at V = 4.5 V, I = 19 A o DS(on) GS D ringing of DC/DC converters using either synchronous or w (cid:132) Advanced Package and Silicon combination for low rDS(on) conventional switching PWM controllers. It has been optimized e and high efficiency for low gate charge, low rDS(on), fast switching speed and body rT diode reverse recovery performance. r (cid:132) Next generation enhanced body diode technology, e n engineered for soft recovery Applications c h (cid:132) MSL1 robust package design ® (cid:132) OringFET / Load Switching (cid:132) 100% UIL tested M (cid:132) Synchronous rectification O (cid:132) RoHS Compliant S (cid:132) DC-DC Conversion F E T Top Bottom Pin 1 Pin 1 S S D S S G S D S D D D D G D D Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol Parameter Ratings Units V Drain to Source Voltage 40 V DS V Gate to Source Voltage ±20 V GS Drain Current -Continuous T = 25 °C 76 C I -Continuous T = 25 °C (Note 1a) 22 A D A -Pulsed (Note 4) 250 E Single Pulse Avalanche Energy (Note 3) 216 mJ AS Power Dissipation T = 25 °C 69 P C W D Power Dissipation T = 25 °C (Note 1a) 2.5 A T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 1.8 θJC °C/W R Thermal Resistance, Junction to Ambient (Note 1a) 50 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS8333L FDMS8333L Power 56 13 ’’ 12 mm 3000 units ©2013 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMS8333L Rev. C3

F D Electrical Characteristics TJ = 25 °C unless otherwise noted M S Symbol Parameter Test Conditions Min Typ Max Units 8 3 Off Characteristics 3 3 BV Drain to Source Breakdown Voltage I = 250 μA, V = 0 V 40 V L DSS D GS ΔBV Breakdown Voltage Temperature N ΔTDSS Coefficient ID = 250 μA, referenced to 25 °C 22 mV/°C -C J h I Zero Gate Voltage Drain Current V = 32 V, V = 0 V 1 μA DSS DS GS a I Gate to Source Leakage Current V = ±20 V, V = 0 V ±100 nA n GSS GS DS n e On Characteristics l P VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 1.8 3.0 V o w ΔV Gate to Source Threshold Voltage GS(th) I = 250 μA, referenced to 25 °C -6 mV/°C e ΔTJ Temperature Coefficient D r T VGS = 10 V, ID = 22 A 2.4 3.1 r e rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 19 A 3.3 4.3 mΩ n c VGS = 10 V, ID = 22 A, TJ = 125 °C 3.6 4.7 h g Forward Transconductance V = 5 V, I = 22 A 120 S ® FS DS D M Dynamic Characteristics O S C Input Capacitance 3245 4545 pF iss F V = 20 V, V = 0 V, C Output Capacitance DS GS 840 1175 pF E oss f = 1 MHz T C Reverse Transfer Capacitance 32 55 pF rss R Gate Resistance 0.1 0.7 2.1 Ω g Switching Characteristics t Turn-On Delay Time 14 25 ns d(on) tr Rise Time VDD = 20 V, ID = 22 A, 4.7 10 ns td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 Ω 33 53 ns t Fall Time 4.2 10 ns f Q Total Gate Charge V = 0 V to 10 V 46 64 nC g GS Qg Total Gate Charge VGS = 0 V to 4.5 V VDD = 20 V, 22 31 nC Qgs Gate to Source Charge ID = 22 A 8.8 nC Q Gate to Drain “Miller” Charge 5.5 nC gd Drain-Source Diode Characteristics V = 0 V, I = 1.9 A (Note 2) 0.7 1.2 V Source to Drain Diode Forward Voltage GS S V SD V = 0 V, I = 22 A (Note 2) 0.8 1.3 GS S t Reverse Recovery Time 38 61 ns rr I = 22 A, di/dt = 100 A/μs Q Reverse Recovery Charge F 20 32 nC rr Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a.510 in °2C p/aWd wofh e2n o mz ocuonptpeedr o n a b.1m2in5i m°Cu/mW pwahde no fm 2o ouzn tceodp opne ra. GDDSS GDDSS FSFS FSFS 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 216 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 12 A, VDD = 40 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 38 A. 4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details. ©2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMS8333L Rev. C3

F D M Typical Characteristics T = 25 °C unless otherwise noted J S 8 3 250 5 3 3 CE V = 3 V L URRENT (A) 125000 VGS =V G 4S V V= G4S.5 = V V10G SV = 3.5 V ALIZEDE ON-RESISTAN 34 GS VGS = 3.5V VGS = 4 V N-Chann I, DRAIN CD150000 PDUULTSYE CV DYGUCS RL=EA 3 T =VI O0.N5 %= 8M0A μXs NORMDRAIN TO SOURC 012 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs VVGGSS == 140.5 V V el PowerT 0 1 2 3 4 5 0 50 100 150 200 250 re VDS, DRAIN TO SO URCE VOLTAGE (V) ID, DRAIN CURR ENT (A) nc h ® Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance M vs Drain Current and Gate Voltage O S F 1.8 15 E ALIZEDE ON-RESISTANCE 111...246 VIDG =S 2=2 1 A0 V DRAIN TO ()mESISTANCE Ω129 PDUULTSYE C DYUCRLEA T=I O0.N5I D%= = 8M 20A2 μX As T NORM N TO SOURC 01..80 r,DS(on)OURCE ON-R 36 TJ = 125 oC RAI S TJ = 25 oC D 0.6 0 -75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10 TJ, JUNCTION TEM PERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 250 300 PULSE DURATION = 80 μs A) 100 VGS = 0 V DUTY CYCLE = 0.5% MAX T ( 200 N E T (A) VDS = 5 V URR 10 RREN150 AIN C 1 TJ = 150 oC DRAIN CU100 TJ = 150 oC TJ = 25 oC VERSE DR 0.1 TJ = 25 oC I, D 50 TJ = -55 oC I, RES0.01 TJ = -55 oC 0 0.001 1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOU RCE VOLTAGE (V) VSD, BODY DIODE FOR WARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2013 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMS8333L Rev. C3

F D Typical Characteristics M T = 25 °C unless otherwise noted J S 8 3 10 5000 3 E (V) ID = 22 A Ciss 3L G 8 N A TO SOURCE VOLT 46 VDD V=D 1D5 = V 25 VVDD = 20 V APACITANCE (pF)1010000 Coss -Channel P E C o AT 2 w V, GGS 0 10 fV =G S1 =M 0H Vz Crss erT 0 10 20 30 40 50 0.1 1 10 40 re Qg, GATE CH ARGE (nC) VDS, DRAIN TO SOU RCE VOLTAGE (V) n c h ® Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain M to Source Voltage O S F 100 140 E RθJC = 1.8 oC/W T ENT (A) TJ = 25 oC NT (A) 112 R E R R 84 CU UR VGS = 10 V E 10 C H N VALANC TJ = 125 oC TJ = 100 oC , IDRAID 2586 Limited by Package VGS = 4.5 V A , S A I 1 0 0.01 0.01 0.1 1 10 100 500 25 50 75 100 125 150 tAV, TIME IN AVA LANCHE (ms) TC, CASE TEMPERATURE (oC) Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain Switching Capability Current vs Case Temperature 1000 10000 W) SINGLE PULSE R ( RθJC = 1.8 oC/W T (A) 100 10 us OWE TC = 25 oC N P RE NT 1000 R THIS AREA IS E N CU 10 LIMITED BY rDS(on) 100 us ANSI AI R DR SINGLE PULSE 1 ms K T I, D 0.11 TTRJCθ J ==C M2=5 A1 oX.C8 R oCA/TWED CMUERAVSEU RBEE NDTA TTAO 1D0C ms , PPEA()PK 15000 0.1 1 10 100 200 10-5 10-4 10-3 10-2 10-1 1 VDS, DRAIN to SOU RCE VOLTAGE (V) t, PULSE WI DTH (sec) Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum Operating Area Power Dissipation ©2013 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMS8333L Rev. C3

F D Typical Characteristics M T = 25 °C unless otherwise noted J S 8 3 2 3 E 1 DUTY CYCLE-DESCENDING ORDER 3L C FFECTIVERESISTAN 0.1 D = 0000....21055 PDM N-Cha ZED ERMAL 00..0021 t1 nne ALIHE t2 l r(t), NORMRANSIENT T 0.01 SINGLE PULSE ZNRDPθθOeuJJaCtTCyk(E t =C)TS =1yJ: .c=r8l( etPo),C DxDM/ W R =xθ tJZ1C θ/J tC2(t) + TC PowerT T r 0.001 e 10-5 10-4 10-3 10-2 10-1 1 n c t, RECTANGULAR PULSE DURATION (s) h ® Figure 13. Transient Thermal Response Curve M O S F E T ©2013 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMS8333L Rev. C3

PQFN85X6,1.27P CASE483AE ISSUEA 5.10 A 5.10 3.91 PKG SEE CL B DETAILB 1.27 8 5 8 7 6 5 0.77 4.52 3.75 PKGCL 6.15 5.85 6.61 5.65 KEEPOUT AREA 1.27 1 4 1 2 3 4 TOPVIEW 1.27 0.61 3.81 LANDPATTERN OPTIONALDRAFT RECOMMENDATION ANGLEMAYAPPEAR SEE ONFOURSIDES 5.00 4.80 DETAILC OFTHEPACKAGE 0.35 0.15 (cid:19)(cid:131)(cid:16)(cid:20)(cid:21)(cid:131) 0.10 C 0.30 0.05 0.05 SIDEVIEW 0.00 (cid:19)(cid:131)(cid:16)(cid:20)(cid:21)(cid:131) 8X 0.08 C 0.35 C 5.20 0.15 4.80 1.10 SEATING 0.90 PLANE DETAILC DETAILB 3.81 SCALE:2:1 SCALE:2:1 1.27 0.51 (8X) 0.31 (0.34) NOTES:UNLESSOTHERWISESPECIFIED 0.10 C A B A.PACKAGESTANDARDREFERENCE:JEDECMO-240, 1 2 3 4 ISSUEA,VAR.AA,. B.DIMENSIONSDONOTINCLUDEBURRSORMOLDFLASH. 0.76 MOLDFLASHORBURRSDOESNOTEXCEED0.10MM. 0.51 (0.52) C.ALLDIMENSIONSAREINMILLIMETERS. 6.25 D.DIMENSIONINGANDTOLERANCINGPERASMEY14.5M-2009. 5.90 E.ITISRECOMMENDEDTOHAVENOTRACESOR VIASWITHINTHEKEEPOUTAREA. (0.50) 3.48+0.30 -0.10 (0.30) (2X) 8 7 6 5 +0.10 (cid:19)(cid:17)(cid:23)(cid:23)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 0.20 (8X) 3.96 -0.15 3.61 BOTTOMVIEW

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