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  • 型号: FDMS6681Z
  • 制造商: Fairchild Semiconductor
  • 库位|库存: xxxx|xxxx
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FDMS6681Z产品简介:

ICGOO电子元器件商城为您提供FDMS6681Z由Fairchild Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 FDMS6681Z价格参考。Fairchild SemiconductorFDMS6681Z封装/规格:晶体管 - FET,MOSFET - 单, P-Channel 30V 21.1A (Ta), 49A (Tc) 2.5W (Ta), 73W (Tc) Surface Mount 8-PQFN (5x6)。您可以下载FDMS6681Z参考资料、Datasheet数据手册功能说明书,资料中有FDMS6681Z 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

分立半导体产品

ChannelMode

Enhancement

描述

MOSFET P-CH 30V 21.1A POWER56MOSFET -30V P-Channel PowerTrench

产品分类

FET - 单分离式半导体

FET功能

逻辑电平门

FET类型

MOSFET P 通道,金属氧化物

Id-ContinuousDrainCurrent

21.1 A

Id-连续漏极电流

21.1 A

品牌

Fairchild Semiconductor

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

晶体管,MOSFET,Fairchild Semiconductor FDMS6681ZPowerTrench®

数据手册

点击此处下载产品Datasheet

产品型号

FDMS6681Z

PCN设计/规格

点击此处下载产品Datasheet

Pd-PowerDissipation

2.5 W

Pd-功率耗散

2.5 W

RdsOn-Drain-SourceResistance

3.2 mOhms

RdsOn-漏源导通电阻

3.2 mOhms

Vds-Drain-SourceBreakdownVoltage

- 30 V

Vds-漏源极击穿电压

- 30 V

Vgs-Gate-SourceBreakdownVoltage

+/- 25 V

Vgs-栅源极击穿电压

25 V

上升时间

38 ns

下降时间

197 ns

不同Id时的Vgs(th)(最大值)

3V @ 250µA

不同Vds时的输入电容(Ciss)

10380pF @ 15V

不同Vgs时的栅极电荷(Qg)

241nC @ 10V

不同 Id、Vgs时的 RdsOn(最大值)

3.2 毫欧 @ 22.1A,10V

产品培训模块

http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=356

产品目录页面

点击此处下载产品Datasheet

产品种类

MOSFET

供应商器件封装

Power56

其它名称

FDMS6681ZCT

典型关闭延迟时间

260 ns

功率-最大值

2.5W

包装

剪切带 (CT)

单位重量

90 mg

商标

Fairchild Semiconductor

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

8-PQFN,Power56

封装/箱体

Power 56-8

工厂包装数量

3000

晶体管极性

P-Channel

最大工作温度

+ 150 C

最小工作温度

- 55 C

标准包装

1

漏源极电压(Vdss)

30V

特色产品

http://www.digikey.cn/product-highlights/cn/zh/fairchild-cloud-systems-computing/4301

电流-连续漏极(Id)(25°C时)

21.1A (Ta), 49A (Tc)

系列

FDMS6681Z

通道模式

Enhancement

配置

Single Quad Drain Triple Source

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PDF Datasheet 数据手册内容提取

Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

F D M S 6 6 June 2015 8 FDMS6681Z 1 Z P ® P-Channel PowerTrench MOSFET - C h -30 V, -122 A, 3.2 mΩ a n Features General Description n e l (cid:132) Max rDS(on) = 3.2 mΩ at VGS = -10 V, ID = -21.1 A The FDMS6681Z has been designed to minimize losses in load P o switch applications. Advancements in both silicon and package (cid:132) Max r = 5.0 mΩ at V = -4.5 V, I = -15.7 A w DS(on) GS D technologies have been combined to offer the lowest rDS(on) and e (cid:132) Advanced Package and Silicon combination ESD protection. r T for low rDS(on) re Applications n (cid:132) HBM ESD Protection Level of 8kV Typical(Note 3) c h (cid:132) MSL1 Robust Package Design (cid:132) Load Switch in Notebook and Server ® (cid:132) RoHS Compliant (cid:132) Notebook Battery Pack Power Management M O S F E T Top Bottom Pin 1 S D 5 4 G S S G D 6 3 S D 7 2 S D D D D 8 1 S D Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Symbol Parameter Ratings Units V Drain to Source Voltage -30 V DS V Gate to Source Voltage ±25 V GS Drain Current -Continuous T = 25 °C (Note5) -122 C -Continuous T = 100 °C (Note5) -77 I C A D -Continuous T = 25 °C (Note 1a) -21.1 A -Pulsed (Note4) -600 Power Dissipation T = 25 °C 73 P C W D Power Dissipation T = 25 °C (Note 1a) 2.5 A T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 1.7 θJC °C/W R Thermal Resistance, Junction to Ambient (Note 1a) 50 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS6681Z FDMS6681Z Power 56 13 ’’ 12 mm 3000 units ©2009 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMS6681Z Rev.1.4

F D Electrical Characteristics T = 25 °C unless otherwise noted. M J S Symbol Parameter Test Conditions Min. Typ. Max. Units 6 6 Off Characteristics 8 1 Z BV Drain to Source Breakdown Voltage I = -250 μA, V = 0 V -30 V DSS D GS P ΔBV Breakdown Voltage Temperature ΔTDSS Coefficient ID = -250 μA, referenced to 25 °C 20 mV/°C -C J h IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 μA a n I Gate to Source Leakage Current V = ±25 V, V = 0 V ±10 μA GSS GS DS n e On Characteristics l P V Gate to Source Threshold Voltage V = V , I = -250 μA -1 -1.7 -3 V o GS(th) GS DS D w ΔVGS(th) Gate to Source Threshold Voltage I = -250 μA, referenced to 25 °C -7 mV/°C e ΔT Temperature Coefficient D r J T V = -10 V, I = -22.1 A 2.7 3.2 r GS D e r Static Drain to Source On Resistance V = -4.5 V, I = -15.7 A 4.0 5.0 mΩ n DS(on) GS D c VGS = -10 V, ID = -22.1 A, TJ = 125 °C 3.9 5.0 h ® g Forward Transconductance V = -10 V, I = -22.1 A 143 S FS DD D M Dynamic Characteristics O S C Input Capacitance 7803 10380 pF F iss V = -15 V, V = 0 V, E Coss Output Capacitance f =D S1 MHz GS 1540 2050 pF T C Reverse Transfer Capacitance 1345 2020 pF rss Switching Characteristics t Turn-On Delay Time 15 24 ns d(on) tr Rise Time VDD = -15 V, ID = -22.1 A, 38 61 ns td(off) Turn-Off Delay Time VGS = -10 V, RGEN = 6 Ω 260 416 ns t Fall Time 197 316 ns f Q Total Gate Charge V = 0 V to -10 V 172 241 nC g GS Qg Total Gate Charge VGS = 0 V to -5 V VDD = -15 V, 97 136 nC Qgs Gate to Source Charge ID = -22.1 A 22 nC Q Gate to Drain “Miller” Charge 46 nC gd Drain-Source Diode Characteristics V = 0 V, I = -2.1 A (Note 2) 0.68 1.2 V V Source to Drain Diode Forward Voltage GS S SD V = 0 V, I = -22.1 A (Note 2) 0.79 1.25 V GS S t Reverse Recovery Time 44 71 ns rr I = -22.1 A, di/dt = 100 A/μs Q Reverse Recovery Charge F 39 63 nC rr NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50 °C/W when mounted on b. 125 °C/W when mounted on a a 1 in2 pad of 2 oz copper. minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4. Pulsed Id please refer to Fig 12 SOA graph for more details. 5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal electro-mechanical application board design. ©2009 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMS6681Z Rev.1.4

F D M Typical Characteristics TJ = 25 °C unless otherwise noted. S 6 6 90 5 8 1 RENT (A) 6705 VVGGSS == --44. V5VG VS = -3.5 V DRESISTANCE 4 VGS = -3 V PDUULTVSYGE CS D Y=UC -RL3E.A5 T =VI O0.N5 %= M80A Xμs Z P-Ch , -IDRAIN CURD 134505 PDUULTSYE VC GDYSUC =RL EA-1 T0=IV O0.N5 %= 8M0A μXs VGS = -3 V NORMALIZERAIN TO SOURCE ON- 123 VGS = -4.5 V VGVSG =S = -1 -04 VV annel Power 0 D 0 T 0 1 2 3 0 15 30 45 60 75 90 re -V , DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURR ENT (A) n DS c h Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance ® vs Drain Current and Gate Voltage M O 1.6 12 S F ANCE 1.4 VIDG =S -=2 2-1.10 AV )mΩ PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs ET ST (E 9 ALIZEDE ON-RESI 1.2 DRAIN TO ESISTANC 6 ID = -22.1 A NORM AIN TO SOURC 01..80 r,DS(on)SOURCE ON-R 3 TTJJ == 12255 o oCC R D 0.6 0 -75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10 TJ, JUNCTION TEM PERATURE (oC) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 90 100 NT (A) 6705 PDVUUDLTSS Y=E C- 5DY VUCRLEA T=I O0.N5 %= 8M0A μXs URRENT (A) 10 VTGJ S= = 1 05 0V oC AIN CURRE 45 TJ = 150 oC SE DRAIN C 0.11 TJ = 25 oC R 30 R -I, DD 15 TJ = 25 oC TJ = -55 oC -I, REVES 0.01 TJ = -55 oC 0 0.001 0 1 2 3 4 0 0.2 0.4 0.6 0.8 1.0 1.2 -VGS, GATE TO S OURCE VOLTAGE (V) -VSD, BODY DIODE FO RWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2009 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMS6681Z Rev.1.4

F D Typical Characteristics M T = 25 °C unless otherwise noted. J S 6 6 10 20000 8 V) ID = -22.1 A 1 E ( Z AG 8 10000 P RCE VOLT 6 VDD = -10 V VDD = -15 V NCE (pF) Ciss -Chan SOU 4 CITA ne ATE TO 2 VDD = -20 V CAPA f = 1 MHz Coss l Po , GS 1000 VGS = 0 V Crss we -VG 0 600 rT 0 50 100 150 200 0.1 1 10 30 r e Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOU RCE VOLTAGE (V) n c Figure 7. Gate Charge Characteristics h Figure 8. Capacitance vs Drain ® to Source Voltage M O S 100 140 F E A) 50 120 T E CURRENT ( TJ = 25 oC TJ = 100 oC CURRENT (A) 18000 VGS = -10 V ANCH RAIN 60 VGS = -4.5 V VAL TJ = 125 oC , DD 40 A -I , S 20 -IA RθJC = 1.7 oC/W 1 0 0.001 0.01 0.1 1 10 100 25 50 75 100 125 150 tAV, TIME IN AVA LANCHE (ms) T , CASE TEMPERATURE (oC) C Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain Switching Capability Current vs. Case Temperature 10-4 1000 A) VGS = 0 V 10 us CURRENT ( 1100--65 TJ = 150 oC RENT (A) 100 100 us E R AG CU 10 THIS AREA IS 1 ms , IGATE LEAKg 111000---987 TJ = 25 oC -I, DRAIN D 0.11 CMLIUEMRAITVSEEUD RB EBE YND TAr DTTSAO(o n) RTSTJCIθN J ==CG M2=L5 AE1 oX .PC7 R UoCALS/TWEED 1D0C ms 0 5 10 15 20 25 30 0.1 1 10 80 VGS, GATE TO SOURCE VOLTAGE (V) -VDS, DRAIN to SOU RCE VOLTAGE (V) Figure 11. I vs V Figure 12. Forward Bias Safe gss gss Operating Area ©2009 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMS6681Z Rev.1.4

F D Typical Characteristics M T = 25 °C unless otherwise noted. J S 6 100000 6 8 W) SINGLE PULSE 1Z WER ( 10000 RTθJ =C 2=5 1 o.7C oC/W P- O C C P h NT a E 1000 n NSI n A e R l K T P A 100 o PE w , K) e P(P rT 10 r 10-5 10-4 10-3 10-2 10-1 1 e n t, PULSE WIDTH ( s) c h Figure 13. Single Pulse Maximum Power Dissipation ® M 2 O 1 DUTY CYCLE-DESCENDING ORDER S CE F FFECTIVERESISTAN 0.1 D = 0000....21055 PDM ET D EAL 0.02 ZERM 0.01 t1 ALIHE t2 MT RT 0.01 NOTES: ON r(t), NANSIE SINGLE PULSE ZRPθθeJJaCCk( t =)T =1J .=r7( tPo)C DxM/ WR xθ JZCθJC(t) + TC TR Duty Cycle, D = t1 / t2 0.001 10-5 10-4 10-3 10-2 10-1 1 t, RECTANGULAR PULSE DURATION (s) Figure 14. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMS6681Z Rev.1.4

F D Dimensional Outline and Pad Layout M S 6 6 8 1 Z P - C 54..2800 A 53..9101 h 8 PKCLG 5 B SDEEETAIL B 8 7 60.645 1.27 ann 0.77 e l 4.52 P PKGCL 65..2950 55..8655 3.75 6.61 ow e KEEP OUT rT AREA r 1.27 e 1 4 n 1 2 3 4 c TOP VIEW h 1.27 0.61 ® 3.81 M LAND PATTERN O OPTIONAL DRAFT RECOMMENDATION S ANGLE MAY APPEAR 54..0800 SDEEETAIL C OFO NTH FEO PUARC SKIADGESE FE 0.35 T 0.15 0.10 C SIDE VIEW 00..0050 00..3006 8X 0.08 C 0.35 C 0.15 1.10 SEATING 0.90 PLANE DETAIL C DETAIL B 3.81 SCALE: 2:1 SCALE: 2:1 (0.34) 1.27 00..5311 (8X) NOTES: UNLESS OTHERWISE SPECIFIED 0.10 C A B A. PACKAGE STANDARD REFERENCE: JEDEC MO-240, 1 2 3 4 ISSUE A, VAR. AA, DATED OCTOBER 2002. B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. 0.76 MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. 0.44 (0.52) C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. E. IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUT AREA. (0.50()0.30) 33..7388 43..2992 F. DRAWING FILE NAME: PQFN08AREV8 (3.40) (2X) 8 7 6 5 0.64 3.96 0.34 3.61 BOTTOM VIEW Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe- cifically the warranty therein, which covers Fairchild products. ©2009 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDMS6681Z Rev.1.4

F D M S 6 6 8 1 Z TRADEMARKS P The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not - intended to be an exhaustive list of all such trademarks. C h a AAtctcituuPdeoEwnegr™ine™ FFR-PFFEST™® OPTOPLANAR® ®* nn AABwXitS-inCiCdAa™P®®* GGGlrroeebeeannlB FPrPiodSwg™eer™ ResourceSM PPoowwtmee®rrT Sruepnpchly® WebDesigner™ TTiinnyyBBouocks®t® el P BCuoirledP itL NUoSw™™ GGrmeaexn™ FPS™ e-Series™ PPorowgerarXmSm™able Active Droop™ TTiinnyyCLoaglcic™® ow CorePOWER™ GTO™ QFET® TINYOPTO™ e CROSSVOLT™ IntelliMAX™ QS™ TTiinnyyPPoWwMe™r™ rT CCTurLr™ent Transfer Logic™ IMSaOrPkiLnAg NSAmRa™ll Speakers Sound Louder QRaupieidt CSeorniefigs™ure™ TinyWire™ re DEUXPEED® and Better™ ™ TranSiC™ n TriFault Detect™ c DEcuoaSl CPAooRl™K® MMeICgRaBOuCcOk™UPLER™ Saving our world, 1mW/W/kW at a time™ TμSReUrEDCesU™RRENT®* h® EfficentMax™ MicroFET™ SignalWise™ M ESBC™ MicroPak™ SmartMax™ MicroPak2™ SMART START™ O ® MillerDrive™ Solutions for Your Success™ UHC® S Fairchild® MotionMax™ SPM® Ultra FRFET™ F Fairchild Semiconductor® MotionGrid® STEALTH™ UniFET™ E FACT Quiet Series™ MTi® SuperFET® VCX™ T FACT® MTx® SuperSOT™-3 VisualMax™ FAST® MVN® SuperSOT™-6 VoltagePlus™ FastvCore™ mWSaver® SuperSOT™-8 XS™ FETBench™ OptoHiT™ SupreMOS® Xsens™ FPS™ OPTOLOGIC® SyncFET™ 仙童™ Sync-Lock™ *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. TO OBTAIN THE LATEST, MOST UP-TO-DATE DATASHEET AND PRODUCT INFORMATION, VISIT OUR WEBSITE AT HTTP://WWW.FAIRCHILDSEMI.COM. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used here in: 1. Life support devices or systems are devices or systems which, (a) are 2. A critical component in any component of a life support, device, or intended for surgical implant into the body or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause and (c) whose failure to perform when properly used in accordance with the failure of the life support device or system, or to affect its safety or instructions for use provided in the labeling, can be reasonably effectiveness. expected to result in a significant injury of the user. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Datasheet contains the design specifications for product development. Specifications Advance Information Formative / In Design may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Obsolete Not In Production Semiconductor. The datasheet is for reference information only. Rev. I74 ©2009 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDMS6681Z Rev.1.4

PQFN85X6,1.27P CASE483AE ISSUEA 5.10 A 5.10 3.91 PKG SEE CL B DETAILB 1.27 8 5 8 7 6 5 0.77 4.52 3.75 PKGCL 6.15 5.85 6.61 5.65 KEEPOUT AREA 1.27 1 4 1 2 3 4 TOPVIEW 1.27 0.61 3.81 LANDPATTERN OPTIONALDRAFT RECOMMENDATION ANGLEMAYAPPEAR SEE ONFOURSIDES 5.00 4.80 DETAILC OFTHEPACKAGE 0.35 0.15 (cid:19)(cid:131)(cid:16)(cid:20)(cid:21)(cid:131) 0.10 C 0.30 0.05 0.05 SIDEVIEW 0.00 (cid:19)(cid:131)(cid:16)(cid:20)(cid:21)(cid:131) 8X 0.08 C 0.35 C 5.20 0.15 4.80 1.10 SEATING 0.90 PLANE DETAILC DETAILB 3.81 SCALE:2:1 SCALE:2:1 1.27 0.51 (8X) 0.31 (0.34) NOTES:UNLESSOTHERWISESPECIFIED 0.10 C A B A.PACKAGESTANDARDREFERENCE:JEDECMO-240, 1 2 3 4 ISSUEA,VAR.AA,. B.DIMENSIONSDONOTINCLUDEBURRSORMOLDFLASH. 0.76 MOLDFLASHORBURRSDOESNOTEXCEED0.10MM. 0.51 (0.52) C.ALLDIMENSIONSAREINMILLIMETERS. 6.25 D.DIMENSIONINGANDTOLERANCINGPERASMEY14.5M-2009. 5.90 E.ITISRECOMMENDEDTOHAVENOTRACESOR VIASWITHINTHEKEEPOUTAREA. (0.50) 3.48+0.30 -0.10 (0.30) (2X) 8 7 6 5 +0.10 (cid:19)(cid:17)(cid:23)(cid:23)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 0.20 (8X) 3.96 -0.15 3.61 BOTTOMVIEW

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