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F D M C 8 November 2013 6 2 FDMC86244 4 4 ® N N-Channel Shielded Gate PowerTrench MOSFET - C 150 V, 9.4 A, 134 mΩ h a Features General Description n n e (cid:132) Shielded Gate MOSFET Technology This N-Channel MOSFET is produced using Fairchild l Semiconductor‘s advanced PowerTrench® process that S (cid:132) Max r = 134 mΩ at V = 10 V, I = 2.8 A DS(on) GS D incorporates Shielded Gate technology. This process has been h i (cid:132) Max r = 186 mΩ at V = 6 V, I = 2.4 A optimized for the on-state resistance and yet maintain superior e DS(on) GS D l switching performance. d (cid:132) Low Profile - 1 mm max in Power 33 e d (cid:132) 100% UIL Tested G Application (cid:132) RoHS Compliant a t (cid:132) DC - DC Conversion e P o w e r T Top Bottom re n D D D D c 8 7 6 5 S D h ® M S D O S S D F E T G D 1 2 3 4 G S S S MLP 3.3x3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol Parameter Ratings Units V Drain to Source Voltage 150 V DS V Gate to Source Voltage ±20 V GS Drain Current -Continuous T = 25°C 9.4 C I -Continuous T = 25°C (Note 1a) 2.8 A D A -Pulsed 12 E Single Pulse Avalanche Energy (Note 3) 12 mJ AS Power Dissipation T = 25°C 26 P C W D Power Dissipation T = 25°C (Note 1a) 2.3 A T , T Operating and Storage Junction Temperature Range -55 to + 150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 4.7 θJC °C/W R Thermal Resistance, Junction to Ambient (Note 1a) 125 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMC86244 FDMC86244 Power 33 13’’ 12 mm 3000 units ©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMC86244 Rev.C3

F D Electrical Characteristics T = 25 °C unless otherwise noted M J C Symbol Parameter Test Conditions Min Typ Max Units 8 6 Off Characteristics 2 4 BV Drain to Source Breakdown Voltage I = 250 μA, V = 0 V 150 V 4 DSS D GS N ΔBV Breakdown Voltage Temperature ΔTDSS Coefficient ID = 250 μA, referenced to 25 °C 106 mV/°C -C J h IDSS Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 μA a n I Gate to Source Leakage Current V = ±20 V, V = 0 V ±100 nA GSS GS DS n e On Characteristics l S V Gate to Source Threshold Voltage V = V , I = 250 μA 2 2.6 4 V h GS(th) GS DS D i ΔV Gate to Source Threshold Voltage e ΔTGS(th) Temperature Coefficient ID = 250 μA, referenced to 25 °C -9 mV/°C ld J e V = 10 V, I = 2.8 A 105 134 d GS D r Static Drain to Source On Resistance V = 6 V, I = 2.4 A 120 186 mΩ G DS(on) GS D a VGS = 10 V, ID = 2.8 A, TJ = 125 °C 199 254 te gFS Forward Transconductance VDD = 10 V, ID = 2.8 A 8 S P o Dynamic Characteristics w e Ciss Input Capacitance V = 75 V, V = 0 V, 257 345 pF rT Coss Output Capacitance f =D S1 MHz GS 32 45 pF re Crss Reverse Transfer Capacitance 1.8 5 pF n c h Switching Characteristics ® t Turn-On Delay Time 5.3 11 ns M d(on) tr Rise Time VDD = 75 V, ID = 2.8 A, 1.5 10 ns OS td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 Ω 9.9 20 ns F t Fall Time 2.3 10 ns E f T Q Total Gate Charge V = 0 V to 10 V 4.2 5.9 nC g(TOT) GS V = 75 V, Q Total Gate Charge V = 0 V to 5 V DD 2.4 3.4 g(TOT) GS I = 2.8 A Q Total Gate Charge D 1.1 nC gs Q Gate to Drain “Miller” Charge 1.0 nC gd Drain-Source Diode Characteristics V = 0 V, I = 2.8 A (Note 2) 0.81 1.3 V Source to Drain Diode Forward Voltage GS S V SD V = 0 V, I = 2 A (Note 2) 0.79 1.2 GS S t Reverse Recovery Time 48 76 ns rr I = 2.8 A, di/dt = 100 A/μs Q Reverse Recovery Charge F 38 61 nC rr NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a.53 °C/W when mounted on a b.125 °C/W when mounted on 1 in2 pad of 2 oz copper a minimum pad of 2 oz copper GDDSS FSFS GDDSS FSFS 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; N-ch: L = 1.0 mH, IAS = 5.0 A, VDD = 135 V, VGS = 10 V. ©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMC86244 Rev.C3

F D Typical Characteristics M T = 25 °C unless otherwise noted J C 8 6 2 12 5 4 I, DRAIN CURRENT (A) D 369 VGS = 10 V VGSV =G 5S. 5=PD UUV6 LTVSYE C DYUCRLEA T=I O0.NV5 %GV=S G 8M S=0 A = 4μX .s 55 VV NORMALIZEDAIN TO SOURCE ON-RESISTANCE 1234 PUVLGSS E= D4 UVRATIOVNG =S =8 04 μ.5s VVGVSG =S 5= V6 V VVGGSS = = 5 1.50 VV 4 N-Channel Shield VGS = 4 V DR DUTY CYCLE = 0.5% MAX e 0 0 d 0 1 2 3 4 5 0 3 6 9 12 G VDS, DRAIN TO SO URCE VOLTAGE (V) ID, DRAIN CURR ENT (A) a t e Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance P vs Drain Current and Gate Voltage o w e r T 2.4 500 r TANCE 22..02 VIDG =S 2=. 81 0A V ()mΩ400 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs ench NORMALIZED O SOURCE ON-RESIS 11111.....02468 rDRAIN TO ,DS(on)CE ON-RESISTANCE 230000 TJ = 12ID5 =o C2.8 A MOSFET® T 0.8 R100 AIN 0.6 SOU TJ = 25 oC R D 0.4 0 -75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10 TJ, JUNCTION TEM PERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 12 20 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs NT (A) 10 VGS = 0 V T (A) 9 VDS = 5 V URRE 1 TJ = 150 oC N C CURRE 6 TJ = 150 oC DRAIN 0.1 TJ = 25 oC AIN TJ = 25 oC RSE TJ = -55 oC R E , DD 3 REV 0.01 I TJ = -55 oC , S I 0 0.001 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOU RCE VOLTAGE (V) VSD, BODY DIODE FOR WARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMC86244 Rev.C3

F D Typical Characteristics T = 25 °C unless otherwise noted M J C 8 6 10 1000 2 4 GE (V) 8 ID = 2.8 A VDD = 50 V 4 N OLTA VDD = 75 V pF) 100 Ciss -Ch E TO SOURCE V 46 VDD = 100 V CAPACITANCE ( 10 Coss annel Sh GAT 2 f = 1 MHz ie V, GS 0 1 VGS = 0 V Crss lde 0 1 2 3 4 5 0.1 1 10 100 d Qg, GATE CH ARGE (nC) VDS, DRAIN TO SOU RCE VOLTAGE (V) G a t e Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain P to Source Voltage o w e r 10 10 T r ENT (A) 8 TJ = 25 oC NT (A) 8 VGS = 10R θVJC = 4.7 oC/W ench® HE CURR 6 TJ = 100 oC N CURRE 6 VGS = 6 V MOS AVALANC 4 TJ = 125 oC , IDRAID 24 FET , AS 2 I 1 0 0.001 0.01 0.1 1 2 25 50 75 100 125 150 tAV, TIME IN AVA LANCHE (ms) TC, CASE TEMPERATURE (oC) Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain Switching Capability Current vs Case Temperature 20 1000 10 W) 100 μs R ( A) WE T ( 1 O 100 REN 1 ms NT P AIN CUR 0.1 TLIHMISIT AERDE BAY I SrD S(on) 11000 m mss RANSIE 10 I, DRD0.01 STRTJAIθN J ==AG M2=L5 AE1 Xo 2PC 5RU oALCST/WEED D110 Cs s , PEAK T)PK 1 TSRAIθNJ =AG 2=L5 E1 o 2PC5U oLCS/WE 0.001 P( 0.5 0.1 1 10 100 500 10-4 10-3 10-2 10-1 1 10 100 1000 VDS, DRAIN to SOU RCE VOLTAGE (V) t, PULSE WI DTH (sec) Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum Operating Area Power Dissipation ©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMC86244 Rev.C3

F D Typical Characteristics T = 25 °C unless otherwise noted M J C 8 6 2 4 4 2 N 1 DUTY CYCLE-DESCENDING ORDER -C h L a A n ALIZED THERM ZPEDANCE,JAθ 0.1 D = 000000......521000521 PDM t1t2 nel Shie RMIM 0.01 SINGLE PULSE NOTES: ld NO RθJA = 125 oC/W DPEUATYK FTAJ C= TPODRM: xD Z =θ JtA1 /xt2 RθJA + TA ed G a 0.001 te 10-4 10-3 10-2 10-1 1 10 100 1000 P t, RECTANGULAR PULSE DURATION (sec) o w e Figure 13. Junction-to-Ambient Transient Thermal Response Curve r T r e n c h ® M O S F E T ©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMC86244 Rev.C3

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