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F D M C June 2014 8 6 2 FDMC8622 2 N N-Channel Shielded Gate PowerTrench® MOSFET -C h 100 V, 16 A, 56 mΩ a n Features General Description n e (cid:132) Shielded Gate MOSFET Technology This N-Channel MOSFET is produced using Fairchild l S (cid:132) Max r = 56 mΩ at V = 10 V, I = 4 A Semiconductor‘s advanced PowerTrench® process that h DS(on) GS D incorporates Shielded Gate technology. This process has been i e (cid:132) Max r = 90 mΩ at V = 6 V, I = 3 A optimized for r , switching performance and ruggedness. l DS(on) GS D DS(on) d e (cid:132) High performance trench technology for extremely low rDS(on) d (cid:132) High power and current handling capability in a widely used Application G surface mount package a (cid:132) DC-DC Primary Switch te (cid:132) 100% UIL Tested P o (cid:132) Termination is Lead-free and RoHS Compliant w e r T r e n Top Bottom c h 8 7 6 5 D D D D S D ® M O S D S F S D E T G D 1 2 3 4 G S S S MLP 3.3X3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol Parameter Ratings Units V Drain to Source Voltage 100 V DS V Gate to Source Voltage ±20 V GS Drain Current -Continuous T = 25 °C 16 C ID -Continuous TA = 25 °C (Note 1a) 4 A -Pulsed (Note 4) 30 E Single Pulse Avalanche Energy (Note 3) 37 mJ AS Power Dissipation T = 25 °C 31 P C W D Power Dissipation T = 25 °C (Note 1a) 2.3 A T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Case (Note 1) 4.0 θJC °C/W R Thermal Resistance, Junction to Ambient (Note 1a) 53 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMC8622 FDMC8622 MLP 3.3X3.3 13 ’’ 12 mm 3000 units ©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMC8622 Rev.C6

F D Electrical Characteristics TJ = 25 °C unless otherwise noted M C Symbol Parameter Test Conditions Min Typ Max Units 8 6 Off Characteristics 2 2 BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V N ΔBV Breakdown Voltage Temperature - DSS I = 250 μA, referenced to 25 °C 69 mV/°C C ΔTJ Coefficient D h I Zero Gate Voltage Drain Current V = 80 V, V = 0 V 1 μA a DSS DS GS n I Gate to Source Leakage Current V = ±20 V, V = 0 V ±100 nA n GSS GS DS e l On Characteristics S h VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 2 2.9 4 V ie ΔVGS(th) Gate to Source Threshold Voltage I = 250 μA, referenced to 25 °C -9 mV/°C ld ΔT Temperature Coefficient D e J d VGS = 10 V, ID = 4 A 43.7 56 G rDS(on) Static Drain to Source On Resistance VGS = 6 V, ID = 3 A 59.9 90 mΩ a VGS = 10 V, ID = 4 A, TJ = 125 °C 76.4 98 te g Forward Transconductance V = 10 V, I = 4 A 8.9 S P FS DD D o w Dynamic Characteristics e r Ciss Input Capacitance 302 402 pF T Coss Output Capacitance Vf =D S1 =M 5H0z V, VGS = 0 V, 72.5 96 pF ren C Reverse Transfer Capacitance 4.2 6 pF rss c R Gate Resistance 1.0 Ω h g ® Switching Characteristics M O td(on) Turn-On Delay Time 5.9 12 ns S tr Rise Time VDD = 50 V, ID = 4 A, 1.6 10 ns FE td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 Ω 10.2 18 ns T t Fall Time 2.2 10 ns f Q Total Gate Charge V = 0 V to 10 V 5.2 7.3 nC g(TOT) GS V = 50 V, Q Total Gate Charge V = 0 V to 5 V DD 3.0 4.1 nC g(TOT) GS I = 4 A Q Total Gate Charge D 1.4 nC gs Q Gate to Drain “Miller” Charge 1.4 nC gd Drain-Source Diode Characteristics V = 0 V, I = 4 A (Note 2) 0.8 1.3 V Source to Drain Diode Forward Voltage GS S V SD V = 0 V, I = 1.7 A (Note 2) 0.8 1.2 GS S t Reverse Recovery Time 36 57 ns rr I = 4 A, di/dt = 100 A/μs Q Reverse Recovery Charge F 28 45 nC rr NOTES: 1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a.53°C/W when mounted on a b. 125 °C/W when mounted on 1 in2 pad of 2 oz copper a minimum pad of 2 oz copper GDDSS FSFS GDDSS FSFS 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; N-ch: L = 3.0 mH, IAS = 5.0 A, VDD = 100 V, VGS = 10 V. 4. Pulse Id refers to Figure.11 Forward Bias Safe Operation Area. ©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMC8622 Rev.C6

F D Typical Characteristics M T = 25°C unless otherwise noted J C 8 6 30 4 2 25 VGS = 10 V VGS = 7 V TANCE VGS = 5 V PDUULTSYE C DYUCRLEA T=I O0.N5 %= M80AμXs 2 N- CURRENT (A) 1250 VGVSG S= =6 . 56 VV MALIZEDCE ON-RESIS 23 VGS = 6 VVGS = 6.5 V Channe AIN 10 PDUULTSYE C DYUCRLEA T=I O0.N5 %= M80AμXs NOROUR l S , IDRD 5 VGS = 5 V AIN TO S 1 VGS = 7 V VGS = 10 V hield R e D 0 0 d 0 1 2 3 4 0 5 10 15 20 G VDS, DRAIN TO SO URCE VOLTAGE (V) ID, DRAIN CURR ENT(A) a t e Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance P vs Drain Current and Gate Voltage o w e 2.0 0.5 r NORMALIZED O SOURCE ON-RESISTANCE 11111.....02468 V IDG S= =4 1A0 V rDRAIN TO ,DS(on)()mCE ON-RESISTANCE Ω000...234 PDIDUUT L=TJ SY=4E C1A 2DY5UC oRLCEA T=I O0.N5 %= M80AμXs TrenchMOSFE® AIN T 0.8 SOUR0.1 T DR TJ = 25 oC 0.6 0.0 -75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10 TJ, JUNCTION TEM PERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 30 40 25 PDUULTSYE C DYUCRLEA T=I O0.N5 %= M80AμXs T (A) VGS = 0 V N A) VDS = 5 V RE 10 T ( 20 UR N C URRE 15 RAIN TJ = 150 oC AIN C 10 TJ = 150 oC RSE D 1 TJ = 25 oC R E I, DD 5 TJ = 25 oC , REVS TJ = -55 oC TJ = -55 oC I 0 0.1 0 3 6 9 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOU RCE VOLTAGE (V) VSD, BODY DIODE FOR WARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMC8622 Rev.C6

F D Typical Characteristics M T = 25°C unless otherwise noted J C 8 10 1000 6 2 OLTAGE(V) 8 ID = 4 A VDD = 25 V VDD = 50 V pF) 100 Ciss 2 N-Ch E V 6 E ( a URC VDD = 75 V ANC Coss nn E TO SO 4 CAPACIT 10 el Sh V, GATGS 2 fV =G S1 =M 0H Vz Crss ielde 0 1 d 0 1 2 3 4 5 6 0.1 1 10 100 G Qg, GATE CH ARGE(nC) VDS, DRAIN TO SOU RCE VOLTAGE (V) a t Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain e to Source Voltage P o w 20 20 e r T r RENT(A) 10 TJ = 25 oC ENT (A) 15 VGS = 10 V ench R R ® U R E C CU 10 M , AVALANCHAS TJ = 125 oC TJ = 100 oC , IDRAIN D 5 LRiθmJCit e=d 4 b.0y o PCa/Wckage VGS = 6 V OSFET I 1 0 0.001 0.01 0.1 1 10 25 50 75 100 125 150 tAV, TIME IN AVA LANCHE(ms) TC, CASE TEMPERATURE (oC) Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain Switching Capability Current vs Case Temperature 1000 40 W) VGS = 10 V SINGLE PULSE 10 R ( RθJA = 125o C/W A) 100 μs WE TA = 25 oC ENT ( T PO 100 R 1 N UR SIE AIN C TLHIMISIT AERDE BAY I SrD S(on) 110 m mss TRAN 10 I, DRD 0.1 STJIN =G MLAEX P RUALSTEED 110 s0 ms PEAK RθJA = 125 oC/W 10 s , )K 1 0.01 TA = 25 oC DC P(P 0.5 0.0005.01 0.1 1 10 100 500 10-4 10-3 10-2 10-1 1 10 100 1000 VDS, DRAIN to SOU RCE VOLTAGE (V) t, PULSE WID TH (s) Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum Operating Area Power Dissipation ©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMC8622 Rev.C6

F D Typical Characteristics M T = 25°C unless otherwise noted J C 8 6 2 T DUTY CYCLE-DESCENDING ORDER 2 N 1 2 SIE N TIVE TRANSTANCE 0.1 D = 0000....21055 PDM -Chan D EFFECAL RESI 00..0021 t1t2 nel S ALIZEHERM 0.01 SINGLE PULSE NZθOJAT(Et)S =: r(t) x RθJA hie RMT RθJA = 125 °C/W ld NO Peak TJ = PDM x ZθJA(t) + TA e r(t), 0.001 Duty Cycle, D = t1 / t2 d G 10-4 10-3 10-2 10-1 1 10 100 1000 a t, RECTANGULAR PULSE DURATION (sec) te P Figure 13. Junction-to-Ambient Transient Thermal Response Curve o w e r T r e n c h ® M O S F E T ©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMC8622 Rev.C6

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