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F D M A February 2014 9 0 8 FDMA908PZ P Z Single P-Channel PowerTrench® MOSFET S i n g -12 V, -12 A, 12.5 mΩ l e Features P - C (cid:132) Max r = 12.5 mΩ at V = -4.5 V, I = -12 A General Description h DS(on) GS D a (cid:132) Max r = 18 mΩ at V = -2.5 V, I = -10 A This device is designed specifically for battery charge or load n DS(on) GS D n switching in cellular handset and other ultraportable applications. (cid:132) Max r = 28 mΩ at V = -1.8 V, I = -8 A e DS(on) GS D It features a MOSFET with low on-state resistance and zener l (cid:132) Low Profile - 0.8 mm maximum in the new package MicroFET diode protection against ESD. The MicroFET 2X2 package P o 2x2 mm offers exceptional thermal performance for its physical size and w is well suited to linear mode applications. e (cid:132) HBM ESD protection level > 2.8 kV typical (Note 3) r T (cid:132) Free from halogenated compounds and antimony oxides r e n (cid:132) RoHS Compliant c h ® M O S Pin 1 D D G F E Bottom Drain Contact T D D Drain Source D D G S D D S MicroFET 2X2 (Bottom View) MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol Parameter Ratings Units V Drain to Source Voltage -12 V DS V Gate to Source Voltage ±8 V GS Drain Curre -Continuous T = 25 °C (Note 1a) -12 I A A D -Pulsed -40 Power Dissipation T = 25 °C (Note 1a) 2.4 P A W D Power Dissipation T = 25 °C (Note 1b) 0.9 A T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Ambient (Note 1a) 52 θJA °C/W R Thermal Resistance, Junction to Ambient (Note 1b) 145 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity 908 FDMA908PZ MicroFET 2X2 7 ” 12 mm 3000 units ©2013 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMA908PZ Rev.E3

F Electrical Characteristics D T = 25 °C unless otherwise noted J M Symbol Parameter Test Conditions Min Typ Max Units A 9 Off Characteristics 0 8 P BV Drain to Source Breakdown Voltage I = -250 μA, V = 0 V -12 V DSS D GS Z ΔBV Breakdown Voltage Temperature DSS I = -250 μA, referenced to 25 °C -10 mV/°C S ΔTJ Coefficient D in I Zero Gate Voltage Drain Current V = -9.6 V, V = 0 V -1 μA g DSS DS GS l I Gate to Source Leakage Current V = ±8 V, V = 0 V ±10 μA e GSS GS DS P On Characteristics -C h VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA -0.4 -0.6 -1 V a ΔV Gate to Source Threshold Voltage n GS(th) I = -250 μA, referenced to 25 °C 2.8 mV/°C n ΔTJ Temperature Coefficient D e l V = -4.5 V, I = -12 A 10 12.5 GS D P V = -2.5 V, I = -10 A 13 18 o GS D w rDS(on) Static Drain to Source On Resistance VGS = -1.8 V, ID = -8 A 18 28 mΩ e V = -4.5 V, I = -12 A, r GS D 13 16 T TJ = 125 °C re g Forward Transconductance V = -5 V, I = -12 A 63 S n FS DD D c h Dynamic Characteristics ® C Input Capacitance 2638 3957 pF M iss C Output Capacitance VDS = -6 V, VGS = 0 V, 649 974 pF O oss f = 1 MHz S Crss Reverse Transfer Capacitance 602 903 pF F E Switching Characteristics T t Turn-On Delay Time 11 21 ns d(on) V = -6 V, I = -12 A, t Rise Time DD D 12 23 ns r V = -4.5 V, R = 6 Ω t Turn-Off Delay Time GS GEN 131 223 ns d(off) t Fall Time 71 121 ns f Qg Total Gate Charge VGS = -4.5 V, VDD = -6 V, 24 34 nC Q Gate to Source Charge I = -12 A 3.4 nC gs D Q Gate to Drain “Miller” Charge 5.3 nC gd Drain-Source Diode Characteristics V = 0 V, I = -2 A (Note 2) -0.6 -1.2 V V Source to Drain Diode Forward Voltage GS S SD V = 0 V, I = -12 A (Note 2) -0.8 -1.2 V GS S t Reverse Recovery Time 26 42 ns rr I = -12 A, di/dt = 100 A/μs Q Reverse Recovery Charge F 8.5 17 nC rr NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 52 °C/W when mounted b. 145 °C/W when mounted on a on a 1 in2 pad of 2 oz copper. minimum pad of 2 oz copper. GDDSS FSFS GDDSS FSFS 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. ©2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMA908PZ Rev.E3

F D Typical Characteristics M T = 25 °C unless otherwise noted J A 9 40 3 0 8 VGS = -4.5 V NCE PZ A) 30 VGS = -3 V STA VGS = -1.5 V S T ( VGS = -2.5 V ESI 2 in CURREN 20 VGS = -1.8 V MALIZEDCE ON-R VGS = -1.8 V VGS = -2.5 V VGS = -3 V gle P -I, DRAIN D 10 VGS = -1.5 V PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs NORRAIN TO SOUR 1 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs VGS = -4.5 V -Channe D 0 0 l 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 P -VDS, DRAIN TO SO URCE VOLTAGE (V) -ID, DRAIN CURR ENT (A) ow e Figure 1. On-Region Characteristics Figure 2. Normalized On- Resistance r T vs Drain Current and Gate Voltage r e n 60 c NORMALIZED O SOURCE ON-RESISTANCE 011111......901234 IVDG =S =-1 2-4A.5V rDRAIN TO ,DS(on)()URCE ON-RESISTANCE mΩ2400 TPDJUU =LT 1SY2E C5 D YoIDUCC =RL EA-1 T=2I O 0A.N5 %= 8M0A μXs h MOSFET® T O N 0.8 S TJ = 25 oC AI R 0 D 0.7 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 -75 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEM PERATURE (oC) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 40 100 PULSE DURATION = 80 μs A) VGS = 0 V DUTY CYCLE = 0.5% MAX T ( EN 10 A) 30 R URRENT ( 20 VDS = -5 V TJ = 150 oC RAIN CUR 1 TJ = 150 oC N C TJ = 25 oC E D 0.1 TJ = 25 oC AI RS R E D 10 V -I, D TJ = -55 oC , RES0.01 TJ = -55 oC -I 0 0.001 0.0 0.5 1.0 1.5 2.0 0.0 0.4 0.8 1.2 -VGS, GATE TO SO URCE VOLTAGE (V) -VSD, BODY DIODE FO RWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2013 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMA908PZ Rev.E3

F D Typical Characteristics M T = 25 °C unless otherwise noted J A 9 4.5 5000 08 V) P E ( ID = -12A Ciss Z G OLTA3.0 VDD = -4V pF) Sin CE V VDD = -6V NCE ( gle O SOUR1.5 VDD = -8V PACITA1000 Coss P-C T A h TE C f = 1 MHz Crss a GA VGS = 0 V nn , S e -VG0.00 5 10 15 20 25 3000.1 1 10 20 l P Qg, GATE CH ARGE (nC) -VDS, DRAIN TO SOU RCE VOLTAGE (V) ow e Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain rT to Source Voltage r e n 10-3 60 c h GE CURRENT (A) 111000---654 VDS = 0 V TJ = 125 oC URRENT (A) 101 THIS AREA IS 110 m mss MOSFE® , -IGATE LEAKAg 111000---987 TJ = 25 oC -I, DRAIN CD 0.1 STTRLJAIθINM J ==AGI T M2=LE5 AE1 DXo 4PC 5BRU oYALC STr/DWEESD(on) CMUERAVSEU RBEEDN TD ATTOA 11D100 Cs0 s ms T 10-10 0.01 0 5 10 15 0.01 0.1 1 10 50 -VGS, GATE TO SOURCE VOLTAGE (V) -VDS, DRAIN to SOU RCE VOLTAGE (V) Figure 9. Gate Leakage Current Figure 10. Gate Leakage Current vs Gate to Source Voltage vs Gate to Source Voltage 100 SINGLE PULSE R (W) RθJA = 145 oC/W OWE 10 TA = 25 oC P T N E NSI A R T 1 K A E P , K) P P( 0.1 10-3 10-2 10-1 1 10 100 1000 t, PULSE WIDTH (s ec) Figure 11. Single Pulse Maximum Power Dissipation ©2013 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMA908PZ Rev.E3

F D Typical Characteristics M T = 25 °C unless otherwise noted J A 2 9 0 DUTY CYCLE-DESCENDING ORDER 8 1 P Z AL D = 00..25 S LIZED THERM ZEDANCE,JAθ0.1 0000....1000521 PDM t1 ingle P- NORMAIMP SRIθNJAG =L E1 4P5U oLCS/EW NDOUTTYE SF:ACTOR: D = t1/t2 t2 Chan (Note 1b) PEAK TJ = PDM x ZθJA x RθJA + TA n e l 0.01 P 10-3 10-2 10-1 1 10 100 1000 o t, RECTANGULAR PULSE DURATION (sec) w Figure 12. Junction-to-Ambient Transient Thermal Response Curve e r T r e n c h ® M O S F E T ©2013 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMA908PZ Rev.E3

2.05 A 0.05 C (0.20) B (0.45) 2X 1.00 6 5 4 2.05 2.30 1.05 0.66 1.35 0.05 C 0.475(6X) PIN1LOCATION 2X 1 2 3 TOPVIEW 0.65 0.40(6X) RECOMMENDEDLANDPATTERN (cid:19)(cid:17)(cid:27)(cid:3)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) 0.10 C (cid:19)(cid:17)(cid:21)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) Pin Function 0.08 C 1 Drain 2 Drain (cid:19)(cid:17)(cid:19)(cid:21)(cid:24)(cid:147)(cid:17)(cid:19)(cid:21)(cid:24) C 3 Gate SEATING SIDEVIEW 4 Source PLANE 5 Drain 6 Drain 7 Drain 8 Source (cid:21)(cid:17)(cid:19)(cid:24)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) (cid:19)(cid:17)(cid:28)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) (0.200)4X NOTES: (0.15) PIN1IDENT (0.50) A.PACKAGEDOESNOTCONFORMTO 1 2 3 (0.30) ANYJEDECSTANDARD. (cid:19)(cid:17)(cid:25)(cid:20)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) B.DIMENSIONSAREINMILLIMETERS. (cid:19)(cid:17)(cid:21)(cid:25)(cid:24)(cid:147)(cid:19)(cid:17)(cid:19)(cid:25)(cid:24) C.DIMENSIONSANDTOLERANCESPER (6X) ASMEY14.5M,2009. (cid:20)(cid:17)(cid:19)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) (0.50) 7 8 D.LANDPATTERNRECOMMENDATIONIS (cid:21)(cid:17)(cid:19)(cid:24)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) EXISTINGINDUSTRYLANDPATTERN. E.DRAWINGFILENAME:MKT-FDMA908Prev1. 6 5 4 F.REFERENCEDRAWINGNO:MKT-MLP06Prev1. (cid:19)(cid:17)(cid:22)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24)(cid:11)(cid:25)(cid:59)(cid:12) 0.65 0.10 C A B 1.30 0.05 C BOTTOMVIEW

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