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F D M A 3 July 2014 0 2 FDMA3023PZ 3 P ® Z Dual P-Channel PowerTrench MOSFET D -30 V, -2.9 A, 90 mΩ u a l Features General Description P - C (cid:132) Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.9 A This device is designed specifically as a single package solution h for the battery charge switch in cellular handset and other a (cid:132) Max rDS(on) = 130 mΩ at VGS = -2.5 V, ID = -2.6 A ultra-portable applications. It features two independent n P-Channel MOSFETs with low on-state resistance for minimum n (cid:132) Max rDS(on) = 170 mΩ at VGS = -1.8 V, ID = -1.7 A e conduction losses. When connected in the typical common l (cid:132) Max rDS(on) = 240 mΩ at VGS = -1.5 V, ID = -1.0 A source configuration, bi-directional current flow is possible. P o (cid:132) Low profile - 0.8 mm maximum - in the new package MicroFET w The MicroFET 2X2 package offers exceptional thermal 2x2 mm e performance for its physical size and is well suited to linear mode r (cid:132) HBM ESD protection level > 2 kV (Note 3) applications. Tr e (cid:132) RoHS Compliant n c (cid:132) Free from halogenated compounds and antimony h ® oxides M O S F PIN 1 E S1 G1 D2 T S1 1111111 6666666 D1 D1 D2 G1 2222222 5555555 G2 D2 3333333 4444444 S2 D1 G2 S2 MicroFET 2x2 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol Parameter Ratings Units V Drain to Source Voltage -30 V DS V Gate to Source Voltage ±8 V GS Drain Current -Continuous (Note 1a) -2.9 I A D -Pulsed -6 Power Dissipation (Note 1a) 1.4 P W D Power Dissipation (Note 1b) 0.7 T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86 θJA R Thermal Resistance for Single Operation, Junction to Ambient (Note 1b) 173 θJA °C/W R Thermal Resistance for Dual Operation, Junction to Ambient (Note 1c) 69 θJA R Thermal Resistance for Dual Operation, Junction to Ambient (Note 1d) 151 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity 323 FDMA3023PZ MicroFET 2X2 7 ’’ 8 mm 3000 units ©2013 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMA3023PZ Rev.C1

F D Electrical Characteristics T = 25 °C unless otherwise noted M J A Symbol Parameter Test Conditions Min Typ Max Units 3 0 Off Characteristics 2 3 P BV Drain to Source Breakdown Voltage I = -250 μA, V = 0 V -30 V DSS D GS Z ΔBVDSS Breakdown Voltage Temperature I = -250 μA, referenced to 25 °C -24 mV/°C D ΔTJ Coefficient D u a IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 μA l I Gate to Source Leakage Current V = ±8 V, V = 0 V ±100 nA P GSS GS DS - C On Characteristics h a V Gate to Source Threshold Voltage V = V , I = -250 μA -0.4 -0.6 -1.0 V n GS(th) GS DS D n Δ ΔVTGJS(th) GTeamtep teor aStuoruer cCeo Tehffriceisehnotld Voltage ID = -250 μA, referenced to 25 °C 3 mV/°C el P V = -4.5 V, I = -2.9 A 71 90 o GS D w V = -2.5 V, I = -2.6 A 97 130 GS D e r Static Drain to Source On Resistance V = -1.8 V, I = -1.7 A 122 170 mΩ r DS(on) GS D T V = -1.5 V, I = -1.0 A 151 240 r GS D e V = -4.5 V, I = -2.9 A, T = 125 °C 110 140 n GS D J c gFS Forward Transconductance VDS = -5 V, ID = -2.9 A 10 S h ® Dynamic Characteristics M O C Input Capacitance 400 530 pF iss V = -15 V, V = 0 V, S Coss Output Capacitance f =D S1 MHz GS 55 70 pF F E C Reverse Transfer Capacitance 45 65 pF rss T Switching Characteristics t Turn-On Delay Time 5 10 ns d(on) tr Rise Time VDD = -15 V, ID = -1.0 A, 4 10 ns td(off) Turn-Off Delay Time VGS = -4.5 V, RGEN = 6 Ω 62 100 ns t Fall Time 18 33 ns f Q Total Gate Charge 7.9 11 nC g(TOT) V = -15 V, I = -2.9 A Q Gate to Source Charge DD D 0.9 nC gs V = -4.5 V GS Q Gate to Drain “Miller” Charge 1.9 nC gd Drain-Source Diode Characteristics I Maximum Continuous Drain-Source Diode Forward Current -1.1 A S V Source to Drain Diode Forward Voltage V = 0 V, I = -1.1 A (Note 2) -0.8 -1.2 V SD GS S t Reverse Recovery Time 18 33 ns rr I = -2.9 A, di/dt = 100 A/μs Q Reverse Recovery Charge F 6.6 13 nC rr ©2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMA3023PZ Rev.C1

F D Notes: M A 1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the 3 user's board design. (a) RθJA = 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation. 02 (b) RθJA = 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation. 3 (c) RθJA = 69 oC/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation. P (d) RθJA = 151 oC/W when mounted on a minimum pad of 2 oz copper. For dual operation. Z D u a amicno)2o8p u6ppn eaotCrde. d/Wo of nw2 h aeo n1z bmmo)zoi1n cu7imon3pt uepomdCe r/p.Wao dnw ohfe na2 cmp)ao6du9 on ft eo2Cd o /oWzn c aow p1ph ieenrn2. d mmc)o1oinp5upi1mne toureC.md/ W opna w dah oefn 2 oz l P-Ch a n n e l P 2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0% o 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. w e r T r e n c h ® M O S F E T ©2013 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMA3023PZ Rev.C1

F D Typical Characteristics M T = 25 °C unless otherwise noted J A 3 0 6 6 2 VGS = -4.5 V E PULSE DURATION = 80 μs 3P A) 5 VGS = -3.5 V TANC 5 DUTY CYCLE = 0.5% MAX Z D ENT ( 4 VGS = -2.5 V DRESIS 4 VGS = -1.5 V ua CURR 3 VGS = -1.8 V V = -1.5 V ALIZEE ON- 3 l P- N GS MC C , DRAID 2 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs NORO SOUR 2 VGS = -2.5 V VGS = -1.8 V han -I 1 N T 1 ne 00 0.5 1.0 1.5 2.0 DRAI 01 2 VGS = -33.5 V 4 V5GS = -4.5 V6 l Pow -VDS, DRAIN TO SO URCE VOLTAGE (V) -ID, DRAIN CURR ENT (A) e r T Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance r e vs Drain Current and Gate Voltage n c h ® 1.6 400 M ANCE 1.4 VIDG S= =-2 -.49. 5A V )mΩ PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs OS NORMALIZED O SOURCE ON-RESIST 11..02 rDRAIN TO ,DS(on)(CE ON-RESISTANCE 123000000 ID = -1.T45J =A 125 oC FET T 0.8 R AIN SOU TJ = 25 oC R D 0.6 0 -75 -50 -25 0 25 50 75 100 125 150 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 TJ, JUNCTION TEM PERATURE (oC) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 6 10 5 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs NT (A) VGS = 0 V E T (A) 4 VDS = -5 V URR 1 URREN 3 RAIN C 0.1 TJ = 125 oC AIN C 2 TJ = 125 oC RSE D TJ = 25 oC R E -I, DD 1 TJ = 25 oC TJ = -55 oC -I, REVS0.01 TJ = -55 oC 0 0.001 0.5 1.0 1.5 2.0 0.2 0.4 0.6 0.8 1.0 1.2 -VGS, GATE TO SO URCE VOLTAGE (V) -VSD, BODY DIODE FO RWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2013 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMA3023PZ Rev.C1

F D Typical Characteristics T = 25 °C unless otherwise noted M J A 3 0 5 1000 2 E (V) ID = -2.9 A 3P G 4 Z A T D URCE VOL 3 VDD = -10 V VDD = -2V0D VD = -15 V ANCE (pF) 100 Ciss ual P O SO 2 ACIT Coss -Ch -V, GATE TGS 01 CAP 10 fV =G S1 =M 0H Vz Crss annel P 0 2 4 6 8 10 0.1 1 10 30 o Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOU RCE VOLTAGE (V) we r T Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain r e to Source Voltage n c h ® 10 10-2 THIS AREA IS M RENT (A) 1100--43 VGS = 0 V NT (A) 1 LIMITED BY rDS(on) 1 ms OSFE UR RE 10 ms T GE C 10-5 TJ = 125 oC CUR 100 ms A N , GATE LEAKg 111000---876 TJ = 25 oC -I, DRAID 0.1 RSTTJAIθN J ==AG M2=L5 AE1 Xo 7PC3 RU oALCST/WEED 11D 0Cs s -I 0.01 10-9 0.01 0.1 1 10 100 200 0 3 6 9 12 15 -VDS, DRAIN to SOU RCE VOLTAGE (V) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 9. Gate Leakage vs Gate to Source Voltage Figure 10. Forward Bias Safe Operating Area 200 V = -4.5 V W)100 GS SINGLE PULSE R ( RθJA = 173 oC/W WE TA = 25 oC O P T N E SI 10 N A R T K A E P , )PK 1 P( 0.5 10-3 10-2 10-1 1 10 1000 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation ©2013 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMA3023PZ Rev.C1

F D Typical Characteristics T = 25 °C unless otherwise noted M J A 3 0 2 2 3 P DUTY CYCLE-DESCENDING ORDER 1 Z D AL D = 0.5 u RMALIZED THERM IMPEDANCE,ZJAθ 0.1 00000.....21000521 PDM t1t2 al P-Chan NO NOTES: n SINGLE PULSE DUTY FACTOR: D = t1/t2 e 0.01 RθJA = 173 oC/W PEAK TJ = PDM x ZθJA x RθJA + TA l P 0.005 o 10-3 10-2 10-1 1 10 100 1000 w t, RECTANGULAR PULSE DURATION (sec) e r T Figure 12. Junction-to-Ambient Transient Thermal Response Curve r e n c h ® M O S F E T ©2013 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDMA3023PZ Rev.C1

F D Dimensional Outline and Pad Layout M A 3 0 2 3 P Z D u a l P - C h a n n e l P o w e r T r e n c h ® M O S F E T Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif- ically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEB-X06 ©2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMA3023PZ Rev.C1

F D M A 3 0 2 3 P Z TRADEMARKS D The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not u intended to be an exhaustive list of all such trademarks. a AAXcc-uCPAoPw®e*r™ FFR-PFFEST™® ® ®* l P BitSiC™ Global Power ResourceSM PowtmerTrench® TinyBoost® -C Build it Now™ GreenBridge™ PowerXS™ TinyBuck® h CorePLUS™ Green FPS™ Programmable Active Droop™ a CCoRrOePSOSVWOELRT™™ GGrmeaexn™ FPS™ e-Series™ QQSFE™T® TTiinnyyCLoaglcic™® nn CTL™ GTO™ Quiet Series™ TINYOPTO™ e TinyPower™ l CDuErUreXnPt ETEraDn®sfer Logic™ IInStOelPliMLAANXA™R™ Rapid™Configure™ TTiinnyyWPWireM™™ Po DEcuoaSl CPAooRl™K® Manadr kBinegtt eSrm™all Speakers Sound Louder Saving our world, 1mW/W/kW at a time™ TranSiC™ w TriFault Detect™ e EEfSfiBceCn™tMax™ MMeICgRaBOuCcOk™UPLER™ SSimgnaartlMWaisxe™™ TRUECURRENT®* rT ® MicroFET™ SMART START™ μSerDes™ re MicroPak™ Solutions for Your Success™ n Fairchild® MicroPak2™ SPM® c Fairchild Semiconductor® MillerDrive™ STEALTH™ UHC® h FACT Quiet Series™ MotionMax™ SuperFET® Ultra FRFET™ ® FACT® mWSaver® SuperSOT™-3 UniFET™ M FFaAsStTvC®ore™ OOpPtToOHLiTO™GIC® SSuuppeerrSSOOTT™™--68 VViCsXua™lMax™ O FETBench™ OPTOPLANAR® SupreMOS® VoltagePlus™ S FPS™ SyncFET™ XS™ F Sync-Lock™ 仙童™ E T *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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A critical component in any component of a life support, device, or intended for surgical implant into the body or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause and (c) whose failure to perform when properly used in accordance with the failure of the life support device or system, or to affect its safety or instructions for use provided in the labeling, can be reasonably effectiveness. expected to result in a significant injury of the user. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Datasheet contains the design specifications for product development. Specifications Advance Information Formative / In Design may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design. 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