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F D D 4 N November 2013 6 0 N FDD4N60NZ Z — TM N-Channel UniFET II MOSFET N 600 V, 3.4 A, 2.5 Ω - C h Features Description a n n • RDS(on) = 1.9 Ω (Typ.) @ VGS = 10 V, ID = 1.7 A UniFETTM II MOSFET is Fairchild Semiconductor’s high voltage e • Low Gate Charge (Typ. 8.3 nC) MOSFET family based on advanced planar stripe and DMOS l U • Low C (Typ. 3.7 pF) technology. This advanced MOSFET family has the smallest n rss on-state resistance among the planar MOSFET, and also pro- i • 100% Avalanche Tested F vides superior switching performance and higher avalanche E • Improved dv/dt Capability energy strength. In addition, internal gate-source ESD diode T • ESD Imoroved Capability allows UniFETTM II MOSFET to withstand over 2kV HBM surge TM stress. This device family is suitable for switching power con- I • RoHS Compliant I verter applications such as power factor correction (PFC), flat M Applications panel display (FPD) TV power, ATX and electronic lamp bal- O lasts. S F • LCD/LED/PDP TV E T • Lighting • Uninterruptible Power Supply D D G G S D-PAK S MOSFET Maximum Ratings TC = 25oC unless otherwise noted. Symbol Parameter FDD4N60NZ Unit V Drain to Source Voltage 600 V DSS V Gate to Source Voltage ±25 V GSS - Continuous (T = 25oC) 3.4 I Drain Current C A D - Continuous (T = 100oC) 2 C I Drain Current - Pulsed (Note 1) 13.6 A DM E Single Pulsed Avalanche Energy (Note 2) 179.2 mJ AS I Avalanche Current (Note 1) 3.4 A AR E Repetitive Avalanche Energy (Note 1) 11.4 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) 5 V/ns (T = 25oC) 114 W P Power Dissipation C D - Derate above 25oC 0.9 W/oC T , T Operating and Storage Temperature Range -55 to +150 oC J STG T Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds 300 oC L Thermal Characteristics Symbol Parameter FDD4N60NZ Unit RθJC Thermal Resistance, Junction to Case, Max. 1.1 oC/W RθJA Thermal Resistance, Junction to Ambient, Max. 110 ©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D Package Marking and Ordering Information D 4 Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity N 6 FDD4N60NZ FDD4N60NZ DPAK Tape and Reel 330 mm 16 mm 2500 units 0 N Electrical Characteristics T = 25oC unless otherwise noted. Z C — Symbol Parameter Test Conditions Min. Typ. Max. Unit N Off Characteristics -C BV Drain to Source Breakdown Voltage I = 250 μA, V = 0 V, T = 25oC 600 - - V h DSS D GS J a ΔBV Breakdown Voltage Temperature n / ΔDTSS Coefficient ID = 250 μA, Referenced to 25oC - 0.6 - V/oC n J e I Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V - - 50 μA l U DSS VDS = 480 V, TC = 125oC - - 100 n IGSS Gate to Body Leakage Current VGS = ±25 V, VDS = 0 V - - ±10 μA iF E On Characteristics T T M V Gate Threshold Voltage V = V , I = 250 μA 3.0 - 5.0 V GS(th) GS DS D I RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 1.7 A - 1.9 2.5 Ω I M gFS Forward Transconductance VDS = 20 V, ID = 1.7 A - 3.4 - S O S Dynamic Characteristics F E Ciss Input Capacitance - 385 510 pF T V = 25 V, V = 0 V, C Output Capacitance DS GS - 40 60 pF oss f = 1 MHz C Reverse Transfer Capacitance - 3.7 5 pF rss Qg(tot) Total Gate Charge at 10V VDS = 480 V ID = 3.4 A, - 8.3 10.8 nC Qgs Gate to Source Gate Charge VGS = 10 V - 2.1 - nC Q Gate to Drain “Miller” Charge (Note 4) - 3.3 - nC gd Switching Characteristics t Turn-On Delay Time - 12.7 35.4 ns d(on) tr Turn-On Rise Time VDD = 300 V, ID = 3.4 A, - 15.1 40.2 ns V = 10 V, R = 25 Ω t Turn-Off Delay Time GS G - 30.2 70.4 ns d(off) tf Turn-Off Fall Time (Note 4) - 12.8 35.6 ns Drain-Source Diode Characteristics I Maximum Continuous Drain to Source Diode Forward Current - - 3.4 A S I Maximum Pulsed Drain to Source Diode Forward Current - - 13.6 A SM V Drain to Source Diode Forward Voltage V = 0 V, I = 3.4 A - - 1.4 V SD GS SD trr Reverse Recovery Time VGS = 0 V, ISD = 3.4 A, - 168 - ns Qrr Reverse Recovery Charge dIF/dt = 100 A/μs - 0.7 - μC Notes: 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. L = 31 mH, IAS = 3.4 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C. 3. ISD ≤ 3.4 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C. 4. Essentially independent of operating temperature typical characteristics. ©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D Typical Performance Characteristics D 4 N 6 0 Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics N Z 20 10 VGS = 10.0V *Notes: — 10 8.0V 1. VDS = 20V N 7.0V 2. 250μs Pulse Test 6.5V -C A] 6.0V A] h n Current[ 1 5.5V n Current[ 1 150oC 25oC annel ai ai U , DrD , DrD -55oC niF I 0.1 I E *Notes: T 1. 250μs Pulse Test T 0.02 2. TC = 25oC 0.1 IM 0.1 1 10 30 2 4 6 8 I M VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage[V] O S Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage F Drain Current and Gate Voltage Variation vs. Source Current E T and Temperature 4.5 40 4.0 ce A] 10 ]Ω, Resistan3.5 Current [ 150oC [R DS(ON)Source On-23..50 VGS = 10V erse Drain 1 25oC Drain-2.0 VGS = 20V , RevS *Notes: I 1. V = 0V GS 1.5 *Note: TC = 25oC 0.1 2. 250μs Pulse Test 0.0 1.5 3.0 4.5 6.0 7.5 9.0 0.0 0.4 0.8 1.2 1.6 ID, Drain Current [A] VSD, Body Diode Forward Voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 1000 10 V] VDS = 120V Ciss e [ 8 VDS = 300V ag VDS = 480V s [pF] 100 ce Volt 6 ance Coss Sour pacit 10 * N 1o. tVeG:S = 0V Gate- 4 Ca 2. f = 1MHz , S G V 2 Ciss = Cgs + Cgd (Cds = shorted) Crss Coss = Cds + Cgd Crss = Cgd *Note: ID = 3.4A 1 0 0.1 1 10 30 0.0 1.5 3.0 4.5 6.0 7.5 9.0 VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC] ©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D Typical Performance Characteristics D (Continued) 4 N 6 0 Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation N vs. Temperature vs. Temperature Z — 1.2 3.0 N e g - a e2.5 C olt nc h zed] wn V 1.1 zed] sista2.0 an BV, [NormaliDSSDrain-Source Breakdo 01..90 * N 1o. tVeGs:S = 0V R, [NormaliDS(on)Drain-Source On-Re011...505 * N 1o. tVeGs:S = 10V nel UniFET TM 2. ID = 250μA 2. ID = 1.7A II 0.8 0.0 M -100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200 O TJ, Junction Temperature [oC] TJ, Junction Temperature [oC] S F E Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current T vs. Case Temperature 30 4 V = 10V 10 30μs GS A] 100μs 3 urrent [ 1 1ms ent [A] Drain C Oisp Leirmatitioedn biny TRh DisS (Aonre)a 10DmCs ain Curr 2 , D Dr I 0.1 *Notes: I, D 1 1. TC = 25oC 2. TJ = 150oC RθJC = 1.1oC/W 3. Single Pulse 0.01 0 1 10 100 1000 25 50 75 100 125 150 VDS, Drain-Sou rce Voltage [V] TC, Case Temperature [oC] Figure 11. Transient Thermal Response Curve W] 2 C/ 1 o] ponse [[e ZθJC 0.5 esns 0.2 Z(t), Thermal RθThermal RespoJC 0.1 00S00...i.000n1521gle pulse * N 132oP... tZTDeDθJsMuJM:tCy -( tFT) aC=c =1tto 1.P1rt,o2D CDM/ =W* tZ 1Mθ/tJ2aCx(t.) 0.01 10-5 10-4 10-3 10-2 10-1 1 Rt1,e Rcteacntagnuglualra Pr uPluslese D Duurraattiioonn [[sseecc]] ©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D D 4 N 6 0 N Z — N - C h a n n e l U n i F E T IG = const. TM I I M O Figure 12. Gate Charge Test Circuit & Waveform S F E T VVDDSS RRLL VVDDSS 9900%% VVGGSS VVDDDD RR GG 1100%% VV V1100GVVS DDUUTT GGSS tt tt tt dd((oonn)) rr dd((ooffff)) tt ff tt tt oonn ooffff Figure 13. Resistive Switching Test Circuit & Waveforms V GS Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D D 4 N 6 0 N Z — DDUUTT ++ N - C h VV DDSS a n n __ e l U n II i SSDD F LLL E T T M DDrriivveerr II M RR GG O SSaammee TTyyppee S aass DDUUTT VVDDDD F E T VV GGSS ••ddvv//ddttccoonnttrroolllleedd bbyy RR GG ••II ccoonnttrroolllleedd bbyy ppuullssee ppeerriioodd SSDD GGGaaattteee PPPuuulllssseee WWWiiidddttthhh VVGGSS DDD ===------GGG------aaa------ttt---eee------ PPP------uuu------lll---sss---eee------ ---PPP------eee------rrr---iiiooo------ddd--- 1100VV (( DDrriivveerr )) II ,, BBooddyy DDiiooddee FFoorrwwaarrdd CCuurrrreenntt FFMM II SSDD (( DDUUTT )) ddii//ddtt II RRMM BBooddyy DDiiooddee RReevveerrssee CCuurrrreenntt VV DDSS (( DDUUTT )) BBooddyy DDiiooddee RReeccoovveerryyddvv//ddtt VV VV SSDD DDDD BBooddyy DDiiooddee FFoorrwwaarrdd VVoollttaaggee DDrroopp Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D Mechanical Dimensions D 4 N 6 0 N Z — N - C h a n n e l U n i F E T T M I I M O S F E T Figure 16. TO252 (D-PAK), Molded, 3-Lead, Option AA&AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif- ically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT252-003 ©2012 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDD4N60NZ Rev. C1

F D D 4 N 6 0 N Z TRADEMARKS — The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. N AccuPower™ F-PFS™ Sync-Lock™ - AX-CAP®* FRFET® ® ®* C BitSiC™ Global Power ResourceSM PowtmerTrench® h a Build it Now™ GreenBridge™ PowerXS™ TinyBoost® n CCoorreePPOLUWSE™R™ GGrreeeenn FFPPSS™™ e-Series™ PQrFoEgTra®mmable Active Droop™ TinyBuck® ne TinyCalc™ CCTRLO™SSVOLT™ GGmTOax™™ QQSui™et Series™ TinyLogic® l U Current Transfer Logic™ IntelliMAX™ RapidConfigure™ TINYOPTO™ n DEUXPEED® ISOPLANAR™ ™ TTiinnyyPPoWwMe™r™ iF Dual Cool™ Marking Small Speakers Sound Louder E EcoSPARK® and Better™ Saving our world, 1mW/W/kW at a time™ TinyWire™ T TranSiC™ EfficentMax™ MegaBuck™ SignalWise™ T ESBC®™ MMiIcCrRoFOECTO™UPLER™ SSmMaArRtMTa SxT™ART™ TTμSrRiFeUarEDuCelt sUD™ReRteEctN™T®* IIM MicroPak™ Solutions for Your Success™ Fairchild® MicroPak2™ SPM® M FFAaiCrcTh iQldu Sieet mSiecroiensd™uctor® MMiollteiorDnMrivaex™™ SSTupEeArLFTEHT™® UHC® OS FACT® mWSaver® SuperSOT™-3 Ultra FRFET™ F FAST® OptoHiT™ SuperSOT™-6 UniFET™ E FastvCore™ OPTOLOGIC® SuperSOT™-8 VCX™ T FETBench™ OPTOPLANAR® SupreMOS® VisualMax™ FPS™ SyncFET™ VoltagePlus™ XS™ *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Datasheet contains the design specifications for product development. Specifications Advance Information Formative / In Design may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Obsolete Not In Production Semiconductor. The datasheet is for reference information only. Rev. I66 ©2012 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com FDD4N60NZ Rev. C1

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