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F D www.onsemi.com C2 5 1 2 FDC2512  150V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed • 1.4 A, 150 V. R = 425 mΩ @ V = 10 V specifically to improve the overall efficiency of DC/DC DS(ON) GS R = 475 mΩ @ V = 6 V converters using either synchronous or conventional DS(ON) GS switching PWM controllers. It has been optimized for • High performance trench technology for extremely low gate charge, low R and fast switching speed. DS(ON) low R DS(ON) Applications • Low gate charge (8nC typ) • DC/DC converter • High power and current handling capability • Fast switching speed S D 1 6 D 2 5 G D 3 4 SuperSOT T M-6 D Absolute Maximum Ratings TA=25oC unless otherwise noted Symbol Parameter Ratings Units V Drain-Source Voltage 150 V DSS VGSS Gate-Source Voltage ± 20 V ID Drain Current – Continuous (Note 1a) 1.4 A – Pulsed 8 EAS Single Pulse Avalanche Energy ( N o t e 3 ) 13.5 mJ PD Maximum Power Dissipation (Note 1a) 1.6 W (Note 1b) 0.8 TJ, Tstg Operating and Storage Junction Temperature Range −55 to +150 °C Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .252 FDC2512 7’’ 8mm 3000 units Semico2nductor Components Industries, LLC, 2017 Publication Order Number: Mar ch, 2017, Rev. 1.4 FDC2512 1

Electrical Characteristics F TA = 25°C unless otherwise noted D Symbl Parameter Test Conditions Min Typ Max Units C 2 5 Off Characteristics 1 BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 150 V 2 ∆BVDSS Breakdown Voltage Temperature I = 250 µA, Referenced to 25°C 147 mV/°C ∆T Coefficient D J IDSS Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 µA I Gate–Body Leakage, Forward V = 20 V, V = 0 V 100 nA GSSF GS DS I Gate–Body Leakage, Reverse V = –20 V, V = 0 V –100 nA GSSR GS DS On Characteristics (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2 2.6 4 V ∆VGS(th) Gate Threshold Voltage ID = 250 µA, Referenced to 25°C –5.6 mV/°C ∆T Temperature Coefficient J Static Drain–Source VGS = 10 V, ID = 1.4 A 319 425 mΩ RDS(on) On Resistance VGS = 6.0 V, ID = 1.3 A 332 475 V = 10 V, I = 1.4 A, T = 125°C 624 875 GS D J I On–State Drain Current V = 10 V, V = 5 V 4 A D(on) GS DS g Forward Transconductance V = 10 V, I = 1.4 A 4 S FS DS D Dynamic Characteristics Ciss Input Capacitance VDS = 75 V, V GS = 0 V, 344 pF C Output Capacitance f = 1.0 MHz 22 pF oss C Reverse Transfer Capacitance 9 pF rss Rg Gate Resistance 0.1 1.4 3.0 Ω Switching Characteristics (Note 2) td(on) Turn–On Delay Time VDD = 75 V, ID = 1 A, 6.5 13 ns tr Turn–On Rise Time VGS = 10 V, RGEN = 6 Ω 3.5 7 ns t Turn–Off Delay Time 22 33 ns d(off) t Turn–Off Fall Time 4 8 ns f Qg Total Gate Charge VDS = 75 V, ID = 1.4 A, 8 11 nC Qgs Gate–Source Charge VGS = 10 V 1.5 nC Q Gate–Drain Charge 2.3 nC gd Drain–Source Diode Characteristics and Maximum Ratings I Maximum Continuous Drain–Source Diode Forward Current 1.3 A S VSD DVoraltiang–eS ource Diode Forward VGS = 0 V, IS = 1.3 A (Note 2) 0.8 1.2 V t Diode Reverse Recovery Time I = 1.4A, 45.8 nS rr F Qrr Diode Reverse Recovery Charge diF/dt = 300 A/µs (Note 2) 119 nC Notes: 1.RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when b) 156°C/W when mounted mounted on a 1in2 pad on a minimum pad of 2 oz of 2 oz copper copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. EAS of 13.5 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 3 A, VDD = 150 V, VGS = 10 V. www.onsemi.com 2

F D Typical Characteristics C 2 5 1 2 6 1.4 VGS = 10V 4.5V CE 6.0V AN1.3 RENT (A)4 4.0V MALIZEDN-RESIST1.2 VGS = 4.0V R RO I, DRAIN CUD2 R, NODS(ON)AIN-SOURCE 1.11 4.5V 5.0V 6.0V 10V R D 0.9 0 0 1 2 3 4 0 2 4 6 8 VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 2.2 0.8 NORMALIZEDCE ON-RESISTANCE11..48 VIDG S= =11.40AV ESISTANCE (OHM)000...567 TA = 125oC ID = 0.7A R, DS(ON) DRAIN-SOUR0.61 R, ON-RDS(ON)00..34 TA = 25oC 0.2 0.2 -50 -25 0 25 50 75 100 125 150 3 4 5 6 7 8 9 10 TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with Temperature. Gate-to-Source Voltage. 8 10 VDS = 25V TA = -55oC 125oC25oC T (A) 1 VGS = 0V RRENT (A) 6 N CURREN 0.1 TA = 125oC 25oC I, DRAIN CUD24 EVERSE DRAI 00.0.0011 -55oC R I, S 0 0.0001 2 3 4 5 6 0 0.2 0.4 0.6 0.8 1 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. www.onsemi.com 3

F D Typical Characteristics C 2 5 1 2 10 500 ATE-SOURCE VOLTAGE (V) 468 ID = 1.4A VDS = 50V 100V 75V CAPACITANCE (pF)234000000 CISS Vf G=S 1 =M 0H Vz V, GGS 2 100 COSS CRSS 0 0 0 1 2 3 4 5 6 7 8 9 0 25 50 75 100 125 150 Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 10 40 RDS(ON) LIMIT 100µs R (W) SRIθNJAG =L E1 5P6U°CLS/WE A) 1 1ms WE30 TA = 25°C CURRENT ( 0.1 DC11s001m0sms NSIENT PO20 I, DRAIN D 0.01 SRIθNJVTAG GA=L S= E1= 2 5 P156U0ooCCVL/SWE pk), PEAK TRA10 P( 0.001 0 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 1000 VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. CE 1 E N FECTIVESISTA D = 0.5 RRθJθAJ(At )= = 1 r5(t6)° +C /RWθJA FR 0.2 ZED ERMAL 0.1 0.1 P(pk) MALITHE 0.05 t1t2 ORNT TJ - TA = P * RθJA(t) r(t), NANSIE 0.002.01 SINGLE PULSE Duty Cycle, D = t1 / t2 R 0.01 T 0.0001 0.001 0.01 0.1 1 10 100 1000 t, TIME (sec) 1 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. www.onsemi.com 4

SYMM Dimensional Outline and Pad Layout C L C 0.95 0.95 3.00 A 2.80 6 4 1.00 MIN B 3.00 2.60 2.60 1.70 C 1.50 1 3 0.50 0.95 0.30 0.70 MIN 0.20 M A B 1.90 LAND PATTERN RECOMMENDATION (0.30) SEE DETAIL A 1.10 MAX H 1.00 0.70 C 0.20 0.10 0.08 0.00 0.10 C NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MO-193. VAR. AA, ISSUE E. B) ALL DIMENSIONS ARE IN MILLIMETERS. GAGE PLANE C PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.25mm PER END. PACKAGE WIDTH 0.25 DOES NOT INCLUDE INTERLEAD FLASH OR 8° PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25mm PER 0° SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS ARE DETERMINED AT DATUM H. 0.55 D) DRAWING FILE NAME: MKT-MA06AREVF 0.35 SEATING PLANE 0.60 REF DETAIL A SCALE: 50X ON Semiconductor and the ON Logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. www.onsemi.com 5

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