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F A N 7 3 July 2012 9 0 — H i g h - C FAN7390 u r r High-Current, High & Low-Side, Gate-Drive IC e n t , H i Features Description g h &  Floating Channels for Bootstrap Operation to +600V The FAN7390 is a monolithic high- and low-side gate-  Typically 4.5A/4.5A Sourcing/Sinking Current Driving drive IC, which can drive high speed MOSFETs and Lo Capability IGBTs that operate up to +600V. It has a buffered output w stage with all NMOS transistors designed for high pulse  Common-Mode dv/dt Noise Canceling Circuit S current driving capability and minimum cross-conduction. i  Built-in Under-Voltage Lockout for Both Channels d e  Matched Propagation Delay for Both Channels Fairchild’s high-voltage process and common-mode , G noise canceling techniques provide stable operation of  Logic (VSS) and Power (COM) Ground +/- 7V Offset a the high-side driver under high dv/dt noise circumstances. t  3.3V and 5V Input Logic Compatible e An advanced level shift circuit offers high-side gate driver -D  Output In-phase with Input operation up to V =-9.8V (typical) for V =15V. r S BS i v The UVLO circuit prevents malfunction when V and e DD Applications V are lower than the specified threshold voltage. IC BS  PDP Sustain Driver The high current and low output voltage drop feature  HID Lamp Ballast make this device suitable for the PDP sustain pulse  SMPS driver, motor driver, switching power supply, and high- power DC-DC converter applications.  Motor Driver 8-SOP 14-SOP Ordering Information Operating Part Number Package Packing Method Temperature Range FAN7390MX 8-SOP Tape & Reel -40C ~ 125C FAN7390M1X 14-SOP Tape & Reel © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6

F A Typical Application Circuit N 7 3 9 0 15V — H FAN7390 RBOOT ig Up to 600V h - DBOOT C HIN 1 HIN V 8 u B r r Controller e R1 Q1 n LIN 2 LIN HO 7 t, H CBOOT R2 ig h 3 COM V 6 S & L OUTPUT o 4 LO VDD 5 w Load S C1 i d R3 Q2 e , G a R4 t e - D FAN7390 Rev.01 r i v e Figure 1. Application Circuit for Half-Bridge (Referenced 8-SOP) I C 15V RBOOT DBOOT FAN7390M1 Up to 600V HIN 1 HIN NC 14 Controller LIN 2 LIN V 13 VSS B R1 Q1 3 V HO 12 SS CBOOT R2 4 NC V 11 S 5 COM NC 10 6 LO NC 9 OUTPUT 7 VDD NC 8 Load C1 R3 Q2 R4 FAN7390M1 Rev.03 Figure 2. Application Circuit for Half-Bridge (Referenced 14-SOP) © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 2

F A Internal Block Diagram N 7 3 9 0 — FAN7390 8 VB H i g UVLO h - C D HIN 1 GENEPU NOISE R R RIVER 7 HO urre RALS CANCELLER S Q n 200K TORE t, H 6 VS i g h & 5 VDD L o UVLO w D S LIN 2 DELAY VLSES/VCEOLM RIVE 4 LO id SHIFT R e , 200K G a 3 COM te - D r i v FAN7390 Rev.06 e I Figure 3. Functional Block Diagram (Referenced 8-SOP) C FAN7390M1 13 VB UVLO D HIN 1 GENEPU NOISE R R RIVER 12 HO RALS CANCELLER S Q TE 200K O R 11 VS 7 VDD UVLO D LIN 2 DELAY VLSES/VCEOLM RIVE 6 LO SHIFT R 200K V 3 5 COM SS Pin 4, 8, 9, 10 and 14 are no connection FAN7390M1 Rev.06 Figure 4. Functional Block Diagram (Referenced 14-SOP) © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 3

F A Pin Configurations N 7 3 9 0 — FAN7390M FAN7390M1 H i g h - C HIN 1 8 V HIN 1 14 NC u B r r e LIN 2 7 HO LIN 2 13 V n B FAN7390 t, H COM 3 6 VS VSS 3 12 HO ig h LO 4 5 VDD NC 4 FAN7390M1 11 VS & L o COM 5 10 NC w FAN7390 Rev.01 S LO 6 9 NC id e , VDD 7 8 NC G a t e - D FAN7390M1 Rev.01 r i v Figure 5. Pin Assignments (Top View) e I C Pin Definitions 8-Pin 14-Pin Name Description 1 1 HIN Logic Input for High-Side Gate Driver Output 2 2 LIN Logic Input for Low-Side Gate Driver Output 3 V Logic Ground (FAN7390M1 only) SS 3 5 COM Low-Side Driver Return 4 6 LO Low-Side Driver Output 5 7 V Low-Side and Logic Part Supply Voltage DD 6 11 V High-Voltage Floating Supply Return S 7 12 HO High-Side Driver Output 8 13 V High-Side Floating Supply B 4, 8, 9, 10, 14 NC No Connect © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 4

F A Absolute Maximum Ratings N 7 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera- 9 ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi- 0 tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The — absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified. H i Symbol Characteristics Min. Max. Unit g h VS High-Side Floating Supply Offset Voltage VB-25 VB+0.3 V -C u V High-Side Floating Supply Voltage -0.3 625.0 V B r r V High-Side Floating Output Voltage HO V -0.3 V +0.3 V e HO S B n t VDD Low-Side and Logic Fixed Supply Voltage -0.3 25.0 V , H VLO Low-Side Output Voltage LO -0.3 VDD+0.3 V ig h V Logic Input Voltage (HIN and LIN) V -0.3 V +0.3 V IN SS DD & VSS Logic Ground (FAN7390M1 only) VDD-25 VDD+0.3 V L o dV /dt Allowable Offset Voltage Slew Rate 50 V/ns S w 8-SOP 0.625 S PD(1)(2)(3) Power Dissipation 14-SOP 1.000 W id e 8-SOP 200 , G  Thermal Resistance, Junction-to-Ambient C/W JA 14-SOP 110 a t e T Junction Temperature +150 C - J D TSTG Storage Temperature +150 C riv e Notes: I C 1. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 2. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 3. Do not exceed P under any circumstances. D Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Unit V High-Side Floating Supply Voltage V +10 V +22 V B S S V High-Side Floating Supply Offset Voltage 6-V 600 V S DD V High-Side Output Voltage V V V HO S B V Low-Side and Logic Supply Voltage 10 22 V DD V Low-Side Output Voltage COM V V LO DD V Logic Input Voltage (HIN and LIN) V V V IN SS DD T Operating Ambient Temperature -40 +125 C A © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 5

F A Electrical Characteristics N 7 3 V (V , V )=15.0V, V =V =COM, T =25C, unless otherwise specified. The V , V , and I parameters are BIAS DD BS S SS A IL IH IN 9 referenced to V /COM and are applicable to the respective input signals HIN and LIN. The V and I parameters are 0 SS O O referenced to COM and VS is applicable to the respective output signals HO and LO. — Symbol Characteristics Test Condition Min. Typ. Max. Unit H i g POWER SUPPLY SECTION (V AND V ) DD BS h VDDUV+ VDD and VBS Supply Under-Voltage  8.0 8.8 9.8 -C V Positive-going Threshold u BSUV+ r VVDDUV- NVDeDg aatnivde -VgBoSin Sg uTphprleys Uhonldder-Voltage  7.4 8.3 9.0 V ren BSUV- t , VDDUVH VDD and VBS Supply Under-Voltage  0.5 H VBSUVH Lockout Hysteresis Voltage ig h I Offset Supply Leakage Current V =V =600V 50 LK B S & IQBS Quiescent VBS Supply Current VIN=0V or 5V 45 80 µA L I Quiescent V Supply Current V =0V or 5V 75 110 o QDD DD IN w I Operating V Supply Current f =20kHz, rms value 530 640 PBS BS IN S µA IPDD Operating VDD Supply Current fIN=20kHz, rms value 530 640 id e LOGIC INPUT SECTION (HIN, LIN) , G VIH Logic "1" Input Voltage 2.5 a V t V Logic "0" Input Voltage 1.2 e IL - D I Logic "1" Input Bias Current V =5V 25 50 IN+ IN µA ri I Logic "0" Input Bias Current V =0V 1.0 2.0 v IN- IN e RIN Input Pull-down Resistance 100 200 K IC GATE DRIVER OUTPUT SECTION (HO, LO) V High-level Output Voltage, V -V No Load 1.0 V OH BIAS O V Low-level Output Voltage, V No Load 35 mV OL O Output High, Short-circuit Pulsed I V =0V, V =5V with PW<10µs 3.5 4.5 O+ Current(4) O IN A Output Low, Short-circuit Pulsed V =15V, V =0V with I O IN 3.5 4.5 O- Current(4) PW<10µs Allowable Negative V Pin Voltage for V S -9.8 -7.0 V S HIN Signal Propagation to HO V - SS V -COM/COM-V Voltage Endurability -7.0 7.0 V COM SS SS Note: 4. This parameter guaranteed by design. Dynamic Electrical Characteristics V (V , V )=15.0V, V =V =COM=0V, C =1000pF and T =25C unless otherwise specified. BIAS DD BS S SS L A Symbol Characteristics Test Condition Min. Typ. Max. Unit t Turn-on Propagation Delay V =0V 140 200 on S t Turn-off Propagation Delay V =0V 140 200 off S MT Delay Matching, HS & LS Turn-on/off 0 50 ns t Turn-on Rise Time 25 50 r t Turn-off Fall Time 20 45 f © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 6

F A Typical Characteristics N 7 3 9 0 240 240 — 220 220 H 200 200 ig h 180 180 t [ns] ON 114600 t [ns] OFF 114600 -Curr e 120 120 n t 100 100 , H 80 80 i g 60 60 h -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 & Temperature [°C] Temperature [°C] L o Figure 6. Turn-on Propagation Delay Figure 7. Turn-off Propagation Delay w vs. Temperature vs. Temperature S i d e , G 40 40 a t e - 30 30 D r i v t [ns] R 20 t [ns] F 20 e IC 10 10 0 0 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 8. Turn-on Rise Time Figure 9. Turn-off Fall Time vs. Temperature vs. Temperature 50 50 40 40 T [ns] ON 30 T [ns] OFF 2300 M M 20 10 10 0 0 -10 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 10. Turn-on Delay Matching vs. Temperature Figure 11. Turn-off Delay Matching vs. Temperature © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 7

F A Typical Characteristics (Continued) N 7 3 9 0 — 140 120 H 120 100 ig h ]A 100 ]A 80 -C [ 80 [ u I QDD 60 I QBS 60 rre n 40 t 40 , H 20 20 ig h 0 0 & -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 L Temperature [°C] Temperature [°C] o w Figure 12. Quiescent V Supply Current Figure 13. Quiescent V Supply Current S DD BS i vs. Temperature vs. Temperature d e , G a 1000 1000 te - D r 800 800 iv []I A PDD 600 []I A PBS 600 e IC 400 400 200 200 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 14. Operating V Supply Current Figure 15. Operating V Supply Current DD BS vs. Temperature vs. Temperature. 9.5 9.0 9.0 8.5 V] V] V [DDUV+ 8.5 V [DDUV- 8.0 8.0 7.5 7.5 7.0 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 16. V UVLO+ vs. Temperature Figure 17. V UVLO- vs. Temperature DD DD © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 8

F A Typical Characteristics (Continued) N 7 3 9 0 — 9.5 9.0 H i g h 9.0 8.5 - V [V] BSUV+ 8.5 V [V] BSUV- 8.0 Curren t , 8.0 7.5 H i g h 7.5 7.0 & -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 L Temperature [°C] Temperature [°C] o w Figure 18. V UVLO+ vs. Temperature Figure 19. V UVLO- vs. Temperature S BS BS i d e , G a t 1500 20 e - D r 1200 i 10 v e mV] 900 mV] IC [OH [OL 0 V V 600 -10 300 0 -20 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 20. High-Level Output Voltage Figure 21. Low-Level Output Voltage vs. Temperature vs. Temperature 3.0 3.0 2.5 2.5 V] 2.0 V] 2.0 V [IH 1.5 V [IL 1.5 1.0 1.0 0.5 0.5 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 22. Logic High Input Voltage Figure 23. Low Input Voltage vs. Temperature vs. Temperature © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 9

F A Typical Characteristics (Continued) N 7 3 9 0 — 60 -7 H 50 ig -8 h 40 - C []I A IN+ 2300 V [V] S -1-09 urren t 10 , H -11 0 ig h -10 -12 & -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] L o w Figure 24. Logic Input High Bias Current Figure 25. Allowable Negative V Voltage S S i vs. Temperature vs. Temperature d e , G a t e - D r i v e I C . © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 10

F A Switching Time Definitions N 7 3 9 0 15V — HIN 1 HIN VB 8 H i g LIN 2 LIN HO 7 10µF 100nF h - C 1nF u 3 COM VS 6 r r e 15V n 4 LO VDD 5 t, 1nF H 10µF 100nF i g FAN7390 Rev.01 h & L o Figure 26. Switching Time Test Circuit (Referenced 8-SOP) w S i d HIN e LIN , G a t e HO - D LO r i v FAN7390 Rev.01 e I Figure 27. Input/Output Timing Diagram C HIN 50% 50% LIN ton tr toff tf 90% 90% HO LO 10% 10% FAN7390 Rev.01 Figure 28. Switching Time Waveform Definitions HIN 50% 50% LIN LO MT HO 10% 10% 90% 90% LO HO MT FAN7390 Rev.01 Figure 29. Delay Matching Waveform Definitions © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 11

F A Physical Dimensions N 7 3 9 0 — H i g h - C u r r e n t , H i g h & L o w S i d e , G a t e - D r i v e I C Figure 30. 8-Lead Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 12

F A Physical Dimensions (Continued) N 7 3 9 0 — H i g h - C u r r e n t , H i g h & L o w S i d e , G a t e - D r i v e I C Figure 31. 14-Lead Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 13

F A N 7 3 9 0 — H i g h - C u r r e n t , H i g h & L o w S i d e , G a t e - D r i v e I C © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.6 14

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