ESDAULC6-3BP6 ESDAULC6-3BF2 ESD protection for high speed interface Main applications Where transient overvoltage protection in ESD sensitive equipment is required, such as: ■ Computers ■ Printers ■ Communication systems SOT-666 Flip-Chip ESDAULC6-3BP6 ESDAULC6-3BF2 ■ Cellular phones handsets and accessories ■ Video equipment Figure 1. Functional diagram Features A B ■ Ultra low capacitance 1.25 pF max. I/O1 1 6 GND I/O1 GND 1 ■ Bi-directional protection NC 2 5 NC ■ RoHS package I/O2 3 4 I/O3 I/O2 I/O3 2 Description Top view Bump side view ESDAULC6-3BP6 ESDAULC6-3BF2 The ESDAULC6-3Bxx is a monolithic application specific discrete device dedicated to ESD Figure 2. Pin configuration protection of high speed interfaces such as USB2.0. I/O1 I/O2 I/O3 The device is ideal for applications where both reduced print circuit board space and power absorption capability are required. Benefits GND ■ Ultra low capacitance bidirectional ESD T able 1. Order codes protection Part number Marking ■ Low PCB space consumption: 2.5 mm2 max footprint (1.7 mm2 for Flip-Chip) ESDAULC6-3BP6 3 ■ Enhanced ESD protection: ESDAULC6-3BF2 3B – 15 kV contact discharge Complies with the following standards: – 15 kV air discharge IEC 61000-4-2 level 4: ■ No insertion loss to 3.0 GHz 8 kV (contact discharge) ■ Ultra low leakage current 15 kV (air discharge) ■ High reliability offered by monolithic integration MIL STD 883G-Method 3015-7: class 3B HBM (Human Body Model) July 2007 Rev 1 1/11 www.st.com 11

Characteristics ESDAULC6-3BP6, ESDAULC6-3BF2 1 Characteristics T able 2. Absolute maximum ratings Symbol Parameter Value (min.) Unit IEC 61000-4-2 contact discharge 15 V Peak pulse voltage (1) kV PP IEC 61000-4-2 air discharge 15 T Maximum operating junction temperature 150 °C j T Storage temperature range -55 to +150 °C stg T Maximum lead temperature for soldering during 10 s at 5 mm for case 260 °C L 1. For a surge greater than the maximum values, the diode will fail in short-circuit. T able 3. Electrical characteristics (T = 25° C) amb Symbol Parameter I V Stand-off voltage RM V Breakdown voltage BR V Clamping voltage CL VCLVBR VRM I Leakage current V RM IRM VRMVBRVCL I Peak pulse current PP αT Voltage temperature coefficient C Capacitance Slope:1/Rd IPP R Dynamic resistance d Parameter Test condition Min Typ Max Unit V (1) I = 1 mA 6.0 9.2 V BR R I V = 5 V 0.5 µA RM RM R Square pulse, I = 6 A, t = 2.5 µs 1.4 Ω d PP p αT 1.2 10-4/°C V = 0 V, SOT-666 1.0 1.25 I/O F = 1 MHz, VOSC = 30 mV Flip-Chip 1.25 1.5 C pF i/o-i/o V = 1.65 V, V = 4.3 V, SOT-666 0.75 0.9 I/O CC F = 1 MHz, VOSC = 400 mV Flip-Chip 0.9 1.20 1. Same value for I/O to I/O and I/O to GND 2/11

ESDAULC6-3BP6, ESDAULC6-3BF2 Characteristics F igure 3. Relative variation of peak pulse Figure 4. Relative variation of peak pulse power versus initial junction power versus initial junction temperature (SOT-666) temperature (Flip-Chip) 1.1 PPP[Tjinitial] / PPP[Tjinitial=25°C) 1.1 PPP[Tjinitial]/PPP[Tjinitial=25°C] 1.0 1.0 0.9 0.9 0.8 0.8 0.7 0.7 0.6 0.6 0.5 0.5 0.4 0.4 0.3 0.3 0.2 0.2 0.1 Tj(°C) 0.1 Tj(°C) 0.0 0.0 0 25 50 75 100 125 150 0 25 50 75 100 125 150 Figure 5. P eak pulse power versus Figure 6. Peak pulse power versus exponential pulse duration exponential pulse duration (SOT-666) (Flip-Chip) PPP(W) 1000 1000 PPP(W) Tjinitial=25°C Tjinitial = 25°C 100 100 tp(µs) 10 tP(µs) 10 1 10 100 1 10 100 Figure 7. C lamping voltage versus peak Figure 8. Clamping voltage versus peak pulse current (typical values) pulse current (typical values) (SOT-666) (Flip-Chip) 10.0 IPP(A) 10.0 IPP(A) 8/20µs Square wave Tjinitial=25°C 2.5µs Tjinitial =25°C 1.0 1.0 VCL(V) VCL(V) 0.1 0.1 5 10 15 20 25 30 5 10 15 20 25 30 3/11

Characteristics ESDAULC6-3BP6, ESDAULC6-3BF2 Figure 9. J unction capacitance versus Figure 10. Junction capacitance versus reverse voltage applied (typical reverse voltage applied (typical values) (SOT-666) values) (Flip-Chip) C(pF) C(pF) 2 1 F=1MHz VOSFCT==j=132M05m°HCVzRMS VOSTC=j=3205m°CVRMS 1 VLINE(V) VLINE(V) 0 0 0 1 2 3 4 5 0 1 2 3 4 5 Figure 11. R elative variation of leakage Figure 12. Relative variation of leakage current versus junction current versus junction temperature (typical values) temperature (typical values) (SOT-666) (Flip-Chip) IR[Tj] / IR[Tj=25°C] IR[Tj]/IR[Tj=25°C] 100 100 VR=5V VR=5V 10 10 Tj(°C) Tj(°C) 1 1 25 50 75 100 125 150 25 50 75 100 125 Figure 13. R emaining voltage after Figure 14. Remaining voltage after ESDAULC6-3BP6 during ESD ESDAULC6-3BF2 during ESD 15 kV positive surge (air 15 kV positive surge (air discharge) (SOT-666) discharge) (Flip-Chip) V/div V/div 10 10 0.1 µs/div 0.1 µs/div 4/11

ESDAULC6-3BP6, ESDAULC6-3BF2 Characteristics F igure 15. Remaining voltage after Figure 16. Remaining voltage after ESDAULC6-3BP6 during ESD ESDAULC6-3BF2 during ESD 15 kV negative surge (air 15 kV negative surge (air discharge) (SOT-666) discharge) (Flip-Chip) v v di di V/ V/ 0 0 1 1 0.1 µs/div 0.1 µs/div Figure 17. S 21 attenuation measurement Figure 18. S21 attenuation measurement results of each channel (SOT-666) results of channel 1 (Flip-Chip) dB dB 0.00 0.00 -5.00 -5.00 -10.00 -10.00 -15.00 -15.00 F (Hz) F (Hz) -20.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G -20.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Line 1 Line 2 Line 3 Line 1 Figure 19. A nalog crosstalk measurements Figure 20. Analog crosstalk measurements between channels (SOT-666) between channels (Flip-Chip) dB dB 0.00 0.00 -20.00 -20.00 -40.00 -40.00 -60.00 -60.00 -80.00 -80.00 -100.00 -100.00 -120.00 F (Hz) -120.00 F (Hz) -140.00 -140.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Xtalk 1/2 Xtalk 1/2 5/11

Application examples ESDAULC6-3BP6, ESDAULC6-3BF2 2 Application examples Figure 21. USB2.0 (high speed) protection application schematic R V O BUS T EC D+ N IC to Protect N O D- C 2.0 GND B S U Figure 22. Audio jack protection application schematic Audio jack 100pF FMTuner H n 0 3 3 Figure 23. SIM card protection application schematic OR RST T EC CLK SIM CARD N ON DATA PROCESSOR C RY GND O M E M 6/11

ESDAULC6-3BP6, ESDAULC6-3BF2 Ordering information scheme 3 Ordering information scheme ESDA ULC 6 - 3 B xx ESD Array Ultra low capacitance BreakdownVoltage 6 = 6Volts Number of lines protected 3 = 3 lines Type B = Bidirectional Packages F2 = Flip-Chip P6 = SOT-666 7/11

Package information ESDAULC6-3BP6, ESDAULC6-3BF2 4 Package information ● Epoxy meets UL 94, V0 T able 4. SOT-666 dimensions Dimensions b1 Ref. Millimeters Inches L1 Min. Typ. Max. Min. Typ. Max. A 0.45 0.60 0.018 0.024 L3 A3 0.08 0.18 0.003 0.007 b b 0.17 0.34 0.007 0.013 D E1 b1 0.19 0.27 0.34 0.007 0.011 0.013 D 1.50 1.70 0.059 0.067 A E 1.50 1.70 0.059 0.067 L2 E A3 E1 1.10 1.30 0.043 0.051 e 0.50 0.020 L1 0.19 0.007 L2 0.10 0.30 0.004 0.012 e L3 0.10 0.004 Figure 24. SOT-666 footprint (dimensions in mm) 0.50 0.62 2.60 0.99 0.30 8/11

ESDAULC6-3BP6, ESDAULC6-3BF2 Package information Figure 25. Flip-Chip dimensions 650 µm ± 65 500 µm ± 50 m µ m 1.0 mm ± 50 1.6 mm ± 50µ 1.1 mm ± 50 µm 315 µm ± 50 Figure 26. Flip-Chip footprint Figure 27. Flip-Chip marking Dot, ST logo Copper pad Diameter: xx = marking 220 µm recommended z = manufacturing location E yww = datecode So3ld3e0r µ smternecciol mopmeennindge:d (y = year x x z ww = week) Solder mask opening recommendation: y w w 300 µmrecommended Figure 28. Flip-Chip tape and reel specifications Dot identifying Pin A1 location Ø 1.5 +/- 0.1 4 +/- 0.1 1 .7 5 + /- 0 .1 3 .5 + 8 +/- 0.3 ywwxxzSTE ywwxxzSTE ywwxxzSTE /- 0.1 0.71 +/- 0.05 4 +/- 0.1 All dimensions in mm User direction of unreeling In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 9/11

Ordering information ESDAULC6-3BP6, ESDAULC6-3BF2 5 Ordering information T able 5. Ordering information Part number Marking Package Weight Base qty Delivery mode ESDAULC6-3BP6 3 SOT-666 2.9 mg 5000 Tape and reel ESDAULC6-3BF2 3B Flip-Chip 2.22 mg 5000 Tape and reel 6 Revision history T able 6. Revision history Datet Revision Changes 03-Jul-2007 1 Initial release 10/11

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