ESDALY Automotive dual Transil™ array for ESD protection Datasheet - production data Applications Where transient overvoltage protection in ESD sensitive equipment is required, such as:  Entertainment  Signal communications  Connectivity  Comfort and convenience Description SOT23-3L This device is a diode array designed to protect 1 line or 2 lines against ESD transients. The device is ideal for applications where both reduced line capacitance and board space saving Features are required  AEC-Q101 qualified It can also be used as bidirectional suppressor by  Dual unidirectional Transil functions connecting only pin 1 and 2.  Low leakage current: I max. < 20 µA at V R BR  300 W peak pulse power (8/20 µs) Figure 1: Functional diagram Benefits  High ESD protection level: up to 25 kV 1  High integration  Suitable for high density boards  AEC-Q101 qualified 3 Complies with the following standards  ISO 10605: C = 330 pF, R = 330 Ω  30 kV (air discharge) 2  30 kV (contact discharge)  ISO 7637-3 fast transient  Pulse a: V = -150 V S  Pulse b: V = +100 V S  ISO 7637-3 slow transient  Positive pulse: V = +85 V S  Negative pulse : V = -85 V S July 2017 DocID022075 Rev 2 1/12 This is information on a product in full production. www.st.com

Characteristics ESDALY 1 Characteristics Table 1: Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value Unit ISO 10605 (C = 330 pF, R = 330 Ω): Contact discharge 30 Air discharge 30 Vpp Peak pulse voltage(1) kV ISO 10605 (C = 150 pF, R = 330 Ω): Contact discharge 30 Air discharge 30 Ppp Peak pulse power (8/20 μs) 300 W ESDA5V3LY 25 ESDA6V1LY 18 Ipp Peak pulse current (8/20 μs) ESDA14V2LY 14 A ESDA25LY 7 ESDA37LY 6.3 Tj Operating junction temperature range -40 to 150 °C Tstg Storage junction temperature range -65 to 150 °C TL Maximum temperature for soldering during 10 s 260 °C Notes: (1)For a surge greater than the maximum values, the diode will fail in short-circuit. Figure 2: Electrical characteristics (definitions) I Symbol Parameter V = Breakdownvoltage IF BR V = Clampingvoltage CL V = Stand-offvoltage RM IRM = Leakagecurrent VBR VF I = Forwardcurrent Vcl VRM F V I = Peakpulsecurrent IRM PP I = Breakdowncurrent R V = Forwardvoltagedrop F C = Capacitance R = Dynamicimpedance Slope=1/Rd d IPP αT = Voltagetemperature 2/12 DocID022075 Rev 2

ESDALY Characteristics Table 2: Electrical characteristics (Tamb = 25 °C) VBR at IR IRM at VRM Rd(1) αT(2) Cline VF at IF Order code Min. Max. Max. Typ. Max. Typ. at 0 V bias Max. V V mA µA V mΩ 10-4/°C pF V mA ESDA5V3LY 5.3 5.9 1 2 3 280 5 220 1.25 200 ESDA6V1LY 6.1 7.2 1 20 5.25 350 6 140 1.25 200 ESDA14V2LY 14.2 15.8 1 5 12 650 11 90 1.25 200 ESDA25LY 25 30 1 1 24 1000 11 50 1.2 10 ESDA37LY 37 43.3 1 1 36 2400 11 48 0.9 10 Notes: (1)Square pulse Ipp = 15 A, tp = 2.5 µs (2)∆ VBR = αT x (Tamb -25 °C) x VBR (25 °C) DocID022075 Rev 2 3/12

Characteristics ESDALY 1.1 Characteristics (curves) Figure 3: Variation of peak pulse power versus Figure 4: Peak pulse power versus exponential initial junction temperature pulse duration PPP(W) PPP(W) 350 Tjinitial=25°C maximumvalue 300 1000 250 200 150 100 100 50 Tj(°C) 0 tp(µs) 25 50 75 100 125 150 175 10 10 100 1000 ESDA5V3LYESDA6V1LYESDA14V2LYESDA25LY ESDA37LY Figure 5: Variation of clamping voltage versus Figure 6: Relative variation of leakage current peak pulse current (max. values, 8/20 µs waveform) at VR = VRM versus junction values IPP(A) Ir(nA) 100 10000 Tjini8ti/a2l0=µs25°C ESDA5V3LY ESDA6V1LY 1000 ESDA14V2LY ESDA25LY 10 ESDA37LY 100 10 1 1 ESDA5V3LY ESDA6V1L 0.1 ESDA14V2LY ESDA25LY VCL(V) Tj(°C) ESDA37LY 0.1 0.01 0 10 20 30 40 50 60 25 50 75 100 125 150 4/12 DocID022075 Rev 2

ESDALY Characteristics Figure 7: ISO 7637-3 fast transient pulse a Figure 8: ISO 7637-3 fast transient pulse b response (VS = -150 V) response (VS = +100 V) 0.5V/div 10V/div 500mA/div 50ns/div 500mA/div 50ns/div 50ns/div 50ns/div Figure 9: ISO 7637-3 slow transient positive Figure 10: ISO 7637-3 slow transient negative pulse(VS = +85 V) pulse(VS = -85 V) 10V/div 10V/div 2A/div 5µs/div 5A/div 5µs/div 5µs/div 5µs/div DocID022075 Rev 2 5/12

Application and design guidelines ESDALY 2 Application and design guidelines Refer to STMicroelectronics application note:  AN2689: Protection of automotive electronics from electrical hazards, guidelines for design and component selection. 6/12 DocID022075 Rev 2

ESDALY Package information 3 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.  Epoxy meets UL 94,V0  Lead-free package 3.1 SOT23-3L mechanical data Figure 11: SOT23-3L package outline 0053390_I DocID022075 Rev 2 7/12

Package information ESDALY Table 3: SOT23-3L mechanical data mm Dim. Min. Typ. Max. A 0.89 1.40 A1 0 0.10 B 0.30 0.51 C 0.085 0.18 D 2.75 3.04 e 0.85 1.05 e1 1.70 2.10 E 1.20 1.75 H 2.10 3.00 L 0.60 S 0.35 0.65 L1 0.25 0.55 a 0° 8° Figure 12: SOT23-3L recommended footprint 0.48 0.95 2.89 0.97 0.99 SOT-23footp_I Dimensions are in mm. 8/12 DocID022075 Rev 2

ESDALY Recommendation on PCB assembly 4 Recommendation on PCB assembly 4.1 Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed. 4. Use solder paste with fine particles: powder particle size 20-45 µm. 4.2 Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ±0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 4.3 PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. DocID022075 Rev 2 9/12

Recommendation on PCB assembly ESDALY 4.4 Reflow profile Figure 13: ST ECOPACK® recommended soldering reflow profile for PCB mounting Minimize air convection currents in the reflow oven to avoid component movement. 10/12 DocID022075 Rev 2

ESDALY Ordering information 5 Ordering information Figure 14: Ordering information scheme ESDA XXX LY ESDArray Minimum breakdown voltage Package L = SOT23-3L Y =Automotive grade Table 4: Ordering information Order code Marking(1) Package Weight Base qty. Delivery mode ESDA5V3LY EL5Y ESDA6V1LY EL6Y 8.7 mg ESDA14V2LY EL1Y SOT23-3L 3000 Tape and reel ESDA25LY EL2Y ESDA37LY EL3Y 9.8 mg Notes: (1)The marking can be rotated by multiples of 90° to differentiate assembly location. 6 Revision history Table 5: Document revision history Date Revision Changes Initial version. This document merges and updates the content of 16-Feb-2012 1 the datasheet ESDA25LY Revision 1, 01-Feb-2010. 20-Jul-2017 2 Added ESDA37LY package information. DocID022075 Rev 2 11/12

ESDALY IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 12/12 DocID022075 Rev 2

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