数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
EMI4183MTTAG产品简介:
ICGOO电子元器件商城为您提供EMI4183MTTAG由ON Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 EMI4183MTTAG价格参考。ON SemiconductorEMI4183MTTAG封装/规格:共模扼流圈, 6 线 共模扼流圈 表面贴装 100mA DCR 8 欧姆(标准)。您可以下载EMI4183MTTAG参考资料、Datasheet数据手册功能说明书,资料中有EMI4183MTTAG 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
DC电阻(DCR) | 8 欧姆 |
描述 | IC FILTER COMMON MODE ESD 16WDFNEMI滤波珠子、芯片与阵列 COMMON MODE FILTER W ESD |
产品分类 | |
品牌 | ON Semiconductor |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | EMI滤波珠子、芯片与阵列,ON Semiconductor EMI4183MTTAG- |
数据手册 | |
产品型号 | EMI4183MTTAG |
PCN组件/产地 | |
产品 | EMI Filters, Common Mode |
产品种类 | EMI滤波珠子、芯片与阵列 |
其它名称 | EMI4183MTTAGOSDKR |
包装 | Digi-Reel® |
商标 | ON Semiconductor |
外壳宽度 | 2 mm |
外壳长度 | 4 mm |
外壳高度 | 0.5 mm |
大小/尺寸 | 0.157" 长 x 0.079" 宽(4.00mm x 2.00mm) |
安装类型 | 表面贴装 |
封装 | Reel |
封装/外壳 | 16-WFDFN 裸露焊盘 |
尺寸 | 2 mm W x 4 mm L x 0.5 mm H |
工作温度 | -40°C ~ 85°C |
工作温度范围 | - 40 C to + 85 C |
工厂包装数量 | 3000 |
截止频率 | 2 GHz |
最大直流电流 | 100 mA |
最大直流电阻 | 8 Ohms |
标准包装 | 1 |
滤波器类型 | 数据,信号线 |
电压额定值 | 5 V |
电容 | 0.9 pF |
电感 | - |
电流 | 100mA |
端接类型 | SMD/SMT |
系列 | EMI4183 |
线路数 | 6 |
阻抗 | - |
频率范围 | 800 MHz |
高度(最大值) | 0.031"(0.80mm) |
EMI4183 Common Mode Filter with ESD Protection Functional Description The EMI4183 is an integrated common mode filter providing both ESD protection and EMI filtering for high speed digital serial http://onsemi.com interfaces such as MIPI D-PHY. The EMI4183 provides protection for three differential data line MARKING pairs in a small RoHS-compliant WDFN16 package. DIAGRAMS Features 4TM(cid:2) • (cid:2) Highly Integrated Common Mode Filter (CMF) with ESD Protection provides protection and EMI reduction for systems using High Speed WDFN16 Serial Data Lines with cost and space savings over discrete solutions CASE 511BL • Large Differential Mode Bandwidth with Cutoff Frequency > 2 GHz • 4T = Specific Device Code High Common Mode Stop Band Attenuation: >25 dB at 700 MHz, M = Date Code >30 dB at 800 MHz (cid:2) = Pb−Free Package • Provides ESD Protection to IEC61000-4-2 Level 4, ±15 kV Contact (Note: Microdot may be in either location) Discharge • Low Channel Input Capacitance Provides Superior Impedance PIN CONNECTIONS Matching Performance • Low Profile Package with Small Footprint in WDFN16 2 x 4 mm In_1+ 1 16 Out_1+ Pb−Free Package • In_1− 2 15 Out_1− These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant GND 3 14 GND In_2+ 4 13 Out_2+ Applications • MIPI D-PHY (CSI-2, DSI, etc) in Mobile Phones and Digital Still In_2− 5 12 Out_2− Cameras GND 6 11 GND 1 16 In_3+ 7 10 Out_3+ 2 15 In_3− 8 9 Out_3− 4 13 (Top View) External (Connector)5 12 7 10 ORDERING INFORMATION 8 9 Device Package Shipping† Internal EMI4183MTTAG WDFN16 3000/Tape & Reel (ASIC) (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 3, 14 6, 11 Figure 1. EMI4183 Electrical Schematic © Semiconductor Components Industries, LLC, 2011 1 Publication Order Number: October, 2011 − Rev. 1 EMI4183/D
EMI4183 PIN FUNCTION DESCRIPTION Pin Name Pin No. Type Description In_1+ 1 I/O CMF Channel 1+ to Connector (External) In_1− 2 I/O CMF Channel 1− to Connector (External) Out_1+ 16 I/O CMF Channel 1+ to ASIC (Internal) Out_1− 15 I/O CMF Channel 1− to ASIC (Internal) In_2+ 4 I/O CMF Channel 2+ to Connector (External) In_2− 5 I/O CMF Channel 2− to Connector (External) Out_2+ 13 I/O CMF Channel 2+ to ASIC (Internal) Out_2− 12 I/O CMF Channel 2− to ASIC (Internal) In_3+ 7 I/O CMF Channel 3+ to Connector (External) In_3− 8 I/O CMF Channel 3− to Connector (External) Out_3+ 10 I/O CMF Channel 3+ to ASIC (Internal) Out_3− 9 I/O CMF Channel 3− to ASIC (Internal) GND 3, 14 GND Ground GND 6, 11 GND Ground ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Parameter Symbol Value Unit Operating Temperature Range TOP −40 to +85 °C Storage Temperature Range TSTG −65 to +150 °C Maximum Lead Temperature for Soldering Purposes TL 260 °C (1/8” from Case for 10 seconds) DC Current per Line ILINE 100 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2
EMI4183 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Unit ILEAK Channel Leakage Current TA = 25°C, VIN = 5 V, GND = 0 V 1.0 (cid:2)A VF Channel Negative Voltage TA = 25°C, IF = 10 mA 0.1 1.5 V CIN Channel Input Capacitance to Ground TA = 25°C, At 1 MHz, GND = 0 V, 0.8 1.3 pF (Pins 1,2,4,5,7,8 to Pins 3,6,11,14) VIN = 1.65 V RCH Channel Resistance 8.0 (cid:3) (Pins 1−16, 2−15, 4−13, 5−12, 7−10 & 8−9) f3dB Differential Mode Cut−off Frequency 50 (cid:3) Source and Load Termination 2.0 GHz Fatten Common Mode Stop Band Attenuation @ 800 MHz 30 dB VESD In−system ESD Withstand Voltage (Notes 1 and 2) kV a) Contact discharge per IEC 61000−4−2 ±15 standard, Level 4 (External Pins) b) Contact discharge per IEC 61000−4−2 ±2 standard, Level 1 (Internal Pins) VCL TLP Clamping Voltage Forward IPP = 8 A 12 V (See Figure 12) Forward IPP = 16 A 18 V Forward IPP = −8 A −6 V Forward IPP = −16 A −12 V RDYN Dynamic Resistance TA = 25°C, IPP = 1 A, tP = 8/20 (cid:2)s Positive Transients Any I/O pin to Ground; 1.36 Negative Transients Notes 1 and 3 0.6 VRWM Reverse Working Voltage (Note 3) 5.0 V VBR Breakdown Voltage IT = 1 mA; (Note 4) 5.6 9.0 V 1. Standard IEC61000−4−2 with CDischarge = 150 pF, RDischarge = 330, GND grounded. 2. These measurements performed with no external capacitor. 3. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 4. VBR is measured at pulse test current IT. http://onsemi.com 3
EMI4183 TYPICAL CHARACTERISTICS Figure 2. Differential Mode Attenuation vs. Figure 3. Common Mode Attenuation vs. Frequency (Zdiff = 100 (cid:2)) Frequency (Zcomm = 50 (cid:2)) Figure 4. Differential Return Loss vs. Frequency Figure 5. Differential Inter−Lane Cross−Coupling (Zdiff=100 (cid:2)) Figure 6. Common Mode Inter−Lane Cross−Coupling http://onsemi.com 4
EMI4183 MIPI DSI (D−PHY) MIPI DSI (D−PHY) Host Client EMI4183 Evaluation Board Figure 7. MIPI D−PHY LP Mode Test Setup Figure 8. EMI4183 MIPI D−PHY LP Mode Measured Results http://onsemi.com 5
EMI4183 Figure 9. EMI4183 Eye Diagram Test Setup Figure 10. EMI4183 Measured Eye Diagram @ 3.4Gbps (EVB through on left, EVB with EMI4183 on right) http://onsemi.com 6
EMI4183 Transmission Line Pulse (TLP) Measurements Transmission Line Pulse (TLP) provides current versus voltage (I-V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 11. TLP I-V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10 s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 12 where an 8 kV IEC61000-4-2 current waveform is compared with TLP current pulses at 8 and 16 A. A TLP curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. Typical TLP I-V curves for the EMI4183 are shown in Figure 13. L Attenuator 50 (cid:3) Coax Cable SW ÷ 50 (cid:3) Coax Cable IM VM 10 M(cid:3) VC DUT Oscilloscope Figure 11. Simplified Schematic of a Typical TLP System Figure 12. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP Waveforms Figure 13. Positive and Negative TLP Waveforms http://onsemi.com 7
EMI4183 ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to On Semiconductor Application Notes AND8307/D and AND8308/D. IEC61000−4−2 Waveform IEC61000−4−2 Spec. Ipeak Test First Peak Voltage Current Current at Current at 100% Level (kV) (A) 30 ns (A) 60 ns (A) 90% 1 2 7.5 4 2 2 4 15 8 4 I @ 30 ns 3 6 22.5 12 6 4 8 30 16 8 I @ 60 ns 10% tP = 0.7 ns to 1 ns ESD Gun Oscilloscope TVS 50 (cid:3) Cable 50 (cid:3) Figure 14. Diagram of ESD Test Setup 100 tr PEAK VALUE IRSM @ 8 (cid:2)s T 90 N E 80 PULSE WIDTH (tP) IS DEFINED R AS THAT POINT WHERE THE R U 70 PEAK CURRENT DECAY = 8 (cid:2)s C E 60 ULS 50 HALF VALUE IRSM/2 @ 20 (cid:2)s P K 40 A E P 30 F tP O 20 % 10 0 0 20 40 60 80 t, TIME ((cid:2)s) Figure 15. 8 x 20 (cid:3)s Pulse Waveform http://onsemi.com 8
EMI4183 Figure 16. ESD Clamping Voltage +8 kV per IEC6100−4−2 (external to internal pin) Figure 17. ESD Clamping Voltage −8 kV per IEC6100−4−2 (external to internal pin) D−PHY (CDI/DSI) EMI4183 D−PHY (CSI/DSI) Transmitter Receiver D0+ D0+ D0- D0- GND GND D0+ D0+ D0- D0- GND GND Clock+ Clock+ Clock- Clock- (Top View) Figure 18. EMI4183 MIPI D−PHY Application Diagram http://onsemi.com 9
EMI4183 PACKAGE DIMENSIONS WDFN16 4x2, 0.5P CASE 511BL−01 ISSUE O D A B L L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2X 0.10 C L1 23.. CDOIMNETNRSOIOLLNISN Gb ADPIMPELNIESSI OTNO: PMLIALLTIEMDETERS. TERMINAL AND IS MEASURED BETWEEN ÇÇÇÇ E 0.15 AND 0.30 MM FROM TERMINAL TIP. PIN 1 DETAIL A 4. COPLANARITY APPLIES TO THE EXPOSED REFERENCE ÇÇÇÇ ALTERNATE TERMINAL PAD AS WELL AS THE TERMINALS. CONSTRUCTIONS MILLIMETERS A3 DIM MIN MAX 2X 0.10 C TOP VIEW EXPOSED Cu MOLD CMPD A 0.70 0.80 ÉÉ ÉÇÉÇ A1 0.00 0.05 A3 0.20 REF 0.05 C DETAIL B (A3) ÇÇ b 0.15 0.25 A1 D 4.00 BSC E 2.00 BSC A DETAIL B e 0.50 BSC 0.05 C ALTERNATE L 0.70 0.90 CONSTRUCTIONS L1 0.05 0.15 NOTE 4 SIDE VIEW A1 C SEATING PLANE RECOMMENDED DETAIL A MOUNTING FOOTPRINT* 1 8 12X 01.33X0 POAUCTKLAINGEE 12X L 1.07 0.10 MIN 2.30 16 9 e 14X b 1 e/2 0.10 M C A B BOTTOM VIEW 0.05 M C NOTE 3 0.45 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5773−3850 Sales Representative http://onsemi.com EMI4183/D 10