DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 DS91M040 125 MHz Quad M-LVDS Transceiver CheckforSamples:DS91M040 FEATURES DESCRIPTION 1 • DC-125MHz/250MbpsLowJitter,Low The DS91M040 is a quad M-LVDS transceiver 2 designed for driving / receiving clock or data signals Skew,LowPowerOperation to/fromuptofourmultipointnetworks. • WideInputCommonModeVoltageRange Allowsupto±1VofGNDNoise M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology • ConformstoTIA/EIA-899M-LVDSStandard specifically designed for multipoint and multidrop • PinSelectableM-LVDSReceiverType(1or2) cable and backplane applications. It differs from • ControlledTransitionTimes(2.0nstyp) standard LVDS in providing increased drive current to MinimizeReflections handle double terminations that are required in multi- point applications. Controlled transition times • 8kVESDonM-LVDSI/Opinsprotects minimize reflections that are common in multipoint adjoiningcomponents configurations due to unterminated stubs. M-LVDS • Flow-ThroughPinoutSimplifiesPCBLayout devices also have a very large input common mode • Small5mmx5mmWQFN-32SpaceSaving voltage range for additional noise margin in heavily loadedandnoisybackplaneenvironments. Package A single DS91M040 channel is a half-duplex APPLICATIONS transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M- • Multidrop/MultipointClockandData LVDS signal levels. The receiver inputs accept low Distribution voltage differential signals (LVDS, BLVDS, M-LVDS, • High-Speed,LowPower,Short-Reach LVPECL and CML) and convert them to 3V LVCMOS AlternativetoTIA/EIA-485/422 signals. The DS91M040 supports both M-LVDS type • ClockDistributioninAdvancedTCA(ATCA) 1andtype2receiverinputs. andMicroTCA(μTCA,uTCA)Backplanes System Diagram Line Card in SLOT 1 Line Card in SLOT N-1 Line Card in SLOT N DS91M040 M-LVDS Receivers M-LVDS Receivers RT Z0 RT RT Z0 RT RT Z0 RT RT Z0 RT RT = ZLOADED BACKPLANE 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2008–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com Connection Diagram 1 FSEN GND VDD VDD RE1 DE1 RE0 DE0 2 1 0 9 8 7 6 5 3 3 3 2 2 2 2 2 RO0 1 24 B0 DI0 2 23 A0 RO1 3 22 B1 DAP DI1 4 21 A1 RO2 5 20 B2 (GND) DI2 6 19 A2 RO3 7 18 B3 DI3 8 17 A3 9 10 11 12 13 14 15 16 2 E D D 2 2 3 3 N D D D E E E E E M V V R D R D S F Logic Diagram FSEN1 DE0 B0 DI0 A0 RE0 RO0 DE1 B1 DI1 A1 RE1 RO1 MDE DE2 B2 DI2 A2 RE2 RO2 DE3 B3 DI3 A3 RE3 RO3 FSEN2 2 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 PINDESCRIPTIONS Number Name I/O,Type Description 1,3,5,7 RO O,LVCMOS Receiveroutputpin. 26,28,13,15 RE I,LVCMOS Receiverenablepin:WhenREishigh,thereceiverisdisabled.WhenREis low,thereceiverisenabled.Thereisa300kΩpullupresistoronthispin. 25,27,14,16 DE I,LVCMOS Driverenablepin:WhenDEislow,thedriverisdisabled.WhenDEishigh,the driverisenabled.Thereisa300kΩpulldownresistoronthispin. 2,4,6,8 DI I,LVCMOS Driverinputpin. 31,DAP GND Power Groundpinandpad. 17,19,21,23 A I/O,M-LVDS Non-invertingdriveroutputpin/Non-invertingreceiverinputpin 18,20,22,24 B I/O,M-LVDS Invertingdriveroutputpin/Invertingreceiverinputpin 11,12,29,30 V Power Powersupplypin,+3.3V±0.3V DD 32 FSEN1 I,LVCMOS Failsafeenablepinwitha300kΩpullupresistor.ThispinenablesType2 receiveroninputs0and2. FSEN1=L-->Type1receiverinputs FSEN1=H-->Type2receiverinputs 9 FSEN2 I,LVCMOS Failsafeenablepinwitha300kΩpullupresistor.ThispinenablesType2 receiveroninputs1and3. FSEN2=L-->Type1receiverinputs FSEN2=H-->Type2receiverinputs 10 MDE I,LVCMOS Masterenablepin.WhenMDEisH,thedeviceispoweredup.WhenMDEisL, thedeviceoverridesallothercontrolandpowersdown. M-LVDS Receiver Types The EIA/TIA-899 M-LVDS standard specifies two different types of receiver input stages. A type 1 receiver has a conventional threshold that is centered at the midpoint of the input amplitude, V /2. A type 2 receiver has a built ID in offset that is 100mV greater then V /2. The type 2 receiver offset acts as a failsafe circuit where open or short ID circuitsattheinputwillalwaysresultintheoutputstagebeingdriventoalowlogicstate. Type 1 Type 2 2.4 V High High 150 mV VID 50 mV xxxxxx 0 V -50 mV xxLowx Low -2.4 V Transition Region Figure1. M-LVDSReceiverInputThresholds Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS91M040

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com Absolute Maximum Ratings(1)(2) PowerSupplyVoltage −0.3Vto+4V LVCMOSInputVoltage −0.3Vto(V +0.3V) DD LVCMOSOutputVoltage −0.3Vto(V +0.3V) DD M-LVDSI/OVoltage −1.9Vto+5.5V M-LVDSOutputShortCircuitCurrentDuration Continuous JunctionTemperature +140°C StorageTemperatureRange −65°Cto+150°C LeadTemperatureRangeSoldering(4sec.) +260°C MaximumPackagePowerDissipation@+25°C RTVPackage 3.91W DerateRTVPackage 34mW/°Cabove+25°C PackageThermalResistance(4-Layer,2oz.Cu, θ +29.4°C/W JA JEDEC) θ +2.8°C/W JC ESDSusceptibility HBM(3) ≥8kV MM(4) ≥250V CDM(5) ≥1250V (1) “AbsoluteMaximumRatings”indicatelimitsbeyondwhichdamagetothedevicemayoccur,includinginoperabilityanddegradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximumRatingsor otherconditionsbeyondthoseindicatedintheRecommendedOperatingConditionsisnotimplied.TheRecommendedOperating Conditionsindicateconditionsatwhichthedeviceisfunctionalandthedeviceshouldnotbeoperatedbeyondsuchconditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityandspecifications. (3) HumanBodyModel,applicablestd.JESD22-A114C (4) MachineModel,applicablestd.JESD22-A115-A (5) FieldInducedChargeDeviceModel,applicablestd.JESD22-C101-C Recommended Operating Conditions Min Typ Max Units SupplyVoltage,V 3.0 3.3 3.6 V DD VoltageatAnyBusTerminal(SeparateorCommon-Mode) −1.4 +3.8 V DifferentialInputVoltageV 2.4 V ID LVTTLInputVoltageHighV 2.0 V V IH DD LVTTLInputVoltageLowV 0 0.8 V IL OperatingFreeAirTemperatureT −40 +25 +85 °C A 4 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 DC Electrical Characteristics(1)(2)(3)(4) Overrecommendedoperatingsupplyandtemperaturerangesunlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units M-LVDSDriver |V | Differentialoutputvoltagemagnitude R =50Ω,C =5pF 480 650 mV AB L L ΔV Changeindifferentialoutputvoltagemagnitude Figure2 AB −50 0 +50 mV betweenlogicstates Figure4 V Steady-statecommon-modeoutputvoltage R =50Ω,C =5pF 0.3 1.6 2.1 V OS(SS) L L |ΔV | Changeinsteady-statecommon-modeoutputvoltage Figure2 OS(SS) 0 +50 mV betweenlogicstates Figure3 V Maximumsteady-stateopen-circuitoutputvoltage Figure5 0 2.4 V A(OC) V Maximumsteady-stateopen-circuitoutputvoltage 0 2.4 V B(OC) V Voltageovershoot,low-to-highleveloutput(5) R =50Ω,C =5pF,C =0.5pF 1.2V V P(H) L L D SS V Voltageovershoot,high-to-lowleveloutput(5) Figure7 −0.2V P(L) Figure8 V SS I High-levelinputcurrent(LVTTLinputs) V =3.6V -15 15 μA IH IH I Low-levelinputcurrent(LVTTLinputs) V =0.0V -15 15 μA IL IL V InputClampVoltage(LVTTLinputs) I =-18mA -1.5 V CL IN I Differentialshort-circuitoutputcurrent(6) Figure6 -43 43 mA OS M-LVDSReceiver V Positive-goingdifferentialinputvoltagethreshold SeeTruthTables Type1 16 50 mV IT+ Type2 100 150 mV V Negative-goingdifferentialinputvoltagethreshold SeeTruthTables Type1 −50 20 mV IT− Type2 50 94 mV V High-leveloutputvoltage(LVTTLoutput) I =−8mA 2.4 2.7 V OH OH V Low-leveloutputvoltage(LVTTLoutput) I =8mA 0.28 0.4 V OL OL I TRI-STATEoutputcurrent V =0Vor3.6V −10 10 μA OZ O I Short-circuitreceiveroutputcurrent(LVTTLoutput) V =0V -50 -90 mA OSR O (1) TheElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommendedOperatingConditionsexceptas otherwisemodifiedorspecifiedbytheElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Currentintodevicepinsisdefinedaspositive.Currentoutofdevicepinsisdefinedasnegative.Allvoltagesarereferencedtoground exceptV andΔV . OD OD (3) TypicalvaluesrepresentmostlikelyparametricnormsforV =+3.3VandT =+25°C,andattheRecommendedOperationConditions DD A atthetimeofproductcharacterizationandarenotspecified. (4) C includesfixturecapacitanceandC includesprobecapacitance. L D (5) Specificationisensuredbycharacterizationandisnottestedinproduction. (6) Outputshortcircuitcurrent(I )isspecifiedasmagnitudeonly,minussignindicatesdirectiononly. OS Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS91M040

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com DC Electrical Characteristics(1)(2)(3)(4) (continued) Overrecommendedoperatingsupplyandtemperaturerangesunlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units M-LVDSBus(InputandOutput)Pins I Transceiverinput/outputcurrent V =3.8V,V =1.2V 32 µA A A B V =0Vor2.4V,V =1.2V −20 +20 µA A B V =−1.4V,V =1.2V −32 µA A B I Transceiverinput/outputcurrent V =3.8V,V =1.2V 32 µA B B A V =0Vor2.4V,V =1.2V −20 +20 µA B A V =−1.4V,V =1.2V −32 µA B A I Transceiverinput/outputdifferentialcurrent(I −I ) V =V ,−1.4V≤V≤3.8V −4 +4 µA AB A B A B I Transceiverinput/outputpower-offcurrent V =3.8V,V =1.2V, A(OFF) A B DE=0V 32 µA 0V≤V ≤1.5V DD V =0Vor2.4V,V =1.2V, A B DE=0V −20 +20 µA 0V≤V ≤1.5V DD V =−1.4V,V =1.2V, A B DE=0V −32 µA 0V≤V ≤1.5V DD I Transceiverinput/outputpower-offcurrent V =3.8V,V =1.2V, B(OFF) B A DE=0V 32 µA 0V≤V ≤1.5V DD V =0Vor2.4V,V =1.2V, B A DE=0V −20 +20 µA 0V≤V ≤1.5V DD V =−1.4V,V =1.2V, B A DE=0V −32 µA 0V≤V ≤1.5V DD I Transceiverinput/outputpower-offdifferentialcurrent V =V ,−1.4V≤V≤3.8V, AB(OFF) A B (I −I ) DE=0V −4 +4 µA A(OFF) B(OFF) 0V≤V ≤1.5V DD C Transceiverinput/outputcapacitance V =OPEN 7.8 pF A DD C Transceiverinput/outputcapacitance 7.8 pF B C Transceiverinput/outputdifferentialcapacitance 3 pF AB C Transceiverinput/outputcapacitancebalance(C /C ) 1 A/B A B SUPPLYCURRENT(V ) CC I DriverSupplyCurrent R =50Ω,DE=H,RE=H 67 75 mA CCD L I TRI-STATESupplyCurrent DE=L,RE=H 22 26 mA CCZ I ReceiverSupplyCurrent DE=L,RE=L 32 38 mA CCR I PowerDownSupplyCurrent MDE=L 3 5 mA CCPD 6 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 Switching Characteristics(1)(2)(3) Overrecommendedoperatingsupplyandtemperaturerangesunlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units DRIVERACSPECIFICATIONS t DifferentialPropagationDelayLowtoHigh R =50Ω,C =5pF, 1.5 3.3 5.5 ns PLH L L t DifferentialPropagationDelayHightoLow C =0.5pF 1.5 3.3 5.5 ns PHL D t PulseSkew(4)(5) Figure7 30 125 ps SKD1 Figure8 t Channel-to-ChannelSkew(4)(6) 100 200 ps SKD2 t Part-to-PartSkew(4)(7) 0.8 1.6 ns SKD3 t Part-to-PartSkew(4)(8) 4 ns SKD4 t RiseTime(4) 1.2 2.0 3.0 ns TLH t FallTime(4) 1.2 2.0 3.0 ns THL t EnableTime(ZtoActiveHigh) R =50Ω,C =5pF, 7.5 11.5 ns PZH L L t EnableTime(ZtoActiveLow) C =0.5pF 8.0 11.5 ns PZL D t DisableTime(ActiveLowtoZ) Figure9 7.0 11.5 ns PLZ Figure10 t DisableTime(ActiveHightoZ) 7.0 11.5 ns PHZ RECEIVERACSPECIFICATIONS t PropagationDelayLowtoHigh C =15pF 1.5 3.0 4.5 ns PLH L t PropagationDelayHightoLow Figure11 1.5 3.1 4.5 ns PHL Figure12 Figure13 t PulseSkew(ReceiverType1)(4)(5) 55 325 ps SKD1A t PulseSkew(ReceiverType2)(4)(5) 475 800 ps SKD1B t Channel-to-ChannelSkew(4)(6) 60 300 ps SKD2 t Part-to-PartSkew(4)(7) 0.6 1.2 ns SKD3 t Part-to-PartSkew(8) 3 ns SKD4 t RiseTime(4) 0.3 1.1 1.6 ns TLH t FallTime(4) 0.3 0.65 1.6 ns THL t EnableTime(ZtoActiveHigh) R =500Ω,C =15pF 3 5.5 ns PZH L L t EnableTime(ZtoActiveLow) Figure14 3 5.5 ns PZL Figure15 t DisableTime(ActiveLowtoZ) 3.5 5.5 ns PLZ t DisableTime(ActiveHightoZ) 3.5 5.5 ns PHZ GENERICACSPECIFICATIONS t WakeUpTime(4) 500 ms WKUP (MasterDeviceEnable(MDE)time) f MaximumOperatingFrequency(4) 125 MHz MAX (1) TheElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommendedOperatingConditionsexceptas otherwisemodifiedorspecifiedbytheElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) TypicalvaluesrepresentmostlikelyparametricnormsforV =+3.3VandT =+25°C,andattheRecommendedOperationConditions DD A atthetimeofproductcharacterizationandarenotspecified. (3) C includesfixturecapacitanceandC includesprobecapacitance. L D (4) Specificationisensuredbycharacterizationandisnottestedinproduction. (5) t ,|t −t |,PulseSkew,isthemagnitudedifferenceindifferentialpropagationdelaytimebetweenthepositivegoingedgeand SKD1 PLHD PHLD thenegativegoingedgeofthesamechannel. (6) t ,Channel-to-ChannelSkew,isthedifferenceinpropagationdelay(t ort )amongalloutputchannels. SKD2 PLHD PHLD (7) t ,Part-to-PartSkew,isdefinedasthedifferencebetweentheminimumandmaximumdifferentialpropagationdelays.This SKD3 specificationappliestodevicesatthesameV andwithin5°Cofeachotherwithintheoperatingtemperaturerange. DD (8) t ,Part-to-PartSkew,isthedifferentialchannel-to-channelskewofanyeventbetweendevices.Thisspecificationappliestodevices SKD4 overrecommendedoperatingtemperatureandvoltageranges,andacrossprocessdistribution.t isdefinedas|Max−Min| SKD4 differentialpropagationdelay. Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS91M040

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com Test Circuits and Waveforms Figure2. DifferentialDriverTestCircuit A ~ 1.9V B ~ 1.3V ’VOS(SS) VOS VOS(PP) Figure3. DifferentialDriverWaveforms Figure4. DifferentialDriverFullLoadTestCircuit Figure5. DifferentialDriverDCOpenTestCircuit 8 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 Figure6. DifferentialDriverShort-CircuitTestCircuit Figure7. DriverPropagationDelayandTransitionTimeTestCircuit Figure8. DriverPropagationDelaysandTransitionTimeWaveforms Figure9. DriverTRI-STATEDelayTestCircuit Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS91M040

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com Figure10. DriverTRI-STATEDelayWaveforms Figure11. ReceiverPropagationDelayandTransitionTimeTestCircuit Figure12. Type1ReceiverPropagationDelayandTransitionTimeWaveforms 10 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 Figure13. Type2ReceiverPropagationDelayandTransitionTimeWaveforms Figure14. ReceiverTRI-STATEDelayTestCircuit Figure15. ReceiverTRI-STATEDelayWaveforms TRUTH TABLES DS91M040 Transmitting(1) Inputs Outputs RE DE DI B A X H H L H X H L H L X L X Z Z (1) X—Don'tcarecondition Z—Highimpedancestate Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS91M040

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com DS91M040 as Type 1 Receiving(1) Inputs Output FSEN RE DE A−B RO L L X ≥+0.05V H L L X ≤−0.05V L L L X −0.05V Undefined ≤A-B≤+0.05V L H X X Z (1) X—Don'tcarecondition Z—Highimpedancestate DS91M040 as Type 2 Receiving(1) Inputs Output FSEN RE DE A−B RO H L X ≥+0.15V H H L X ≤+0.05V L H L X +0.05V Undefined ≤A-B≤+0.15V H H X X Z (1) X—Don'tcarecondition Z—Highimpedancestate DS91M040 Type 1 Receiver Input Threshold Test Voltages(1) AppliedVoltages ResultingDifferentialInputVoltage ResultingCommon-ModeInput ReceiverOutput Voltage V V V V R IA IB ID ICM 2.400V 0.000V 2.400V 1.200V H 0.000V 2.400V −2.400V 1.200V L 3.800V 3.750V 0.050V 3.775V H 3.750V 3.800V −0.050V 3.775V L −1.350V −1.400V 0.050V −1.375V H −1.400V −1.350V −0.050V −1.375V L (1) H—HighLevel L—LowLevel Outputstateassumesthatthereceiverisenabled(RE=L) DS91M040 Type 2 Receiver Input Threshold Test Voltages(1) AppliedVoltages ResultingDifferentialInputVoltage ResultingCommon-ModeInput ReceiverOutput Voltage V V V V R IA IB ID IC 2.400V 0.000V 2.400V 1.200V H 0.000V 2.400V −2.400V 1.200V L 3.800V 3.650V 0.150V 3.725V H 3.800V 3.750V 0.050V 3.775V L −1.250V −1.400V 0.150V −1.325V H −1.350V −1.400V 0.050V −1.375V L (1) H—HighLevel L—LowLevel Outputstateassumesthatthereceiverisenabled(RE=L) 12 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 Typical Performance Characteristics 2.8 2.8 s) f = 125 MHz VCC = 3.0 V s) f = 125 MHz VCC = 3.0 V n 2.5 n 2.5 %) ( %) ( 0 0 9 2.2 9 2.2 0- 0- 1 1 E ( E ( M 1.9 M 1.9 TI TI SE VCC = 3.6 V LL VCC = 3.6 V RI 1.6 FA 1.6 ER VCC = 3.3 V ER VCC = 3.3 V V V RI 1.3 RI 1.3 D D 1.0 1.0 -50 -10 30 70 110 150 -50 -10 30 70 110 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure16.DriverRiseTimeasaFunctionofTemperature Figure17.DriverFallTimeasaFunctionofTemperature DE (mV) 970500 LHD) (ns) 44..50 f = 125 MHz VCC = 3.0 V U P PLIT 600 AY (t 3.5 M L UT A 450 N DE 3.0 P O UT ATI VCC = 3.6 V O G R 300 f = 1 MHz A 2.5 E P VCC = 3.3 V VOD - DRIV 1500 VTCAC = = 2 35.°3CV RIVER PRO 21..05 0 25 50 75 100 125 D -50 -10 30 70 110 150 RESISTIVE LOAD (:) TEMPERATURE (°C) Figure18.DriverOutputSignalAmplitudeasaFunctionof Figure19.DriverPropagationDelay(tPLHD)asaFunction ResistiveLoad ofTemperature HLD) (ns) 44..50 f = 125 MHz VCC = 3.0 V NT (mA) 118500 P E AY (t 3.5 URR 120 L C ON DE 3.0 PPLY 90 f = 125 MHz GATI VCC = 3.6 V R SU VCC = 3.3V ROPA 2.5 VCC = 3.3 V POWE 60 RL = 5T0A: =(cid:3)(cid:11) O25n° Call CH)(cid:3) R P 2.0 ER 30 DE0,1,2,3 = H RIVE 1.5 DRIV 0 RE*0,1,2,3 = H D -50 -10 30 70 110 150 0 25 50 75 100 125 TEMPERATURE (°C) FREQUENCY (MHz) Figure20.DriverPropagationDelay(tPHLD)asaFunction Figure21.DriverPowerSupplyCurrentasaFunctionof ofTemperature Frequency Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:DS91M040

DS91M040 SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 www.ti.com Typical Performance Characteristics (continued) CURRENT (mA) 976050 AY (tPLHD) (ns) 333...852 VfV IT=DCA 1C= =2 2= 520 35M0.° 3CHmVzV TYPE 2 Y EL L D UPP 45 ON 2.9 S TI R f = 125 MHz A E G EIVER POW 3105 RDVETEC*A00C ,=,1 1=, ,222 ,35,33.° 3C ==V LL VER PROPA 22..63 TYPE 1 REC 00 25 50 75 100 125 ECEI 2.0-4.0 -2.4 -0.8 0.8 2.4 4.0 R FREQUENCY (MHz) INPUT COMMON MODE VOLTAGE (V) Figure22.ReceiverPowerSupplyCurrentasaFunctionof Figure23.ReceiverPropagationDelay(tPLHD)asa Frequency FunctionofInputCommonModeVoltage s) 3.8 n D) ( f = 125 MHz HL 3.5 VCC = 3.3V AY (tP 3.2 VITDA = = 2 2050° CmV TYPE 2 L E D ON 2.9 TI A G A 2.6 P O R P 2.3 R TYPE 1 E V EI 2.0 C E -4.0 -2.4 -0.8 0.8 2.4 4.0 R INPUT COMMON MODE VOLTAGE (V) Figure24.ReceiverPropagationDelay(tPHLD)asaFunctionofInputCommonModeVoltage 14 SubmitDocumentationFeedback Copyright©2008–2013,TexasInstrumentsIncorporated ProductFolderLinks:DS91M040

DS91M040 www.ti.com SNLS283M–FEBRUARY2008–REVISEDAPRIL2013 REVISION HISTORY ChangesfromRevisionL(April2013)toRevisionM Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 14 Copyright©2008–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:DS91M040

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) DS91M040TSQ/NOPB ACTIVE WQFN RTV 32 1000 Green (RoHS SN Level-3-260C-168 HR -40 to 85 M040TS & no Sb/Br) DS91M040TSQE/NOPB ACTIVE WQFN RTV 32 250 Green (RoHS SN Level-3-260C-168 HR -40 to 85 M040TS & no Sb/Br) DS91M040TSQX/NOPB ACTIVE WQFN RTV 32 4500 Green (RoHS SN Level-3-260C-168 HR -40 to 85 M040TS & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-May-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) DS91M040TSQ/NOPB WQFN RTV 32 1000 178.0 12.4 5.3 5.3 1.3 8.0 12.0 Q1 DS91M040TSQE/NOPB WQFN RTV 32 250 178.0 12.4 5.3 5.3 1.3 8.0 12.0 Q1 DS91M040TSQX/NOPB WQFN RTV 32 4500 330.0 12.4 5.3 5.3 1.3 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-May-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) DS91M040TSQ/NOPB WQFN RTV 32 1000 210.0 185.0 35.0 DS91M040TSQE/NOPB WQFN RTV 32 250 210.0 185.0 35.0 DS91M040TSQX/NOPB WQFN RTV 32 4500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE RTV0032A WQFN - 0.8 mm max height SCALE 2.500 PLASTIC QUAD FLATPACK - NO LEAD 5.15 B A 4.85 PIN 1 INDEX AREA 5.15 4.85 0.8 0.7 C SEATING PLANE 0.05 0.08 C 0.00 2X 3.5 EXPOSED SYMM (0.1) TYP THERMAL PAD 9 16 8 17 SYMM 33 2X 3.5 3.1 0.1 28X 0.5 1 24 0.30 32X PIN 1 ID 32 25 0.18 0.1 C A B 0.5 32X 0.05 0.3 4224386/B 04/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT RTV0032A WQFN - 0.8 mm max height PLASTIC QUAD FLATPACK - NO LEAD (3.1) SYMM 32 25 SEE SOLDER MASK DETAIL 32X (0.6) 1 32X (0.24) 24 28X (0.5) (3.1) 33 SYMM (4.8) (1.3) 8 17 (R0.05) TYP ( 0.2) TYP 9 16 VIA (1.3) (4.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X 0.07 MIN 0.07 MAX ALL AROUND ALL AROUND METAL UNDER METAL EDGE SOLDER MASK EXPOSED METAL SOLDER MASK EXPOSED SOLDER MASK OPENING METAL OPENING NON SOLDER MASK DEFINED SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS 4224386/B 04/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN RTV0032A WQFN - 0.8 mm max height PLASTIC QUAD FLATPACK - NO LEAD (0.775) TYP 32 25 32X (0.6) 32X (0.24) 1 24 28X (0.5) (0.775) TYP 33 SYMM (4.8) (R0.05) TYP 4X (1.35) 8 17 9 16 4X (1.35) SYMM (4.8) SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 20X EXPOSED PAD 33 76% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE 4224386/B 04/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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