User's Guide SLAU279A–March2009–RevisedNovember2009 DAC9881 Evaluation Module This user’s guide describes the characteristics, operation, and the use of the DAC9881 Evaluation Module (EVM). It covers all pertinent areas involved to properly use this EVM board along with the devices that it supports.ThephysicalPCBlayout,schematicdiagram,andcircuitdescriptionsareincluded. Contents 1 EVMOverview............................................................................................................... 2 1.1 Features ............................................................................................................. 2 1.2 PowerRequirements .............................................................................................. 2 1.3 EVMBasicFunctions .............................................................................................. 3 2 PCBDesignandPerformance ............................................................................................ 4 2.1 PCBLayout ......................................................................................................... 4 3 EVMPerformance .......................................................................................................... 7 4 BillofMaterials .............................................................................................................. 9 5 EVMOperation ............................................................................................................ 10 5.1 FactoryDefaultSetting .......................................................................................... 10 5.2 HostProcessorInterface ........................................................................................ 11 5.3 DigitalControlInterface .......................................................................................... 11 5.4 AnalogOutput ..................................................................................................... 12 5.5 JumperSetting .................................................................................................... 14 5.6 DAC9881EVMSchematic ....................................................................................... 16 6 UsingtheDAC9881EVMwithDXP ..................................................................................... 16 6.1 Hardware .......................................................................................................... 16 6.2 MMB0PowerSupplies........................................................................................... 17 6.3 Software–RunningDXP ........................................................................................ 18 7 RelatedDocumentationFromTexasInstruments..................................................................... 19 ListofFigures 1 BlockDiagram............................................................................................................... 4 2 TopSilkscreen............................................................................................................... 5 3 Layer1,TopSignalPlane................................................................................................. 6 4 Layer2,GroundPlane..................................................................................................... 6 5 Layer3,PowerPlane ...................................................................................................... 7 6 Layer4,BottomSignalPlane............................................................................................. 7 7 BottomSilkscreen........................................................................................................... 7 8 INLandDNLCharacteristicPlot.......................................................................................... 8 9 DAC9881EVMDefaultJumperConfiguration......................................................................... 10 10 MMB0withDAC9881EVMInstalled.................................................................................... 17 11 LoadingtheDAC9881EVMINIFile..................................................................................... 18 12 DAC9881–Frequency/AmplitudeandGPIOControlOptions...................................................... 19 ListofTables 1 PartsLists.................................................................................................................... 9 2 FactoryDefaultJumperSetting.......................................................................................... 10 3 DigitalControlInterfaceSignalMappingforJ2/P2Connectors..................................................... 11 SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 1 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

EVMOverview www.ti.com 4 BipolarOutputOperationJumperSettings............................................................................. 13 5 GainofTwoOutputJumperSettings................................................................................... 13 6 CapacitiveLoadDriveOutputJumperSettings....................................................................... 13 7 JumperSettingFunction.................................................................................................. 14 1 EVM Overview ThissectiongivesageneraloverviewoftheDAC9881evaluationmodule(EVM),anddescribessomeof thefactorsthatmustbeconsideredinusingthismodule. 1.1 Features ThisEVMfeaturestheDAC9881digital-to-analogconverter(DAC).TheDAC9881EVMisasimple evaluationmoduledesignedforquickandeasyevaluationofthefunctionalityandperformanceofthe 18-bit,high-resolution,voltage-output,single-channel,andserialinputDAC.ThisEVMfeaturesa high-speedserialinterfaceofupto50MHztocommunicatewithanyhostmicroprocessororDSP-based system. TheDAC9881isdesignedtoworkbydefaultforunipolaroutputrange,butitcanalsobeconfiguredfor bipolaroutputrangewiththeadditionofanexternalamplifierandsomeresistors.Theoptionforbipolar modeofoperationisincludedintheEVMwithsomeminorjumperconfiguration. A+5-VprecisionvoltagereferenceisprovidedontheboardviaU3(REF5050)tosupplythenecessary externalreferencevoltagetosettheDAC9881outputrange.ThefootprintofU3iscompatiblewithmany SO-8packagetypereferencedevices.Theuserhastheflexibilitytoselectthereferencesupplytosetthe outputrangeoftheDAC9881differentlythanwhatisprovidedontheboard.ThefamilyofREF50xx precisionreferencesourcesworkwellwiththisEVM.Inaddition,theprovisionoftestpointsTP1andTP8, allowuserstousetheirownexternalreferencesupply.Typically,TP1(V L)mustbeconnectedto REF ground,butitcanacceptupto±0.2V,ifnecessary.Thetestpoint,TP8(V H),istypicallysetto+5V, REF butcanacceptaminimumof+1.25Vanduptoamaximumof+5.5V. ThevoltagereferenceconfigurationimplementedonthisEVMusestheKelvinconnectionfeatureofthe DAC9881device.Thisconnectionhelpsminimizetheinternalerrorscausedbythechangingreference currentanditsassociatedcircuitimpedances. 1.2 Power Requirements ThefollowingsectionsdescribethepowerrequirementsofthisEVM. 1.2.1 SupplyVoltage ThedcpowersupplyrequirementforthisDAC9881EVM(AVDDandDV )isselectablebetween+3.3VA DD and+5VAviaW1jumperheader.The+3.3VAcomesfromJ6-8,andthe+5VAcomesfromJ6-3.These powersupplyvoltagesarereferencedtoanaloggroundthroughJ6-5andJ6-6. Thelogicvoltage,IOV ,isselectablebetween+1.8VD,+3.3VDand+5VDviatheJ3jumper. DD TheV andV thatrangesfrom+15-Vto–15-VmaximumconnectthroughJ6-1andJ6-2terminals, CC SS respectively.AlltheanalogpowersuppliesarereferencedtoanaloggroundthroughJ3-6. CAUTION To avoid potential damage to the EVM board, ensure that the proper voltages areconnectedtotheirrespectiveterminalsaslabeledontheEVMboard. Stressesabovethemaximumlistedvoltageratingsmaycausepermanent damagetothedevice. C5000,C6000aretrademarksofTexasInstruments. LabVIEWisatrademarkofNationalInstrumentsCorporation. 2 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com EVMOverview 1.2.2 ReferenceVoltage TheDAC9881requiresanexternalreferencesourcetosettheDAC’soperatingvoltageoutputrange. Applyingthedesiredvoltagebetweentherangesof1.25VtoAV intotheV Hpinsetsthepositive DD REF rangeoftheDAC9881output.Also,applyingthedesiredvoltagebetweentherangeof-0.2Vto+0.2V intotheV LpinsetsthenegativerangeoftheDAC9881output,althoughtheV Lpinmustnominally REF REF besettozerovolts.ThevoltagesappliedintotheV HandV LpinssettheDAC9881’sfulloutput REF REF voltageswing. Foroptimumperformance,theDAC9881supportsasetKelvinconnectiontotheexternalreferencevia V FandV Spins,aswellasV FandV Spins.Thisoptionforreferenceconfiguration REFH REFH REFL REFL minimizestheinternalerrorscausedbythechangingreferencecurrentanditsassociatedcircuit impedances. A+5-VprecisionvoltagereferenceisprovidedfortheexternalreferencesourceoftheDACthrough REF5050,U3.Thepowersupplyforthereferencedevice,U3,isselectablebetweenV and+5VAvia CC W11toensurethatthecorrectvoltagerangeofU3canbeset.Asmentionedearlier,thefamilyof REF50xxreferencedevicesmaybeusedandtheinstalleddeviceontheEVMchangedtoprovidethe desiredvoltagerangerequired. Thereferencevoltages,V HandV LareselectableviajumpersW8andW4.Whenshortingpins1 REF REF and2ofbothjumpers,theonboard+5-VreferenceviaREF5050isselected.Shortingpins2and3ofboth jumpersselectsthereferencevoltagesthatareappliedviaJ4pins18and20,respectively.These voltagesnormallycomefromthehostplatformthatisusedtointerfacewiththeDAC9881EVM. ThetestpointsTP1andTP8arealsoprovidedtoallowtheusertoconnectotherexternalreference sourcesiftheonboardreferencecircuitisnotdesired.Theexternalvoltagereferencemustnotexceedthe appliedpowersupplies,AV andDV oftheDAC. DD DD CAUTION When applying an external voltage reference through TP8 or J4-20, ensure that it does not exceed the applied AVDD. This can permanently damage the DAC9881,U1. 1.3 EVM Basic Functions ThisEVMisdesignedasafunctionalevaluationplatformtotestcertaincharacteristicsoftheDAC9881 digital-to-analogconverter.FunctionalevaluationoftheinstalledDACdevicecanbeaccomplishedwith theuseofanymicroprocessor,DSP,orasignal/waveformgenerator. TheheadersJ2(topside)andP2(bottomside)arepassthroughconnectorsprovidedtoallowthecontrol signalsanddatarequiredtointerfaceahostprocessororwaveformgeneratortotheDAC9881EVM.All signalsareroutedthroughexceptSDIbecauseofdaisy-chaincapability.SDItotheDAC9881entersthe P2connector(locatedonthebottomsideoftheboard)atpin11andisviewableonTP7.SDOfromthe DAC9881exitstheboardatJ1pin11andisviewableonTP6. Anadapterinterfacecard(5–6KInterfaceBoard)isalsoavailabletofitandmatewithTI’sC5000™and C6000™DSPStarterKit(DSK).Thisalleviatesthebuildingofacustomcable.Inaddition,thePrecision AnalogApplicationgroupofTexasInstrumentshasotherinterfaceboardsthataredesignedtoconnectto andinterfacewiththisEVMaswell.Formoredetailsorinformationregardingthe5-6KInterfaceBoard, callTexasInstrumentsIncorporatedorvisittheproductfolderforthetoolhere:5-6KInterfaceBoard. TheDACoutputcanbemonitoredthroughpins2and6oftheJ4connector.TheDACoutputcanbe switchedthroughW2forstackingtheEVMfordaisy-chainingpurposes. AblockdiagramoftheEVMisshowninFigure1. SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 3 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

PCBDesignandPerformance www.ti.com Figure1.BlockDiagram 2 PCB Design and Performance Thissectiondiscussesthelayoutdesignoftheprinted-circuitboard(PCB),thephysicalandmechanical characteristicsoftheEVM,andabriefdescriptionoftheEVMtestperformanceprocedure.Thelistof componentsusedonthisevaluationmodulealsoisincludedinthissection. 2.1 PCB Layout TheDAC9881EVMisdesignedtopreservetheperformancequalityoftheDACasspecifiedinthedata sheet.TotakefulladvantageoftheEVM'scapabilities,usecareduringtheschematicdesignphaseto properlyselecttherightcomponentsandtobuildthecircuitcorrectly.Thecircuitmustincludeadequate bypassing,identifying,andmanagingtheanaloganddigitalsignals,andunderstandingthecomponents electricalandmechanicalattributes. Themaindesignconcernduringthelayoutprocessistheoptimalplacementofcomponentsandthe properroutingofsignals.Placethebypasscapacitorsascloseaspossibletothepinsandbesureto routetheanaloganddigitalsignalsawayfromeachother.Asolidgroundplaneispreferred.When consideringasplitplanedesign,analyzethecomponentplacementandcarefullysplittheboardintoits analoganddigitalsectionsstartingfromtheDUT.Thegroundplaneplaysanimportantroleinreducing noisethatcontributestotheerroroftheDACoutput.Toensurethatthereturncurrentsarehandled properly,routetheappropriatesignalsonlyintheirrespectivesections,theanalogtracesshouldonlylay directlyaboveorbelowtheanalogsectionandthedigitaltracesinthedigitalsection.Minimizethelength ofthetracesbutusethelargestpossibletracewidthallowableinthedesign.Thesedesignpracticeswere appliedtotheDAC9881EVMPCB. TheDAC9881EVMboardisconstructedonafour-layerPCBusingacopper-cladFR-4laminatematerial. ThePCBhasadimensionof43,18mm(1.70inch)×82,55mm(3.25inch),andtheboardthicknessis 1,57mm(0.062inch).Figure2throughFigure7showtheindividualartworklayers. 4 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com PCBDesignandPerformance Figure2.TopSilkscreen Figure3.Layer1,TopSignalPlane SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 5 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

PCBDesignandPerformance www.ti.com Figure4.Layer2,GroundPlane Figure5.Layer3,PowerPlane 6 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com EVMPerformance Figure6.Layer4,BottomSignalPlane Figure7.BottomSilkscreen 3 EVM Performance TheDAC9881isoptimizedforDCperformance;totalharmonicdistortion(THD)istypicallyat-80dB.The EVMINLandDNLtestingisperformedusingahigh-densityDACbenchtestboard,anAgilent3458A digitalmultimeter,andapersonalcomputer(PC)runningLabVIEW™software.TheEVMboardistested forallcodesof262,144×8bitsorganizationandtheDACisallowedtosettlefor1msbeforethemeteris read.ThisprocessisrepeatedforallcodestogeneratethemeasurementsforINLandDNL. Figure8showstheINLandDNLcharacteristicplots. SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 7 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

EVMPerformance www.ti.com Figure8.INLandDNLCharacteristicPlot 8 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com BillofMaterials 4 Bill of Materials Table1.PartsLists Qty. Designators Description Manufacturer Mfg.PartNumber 1 N/A PrintedWiringBoard TI 6498232 6 C1–C4,C15,C17 0.1μF,0805,Ceramic,X7R,50V,10% TDK C2012X7R1H104K 3 C5,C11,C16 10μF,1210,Ceramic,X7R,25V,20% TDK C3225X7R1E106M 2 C6,C13 2200pF,0805,Ceramic,C0G,50V,5% TDK C2012C0G1H222J 3 C8,C12,C14 1000pF,0805,Ceramic,C0G,50V,5% TDK C2012C0G1H102J 4 C9,C10,C18,C19 1μF,0805,Ceramic,X7R,25V,10% TDK C2012X7R1E105K 0 C20 DNP 2 C21,C22 2.2μF,0805,Ceramic,X7R,16V,10% TDK C2012X7R1C225K 1 J1 7×2×2mmTerminalStrip Samtec TMM-107-01-T-D 2 J2,J4(topside) 10Pin,DualRow,THHeader(20Pos.) Samtec TSM-110-01-T-DV-P 1 J3 3×2×2mmTerminalStrip Samtec TMM-103-01-T-D 1 J6(topside) 5Pin,DualRow,THHeader(10Pos.) Samtec TSM-105-01-T-DV-P 2 P2,P4(bottomside) 10Pin,DualRow,THHeader(20Pos.) Samtec SSW-110-22-F-D-VS-K 1 P6(bottomside) 5Pin,DualRow,THHeader(10Pos.) Samtec SSW-105-22-F-D-VS-K 6 R1–R4,R8,R20 0.0Ω1/10W,5%,0603,SMD Yageo RC0603JR-070RL 0 R5,R7,R25,R27,R28 DNP 2 R6,R12 6.04kΩ,1/10W,0.1%,0603,SMD BCC 2312-201-76042 1 R9 10kΩ4MMTOPADJSMD Bourns 3214W-1-103E 7 R10,R11,R15–R19 10.0kΩ,1/10W,1%,0603,SMD Yageo RC0603FR-0710KL 1 R13 100Ω,1/10W,0.1%,0603,SMD BCC 2312-201-71001 1 R14 3.01kΩ,1/10W,0.1%,0603,SMD BCC 2312-201-73012 2 R21,R24 2.00kΩ,1/10W,0.1%,0603,SMD BCC 2312-201-72002 1 R22 95.3kΩ,1/10W,0.1%,0603,SMD KOA RN731JTTDK9532B25 2 R23,R26 49.9Ω,1/10W,0.1%,0603, SMDKOA RN731JTTDK49R9B25 4 R29,R31,R32,R33 10.0kΩ,1/10W,0.1%,0603, SMDKOA RN731JTTDK1002B25 1 R30 470kΩ,1/10W,1%,0603, SMDYageo RC0603FR-07470KL 1 R34 1.00kΩ,1/10W,1%,0603, SMDYageo RC0603FR-071KL 8 TP1–TP8 TestPointTurret Mill-Max 2348-2-00-44-00-00-07-0 1 U1 18-Bit,BufferedVoltageOutputDAC TI DAC9881SBRGET 1 U2 HighPrecisionOp-Amp TI OPA211AIDR 1 U3 5VPrecisionVoltageReference TI REF5050AID 1 U4 HighPrecisionDualOperationalAmplifier TI OPA2277UA 10 W1,W2,W4–W11 3PinMiniHeader Samtec TMM-103-01-T-T 2 W3,W12 2PinMiniHeaderComponents Samtec TMM-102-01-T-T ADDITIONALCOMPONENTS 9 Shuntforitems33and34 2mmShunt–Black Samtec 2SN-BK-G 1 ShuntforJ4 0.100Shunt–Black(J4Pins1and2) Samtec SNT-100-BK-T Notes:1. P2,P4andP6partsarenotshownintheschematicdiagram.AllthePdesignatedpartsareinstalledinthebottomsideofthe PCBoardoppositetheJdesignatedcounterpart.Example,J2isinstalledonthetopsidewhileP2isinstalledinthebottomside oppositeofJ2. SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 9 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

EVMOperation www.ti.com 5 EVM Operation ThissectioncoversindetailtheoperationoftheEVMtoprovideguidancetotheuserinevaluatingthe onboardDACandhowtointerfacetheEVMtoaspecifichostprocessor. Forinformationabouttheserialinterfaceandotherrelatedtopics,seetheDAC9881datasheet (SBAS438). TheEVMboardisfactorytestedandconfiguredtooperateintheunipolaroutputmode. 5.1 Factory Default Setting TheEVMboardissettoitsdefaultconfigurationfromthefactoryasdescribedintheTable2tooperatein unipolar+5Vmodeofoperation.Figure9showsthedefaultjumperconfigurationasdescribedintable2. Table2.FactoryDefaultJumperSetting Reference Jumper Function Position W1 1-2 The+5VAisusedforAV andDV topowertheanaloganddigitalsuppliesoftheDAC9881. DD DD W2 1-2 RoutesV oftheDAC9881toJ4-2foranalogoutputmonitoring. OUT W3 OPEN DisconnectsV HfromtheinvertinginputofU2toallowotheroutputmodeofconfiguration. REF W4 2-3 ConnectstheV LpinoftheDAC9881toground. REF W5 1-2 Negativesupplyrailoftheoutputoperationalamplifier,U2,ispoweredbyV forbipolaroperation. SS W6 2-3 FSsignalfromJ2-7isroutedtodrivetheCSsignaloftheDAC9881. W7 OPEN LeavethisjumperopenbecauseR1isinstalled.ThisisthedefaultmodeoftheEVMwhenitleavesthe factory. W8 1-2 Routestheonboard+5-Vvoltagereference,V HfortheDAC. REF W9 1-2 RoutesV andR fromJ4-2andJ4-4(iftheyareshunted)tothenoninvertinginputofU2operational OUT FB amplifier. W10 OPEN TheLDACsignaloftheDAC9881istiedtogroundforsynchronousupdateoftheDAC9881output. W11 1-2 RoutesV topowertheanalogsupplyoftheU3referencedevice. CC W12 OPEN DisconnectstheinvertinginputofU2fromR12gainresistortoallowotheroutputmodeofconfiguration. J1 1-2 TheLDACsignaloftheDAC9881istiedtogroundforsynchronousDACupdateoperation. J3 5-6 TheDAC9881’sIOV ispoweredwith+3.3VD. DD A Figure9.DAC9881EVMDefaultJumperConfiguration 10 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com EVMOperation 5.2 Host Processor Interface TheDAC9881supportshigh-speedserialperipheralinterface(SPI)tocommunicatewithgatearrays, microprocessorsorDSPdevices.Theusersuppliedhostprocessordrivestheserialcommunicationtothe DAC9881EVM.TheDAC9881EVMprovidesthenecessaryconnectionstothehostprocessorthrough connectorP2(locatedonthebottomsideoftheboard).ProperoperationoftheDAC9881dependsonthe successfulcommunicationbetweenthehostprocessorandtheEVM.CommunicationisbasedonanSPI whereCPOL=0andCPHA=0.Thismeanstheserialclockdwellslowinitsinactivestateandtheinput dataconsideredvalidontherisingedgeoftheserialclock. ThefollowingsectionsdescribethebasicoperationofthedigitalcontrolinputstotheDAC9881.Formore detailedinformationregardingtheDAC9881digitalinterface,seethedatasheet(SBAS438). 5.3 Digital Control Interface TheDAC9881canbeconsidereda3-wireSPIslavedevice.Thehostprocessormustprovideachip select(CS),theserialdatainput(SDI)andtheserialclock(SCLK)necessarytocontroltheoperationof theDAC9881.Afourthcontrollinecalledloaddac(LDAC)canbeusedtocontrolthepointintimeat whichtheDACoutputdataisupdated.ThisisusefulinapplicationswheremultipleDAC9881'sneedtobe updatedsimultaneously.Withtheexceptionoftheserialdatainput(SDI)andtheserialdataoutput(SDO) toandfromtheDAC9881,theEVMincorporatesapass-throughconnectorarrangementtoaccommodate thedigitalcontrolinterfaceoftheDAC9881deviceviaJ2(topside)orP2(bottomside)connectors.The signalsonthesepass-throughconnectorsarelistedasshowninTable3. Table3.DigitalControlInterfaceSignalMappingforJ2/P2Connectors PinNumber Signal Function J2.1/P2.1 CS PrimarysynchronizationanddeviceenableinputfortheDAC9881.Hostmicrocontroller’sSTEsignalfor SPIinterface. J2.3/P2.3 SCLK Serialinterfaceclock. J2.5/P2.5 CLKR Unused. J2.7/P2.7 FS SecondarysynchronizationanddeviceenableinputfortheDAC9881.Hostmicrocontroller’sSTEsignal forSPIinterfaceorFSsignalfromDSPhostsystem. J2.9/P2/9 FSR Unused. J2.11 SDO SerialDataOutput. P2.11 SDI SerialDataInput. J2.13/P2.13 DR Unused. J2.15/P2.15 LDAC1 GPIOsignaltocontrolLDACforDACoutputlatchupdate. J2.17/P2.17 LDAC2 AlternateGPIOsignaltocontrolLDACforDACoutputlatchupdate. J2.19/P2.19 RST GPIOsignaltocontrolRSTforDACresetfunction. J2.2/P2.2 PDN GPIOsignaltocontrolPDNforhardwarepowerdown. J2.4/P2.4 GND SignalGround J2.10/P2.10 J2.18/P2.18 J2.6/P2.6 GPIOs Unused J2.8/P2.8 J2.12/P2.12 J2.14/P2.14 J2.16/P2.16 J2.20/P2.20 5.3.1 CSSignal ThesignalsfoundonJ2pins1and7oftheEVMareusedtocontrolthechipselectinputoftheDAC9881. ThesesignalsareconfigurableviawirejumperW6.EithersignalcanbechosentodrivetheDAC9881CS pin.ThebasicfunctionoftheCSinputsignalistoenableserialcommunicationwiththeDAC9881.This signalmustbeheldlowwhilethehostprocessorisaccessingtheDACserialshiftregister.The low-to-hightransitionofthissignaltransfersthecontentoftheserialshiftregistertotheDACinput register.TheCSinputcanalsobeusedtoupdatetheDACoutputiftheLDACistiedtoground. SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 11 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

EVMOperation www.ti.com 5.3.2 SDISignal TheSDIsignalistheserialdatainputthatisloadedintotheDAC’sinputregister.Thedataframesentto theDAC9881is24-bitswide.Thefirst6bitsare'don'tcare',theseventhbitisthemost-significantbit (MSB)oftheDACdataandthe24thbitistheleastsignificantbit(LSB)ofthe18-bitDACdata.Theserial datainputisdrivenfromtheSPImasteronthefallingSCLKedgeandsampledbytheDAC9881onthe risingedgeoftheserialclock. 5.3.3 SCLKSignal ThehostprocessormustprovideanSCLKsignalwhichisusedtoadvanceserialdatathroughtheDAC’s serialshiftregister.Theserialclockratecanoperateatspeedsupto50MHz.The6don'tcarebitsplus 18-bitdataisshiftedoutofthebusmastersynchronouslyonthefallingedgeofSCLKandlatchedonthe risingedgeofSCLKintotheDAC’sserialshiftregister.After24-bitsaretransferredor24SCLKcyclesare generated,thebusmastermusttaketheCSsignalhigh.IftheCSsignalisheldlowandmorethan24 SCLKcyclesareapplied,thelastSCLKcycleisconsideredtheleastsignificantbit(LSB)ofthe18-bit datastreamloadedintotheDAC’sserialshiftregister. 5.3.4 LDACSignal TheLDACsignalisacontrolinputsignalthatcanbeusedtoupdatetheDACoutputataspecificpointin time.Thissignalisactivelowandcanbetriggeredsynchronouslyorasynchronously.IfLDACisheldlow, theDAC9881outputupdateswiththerisingedgeoftheCSinput.IfmultipleDAC9881devicessharethe databusindaisy-chainfashion,acommonLDACsignalcanbeusedtoupdatemultipleDACoutputs simultaneously. 5.3.5 RSTSignal TheRSTsignalisthecontrolinputusedtoresettheDACoutputtoaknownstatewhichisdeterminedby thelogicleveloftheRSTSELpinwhentheRSTpinisasserted.IfRSTSEListiedtoDGND,theDAC outputlatchiscleared(0V)andV isminimumscale(i.e.,V L).IfRSTSEListiedtoVDD,theDAC OUT REF outputlatchissettomidscaleandV isequalto(V H–V L)/2.Thispinisanactivelowinput. OUT REF REF 5.3.6 PDNSignal ThePDNsignalisthecontrolinputprovidedforhardwarepower-downfunctionofthedevice.Thissignal isactivehigh,sowhenthePDNpinisdrivenhigh,thedevicegoesintopower-downmode,whichreduces itspowerconsumption.TheDAC9881voltageoutputpinisconnectedtogroundthroughaninternal10-kΩ resistorwhileinpower-downmode. 5.4 Analog Output TheDAC9881voltageoutputisbufferedinternallyandoffersaforceandsenseoutputconfigurationto allowthelooparoundtheoutputamplifiertobeclosedasneartotheloadaspossible.TheEVMcloses thisloopbydefaultwithR1installed,soiftheloopattheloadneedstobeclosed,R1mustberemoved andjumpersW2andW7usedtoconnectV andR totheconnectorJ4.TheselectedpinsoftheJ4 OUT FB connector,asdictatedbythejumperpositionsofW2andW7jumpers,canthenbeconnectedtotheload toclosetheloop. TheEVMincludesanexternaloperationalamplifier,U2,asanoptionforotheroutputsignal-conditioning circuitryfortheDACoutput.AlthoughthebufferedoutputoftheDAC9881canbemonitoredthroughJ4 pin2,theoptionalexternalbufferoutput(iftheDACoutputisconnectedtoit)canbemonitoredthrough theTP3testpoint. Theexternaloperationalamplifier,U2,issettounitygainconfigurationbydefaulttomaintainthe DAC9881unipolaroutputmodeofoperation.Butitcanbemodifiedbysimplejumpersettingstoachieve othermodesofoperation.Thefollowingsectionsdescribethedifferentconfigurationsoftheoutput amplifier,U2. 12 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com EVMOperation 5.4.1 BipolarOutputOperation UsingtheexternalV HtooffsettheDACoutputandextendtherangeofoperationtoachieveabipolar REF modeofoperationispossiblebyproperlyconfiguringtheoutputoperationalamplifier,U2.This configurationisdescribedinTable4. Table4.BipolarOutputOperationJumperSettings Reference Jumper Function Setting 1-2 ConnectsDACoutput(V 1)tothenoninvertinginputoftheoutputoperationalamplifier,U2. W9 OUT 2-3 ConnectsDACoutput(V 2)tothenoninvertinginputoftheoutputoperationalamplifier,U2. OUT W3 CLOSE ConnectV Htotheinvertinginputoftheoperationalamplifier,U2. REF W5 1-2 Suppliespower,V ,tothenegativerailofoperationalamplifier,U2,forwiderrangeofoperation. SS W12 OPEN Disconnectnegativeinputoftheoperationalamplifierfromthegainresistor,R12. 5.4.2 OutputGainofTwoOperation TheconfigurationasdescribedonTable5yieldsavoltageoutputmodeofoperationthatisgainedbytwo. Table5.GainofTwoOutputJumperSettings Reference Jumper Function Setting 1-2 ConnectsDACoutput(V 1)tothenoninvertinginputoftheoutputoperationalamplifier,U2. W9 OUT 2-3 ConnectsDACoutput(V 2)tothenoninvertinginputoftheoutputoperationalamplifier,U2. OUT W3 OPEN DisconnectV Hfromtheinvertinginputoftheoperationalamplifier,U2. REF W5 1-2 Suppliespower,V ,tothenegativerailofoperationalamplifier,U2,forwiderrangeofoperation. SS W12 CLOSE Connectthenegativeinputoftheoperationalamplifier,U2,tothegainresistor,R12. 5.4.3 CapacitiveLoadDrive Anotheroutputconfigurationoptionistodriveawiderangeofcapacitiveloadrequirement.However,all operationalamplifiersundercertainconditionsmaybecomeunstabledependingontheoperational amplifierconfiguration,gain,andloadvalue.Thesearejustafewfactorsthatcanaffectoperational amplifiersstabilityperformanceandmustbeconsideredwhenimplementing. Inunitygain,theOPA211operationalamplifier,U2,performswellwithlargecapacitiveloads.Increasing thegainenhancestheamplifier’sabilitytodriveevenmorecapacitance,andaddingaloadresistoreven improvesthecapacitiveloaddrivecapability. Table6showsthejumpersettingconfigurationforacapacitiveloaddrive. Table6.CapacitiveLoadDriveOutputJumperSettings Reference Jumper Function Setting 1-2 ConnectsDACoutput(V 1)tothenoninvertinginputoftheoutputoperationalamplifier,U2. W9 OUT 2-3 ConnectsDACoutput(V 2)tothenoninvertinginputoftheoutputoperationalamplifier,U2. OUT W3 OPEN DisconnectV Htotheinvertinginputoftheoperationalamplifier,U2. REF W5 1-2 Suppliespower,V ,tothenegativerailofoperationalamplifier,U2,forwiderrangeofoperation. SS W12 CLOSE Connectthenegativeinputoftheoperationalamplifier,U2,tothegainresistor,R12. SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 13 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

EVMOperation www.ti.com 5.5 Jumper Setting Table7showsthefunctionofeachspecificjumpersettingoftheEVM. Table7.JumperSettingFunction Reference JumperSetting Function 1 3 Routes+5VAforAV andDV topowertheanaloganddigitalsuppliesoftheDAC9881. DD DD W1 1 3 Routes+3.3VAforAV andDV topowertheanaloganddigitalsuppliesoftheDAC9881. DD DD 1 3 RoutesV toJ4-2. OUT W2 1 3 RoutesV toJ4-6. OUT ConnectV HtotheinvertinginputofU2forDAC9881’sbipolarmodeofoperation. REF W3 DisconnectsV HfromtheinvertinginputofU2toallowotheroutputmodeofconfiguration. REF 1 3 RoutesthereferencevoltagefromJ4pin18fortheV LpinoftheDAC9881. REF W4 1 3 ConnectstheV LpinoftheDAC9881toground. REF 1 3 Negativesupplyrailoftheoutputoperationalamplifier,U2,ispoweredbyV forbipolar SS operation. W5 1 3 Negativesupplyrailoftheoutputoperationalamplifier,U2,istiedtoAGNDforunipolar operation. 1 3 CSsignalfromJ2-1isroutedtodrivetheCSsignaloftheDAC9881. W6 1 3 FSsignalfromJ2-7isroutedtodrivetheCSsignaloftheDAC9881. 1 3 Routesthereferencefeedback,R ,pinoftheDAC9881toJ4pin4toprovidetheoptionto FB closetheoutputoperationalamplifier,U2,loopascloseaspossibletotheload. 1 3 LeavethisjumperopenifR1isinstalled.ThisisthedefaultmodeoftheEVMwhenitcomesout W7 ofthefactory. 1 3 Routesthereferencefeedback,R ,pinoftheDAC9881toJ4pin8toprovidetheoptionto FB closetheoutputoperationalamplifier,U2,loopascloseaspossibletotheload. 1 3 Routestheonboard+5-Vvoltagereference,V HfortheDAC. REF 1 3 Disconnectonboardorexternalpositivevoltagereference,V HfortheDACviaU5AorJ1pin W8 REF 20.AllowsuserreferencevoltagetoconnectviaTP1. 1 3 Routestheexternalpositivevoltagereference,V HfortheDACviaJ1pin20. REF 14 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com EVMOperation Table7.JumperSettingFunction (continued) Reference JumperSetting Function 1 3 RoutesV andR fromJ4-2andJ4-4tothenoninvertinginputofU2operationalamplifier. OUT FB W9 1 3 RoutesV andR fromJ4-6andJ4-8tothenoninvertinginputofU2operationalamplifier. OUT FB 1 3 LDAC1signalfromJ2-15isroutedtodrivetheLDACsignaloftheDAC9881. 1 3 TheLDACsignaloftheDAC9881istiedtogroundforsynchronousupdateoftheDAC9881 W10 output. 1 3 LDAC2signalfromJ2-17isroutedtodrivetheLDACsignaloftheDAC9881. 1 3 RoutesV topowertheanalogsupplyoftheU3referencedevice. CC W11 1 3 Routes+5VAtopowertheanalogsupplyoftheU3referencedevice. ConnecttheinvertinginputofU2toR12gainresistorforDAC9881’s2xgainofoperation. W12 DisconnectstheinvertinginputofU2fromR12gainresistortoallowotheroutputmodeof configuration. 2 8 14 Ifjumperisinstalledonpins1and2,theLDACsignaloftheDAC9881istiedtogroundfor synchronousDACupdateoperation. 1 7 13 24 8 14 Ifjumperisinstalledonpins3and4,theRSTSELpinoftheDAC9881istiedtogroundsothat theDACoutputisat0Vonpoweruporresettothedeviceisissued. 1 3 7 13 2 6 14 Ifjumperisinstalledonpins5and6,theGAINpinoftheDAC9881istiedtoIOV sothatthe DD DACoutputissetwithagainoftwooutput. 1 5 13 2 8 14 J1 Ifjumperisinstalledonpins7and8,theUSB/BTCpinoftheDAC9881istiedtogroundsothat theDAC’sinputdataformatissetfor2scomplementformat. 1 7 13 2 10 14 Ifjumperisinstalledonpins9and10,theRSTpinoftheDAC9881istiedtogroundsothatthe DACisforcedintohardwareresetmode. 1 9 13 2 812 Ifjumperisinstalledonpins11and12,thePDNpinoftheDAC9881istiedtoIOV sothatthe DD DACisforcedintopower-downstatus. 1 711 2 8 14 Ifjumperisinstalledonpins13and14,theSDOSELpinoftheDAC9881istiedtogroundso thattheDACdevicecanbeoperatedindaisy-chainmode. 1 7 13 SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 15 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

UsingtheDAC9881EVMwithDXP www.ti.com Table7.JumperSettingFunction (continued) Reference JumperSetting Function 2 4 6 TheDAC9881’sIOV ispoweredwith+5VD. DD 1 3 5 2 4 6 J3 TheDAC9881’sIOV ispoweredwith+1.8VD. DD 1 3 5 2 4 6 TheDAC9881’sIOV ispoweredwith+3.3VD. DD 1 3 5 Legend: Indicatesthecorrespondingpinsthatareshortedorclosed. 5.6 DAC9881EVM Schematic TheDAC9881EVMschematicappearsasthelastpageofthismanual. 6 Using the DAC9881EVM with DXP TheDAC9881EVMiscompatiblewiththeDACeXerciserProgram(DXP)fromTexasInstruments.DXPis atoolthatcangeneratethenecessarycoderequiredtooutputvarioussignalsandwaveformsfromthe DAC9881EVM.TheDAC9881EVM-DXPkitcombinestheDAC9881EVMboardwiththeTMS320VC5509 DSP-basedmodularmotherboard(MMB0),andincludesDXPsoftwareforevaluationusinganyavailable USBport. DXPisaprogramforcontrollingthedigitalinputsignalssuchastheclock,LDAC,CS,andSDI.Wave tablesarebuiltintotheDSPsoftwaretoallowSine,Ramp,Triangle,andSquarewavesignalstobe generatedbytheDAC9881.StraightDCoutputsalsocanbeobtained. TheDAC9881EVM-PDKiscontrolledbyloadingaDACEVMconfigurationintotheMMB0.Forcomplete informationaboutinstallingandconfiguringDXP,seetheDXPUser'sGuide,availablefordownloadfrom theTIWebsite. ThissectioncoversthespecificoperationoftheDAC9881EVM-PDK.Throughoutthisdocument,the abbreviationEVMandthetermevaluationmodulearesynonymouswiththeDAC9881EVM. 6.1 Hardware Thehardwareconsistsoftwomaincomponents,thefirstistheDAC9881EVMitselfandtheotherisa modularmotherboardcalledtheMMB0.TheMMB0boardhousesaTMS320VC5507DSPwhichcontrols theDAC9881serialinterface. ThehardwareneedstobeconfiguredsuchthattheDAC9881EVMispluggedontotheboardontothe MMB0aligningfemaleconnectorsP4,P2,andP6(bottomsideoftheDAC9881EVM)withmale connectorsJ4,J7,andJ5ontheMMB0.Exercisecautionwhenassemblingtheboardsasitispossibleto misaligntheconnectors.DonotconnecttheMMB0toyourPCbeforeinstallingtheDXPsoftware. Installingthesoftwareensuresthatthenecessarydriversareproperlyloadedtorunthehardware. 16 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com UsingtheDAC9881EVMwithDXP Figure10.MMB0withDAC9881EVMInstalled 6.2 MMB0 Power Supplies Severalpowerconnectionsarerequiredforthehardwaretoworkproperly.FortheMMB0,thesupplied 6-VAC/DCconverterisallthatisnecessary.EnsurethatJ12ontheMMB0boardisclosedbefore connectingtheAC/DCadaptertotheDCInconnectoroftheMMB0.Thissupplyprovidesallpowertothe digitalportionoftheDAC9881EVMaswellasallnecessarypowerfortheDSP.Analogpowerforthe DAC9881EVMmustbesuppliedexternallyviaJ14– a6-positionscrewterminalmountedinthelowerleft corneroftheMMB0board. CAUTION When using external power supplies applied to J14 on the MMB0, ensure that allshortingblocksfromJ13arecompletelyremoved.Permanentdamagetothe MMB0mayoccurotherwise. Fromlefttoright,thescrewterminalconnectionsofJ14are–VA,+VA,+5VA,–5VA,+5VD,andGND. TheDAC9881boardhaspowerrequirementsasdescribedinSection1.2.TheanalogpowerforVcc (+VA),Vss(-VA),and+5VAmaybeapplieddirectlytothescrewterminalsatJ14ontheMMB0 (referencedtotheGNDterminal). ConnecttheMMB0powersupplytoDCINconnector(J2)ontheMMB0.Connectallotheranalog suppliesasnecessarytoJ14ontheMMB0(referencedtothegroundterminal). SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 17 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

UsingtheDAC9881EVMwithDXP www.ti.com 6.3 Software – Running DXP InstallDXPonalaptoporpersonalcomputerrunningWindowsXPasperthedetailedinstructioninthe DXPUser'sGuide(SBAU146).RuntheDXPprogrambyclickingontheDXPicononyourdesktoporby browsingtoyourinstallationdirectory. BeforeyoucanuseDXP,aDACEVMconfigurationfilemustbeloaded.Toloadaconfigurationfile, selectthedesiredDACfromtheconfigurationlistundertheDACmenu.ChoosetheDACconfigurationfile fortheDAC9881EVMasshowninFigure11. Figure11.LoadingtheDAC9881EVMINIFile TheDXPsoftwaredefaultstooutputa1-kHzsinewavefromtheDAC,otherwaveformoptionsinclude Square,Sawtooth,Triangle,andDCoutputoptionsasdescribedintheDXPUser'sGuide.GPIOoptions areavailableontheDAC9881EVMwhichactiveeithertheRESETorpower-downfunctionsofthe DAC9881.TheseareshowninFigure12ontherightsideofthescreenlabeledGPIO-controlledDAC Functions.PressingtheResetbuttonresetstheDAC9881outputsasdescribedinthedevicedatasheet. PressingthePower-DownbuttonplacestheDAC9881inlow-powermode. 18 DAC9881EvaluationModule SLAU279A–March2009–RevisedNovember2009 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

www.ti.com RelatedDocumentationFromTexasInstruments Figure12.DAC9881– Frequency/AmplitudeandGPIOControlOptions 7 Related Documentation From Texas Instruments 1. DAC9881,18-Bit,Single-Channel,Low-Noise,Voltage-OutputDigital-to-AnalogConverterdatasheet (SBAS438) 2. REF02,+5VPrecisionVoltageReferencedatasheet(SBVS003) 3. REF5050,Low-Noise,VeryLowDrift,PrecisionVoltageReferencedatasheet(SBOS410) 4. OPA211,1.1nV/√HzNoise,LowPower,PrecisionOperationalAmplifierinSmallDFN-8Packagedata sheet(SBOS377) 5. OPA827,Low-Noise,High-Precision,JFET-InputOperationalAmplifierdatasheet(SBOS376) 6. OPA277,OPA2277,OPA4277,HighPrecisionOperationalAmplifiersdatasheet(SBOS079) 7. OPA227,HighPrecision,LowNoiseOperationalAmplifiersdatasheet(SBOS110) IfyouhavequestionsaboutthisorotherTexasInstrumentsDataConverterevaluationmodules,sendan e-mailtotheDataConverterApplicationTeamatdataconvapps@list.ti.com.Includeinthesubject headingtheproductwithwhichyouhavequestionsorconcerns. SLAU279A–March2009–RevisedNovember2009 DAC9881EvaluationModule 19 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated

1 2 3 4 5 6 Revision History REV ECN Number Approved A Release to production JLP IOVDD +5VA +3.3VA W1 W6 AVDD C17 D R10 R11 R17 R16 R15 C15 C16 C20 D 10K 10K 10K 10K 10K 0.1µF 10µF 0.1µF C1 C5 DNP V+ 0.1µF 10µF TP6 TP7 R27 C9 SDO SDI DNP J2 U1 7 1µF RRR2755DDDNNNPPPW10 FCFRSSCDLLDDSSCDLSSRAAKRTLORCCK12 S1357911111e13579rial 111112H0246802468eader PGSSGGGDCDPPPPANLIIIIOOOO1234 RRRR34220 0000 ddddddddcssssulrdsscdddsatlioobskcs/ebeltlc212111122944678013123 ACSSIRURPSSLODVCDDDDSSSSVADLITBTNOODKCS/DSBDEETLLCVVVRVRARVEREGVROEFEFADNNHFFULFIDCCHBSNSTL 519817161115023again aavvrreeRffhl1ss 0 VOUT WV2ORUFTVB1O1RUFTB22OUTJP42468111112U024680T H111111357913579EADER W9 U2_R30+..101IN41%KW3R80 U2_-IN C11230µF V4- W15 5U2VOOSPPSAA8262171II U2_OUT R11003.10% TVPO3UT C P2 22 DGND AGND 4 RFB W7 C CSCFFSDLLRDDSSCDSLRSAAKRLITKRCC12 135791111113579 1111120246802468 GSSGGGCDPPPPALIIIIOOOO1234 1314111291078563412 J1 R101K8 DAC9881 R101K9 CRR1262608..0114%0K00pF Serial Header Bottom DNP +REFin EXTERNAL REFERENCE HIGH V+ W12 TP8 C2 0.1µF R12 6.04K VCC +5VA 8 0.1% B W11 1 R1K34 TP4 W8 R2K21 R102K9 3 U4A1 R23 VREFH B R47300K 2 R109K 0.1% 0.1% 2 OOPPAA22221717IU 409.1.9% C8 U3 R22 4 1000pF C101µ1F V+ 5782 TNNVR+CCIMGNDTEONMUCPT 136 3 905.1.3%K C2.221µF C0.41µF C22600pF C3 C18 REF5050ID C19 0.1µF 1µF 4 1µF V- +3.3VD+1.8VD+5VA VCC VSS -5VA +3.3VA VDD R32 J6 EXTERNAL REFERENCE LOW 10K 1 2 TP1 0.1% 3 4 U4B 5 6 -REFin R103K1 5 7 R26 VREFL 79 108 13 W4 0.1% 6 OOPPAA22221717IU 409.1.9% C101040pF ti A TP5 TP2 R2K24 C22 C13 J3 A 0.1% 2.2µF 2200pF 531 VCC = +15V Analog IOVDD 642 AIOVVDDDD = = + +21.7.7VV t oto + A5V.5DVD Analog 12500 TI Boulevard. Dallas, Texas 75243 R33 VSS = 0V to -15V Analog Title: DAC9881 EVM 100.1K% DEnragwinne eBry:: JJ.. PPAARRGGUUIIAANN DOCUMENTCONTROL # 6498233 REV: A FILE: DAC9881 Rev A.Sch DATE: 9-Mar-2009 SIZE: SHEET: 1OF: 1 1 2 3 4 5 6

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