® DAC7744 DAC7744 For most current data sheet and other product information, visit www.burr-brown.com 16-Bit, Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER FEATURES DESCRIPTION l LOW POWER: 200mW The DAC7744 is a 16-bit, quad voltage output digital- l UNIPOLAR OR BIPOLAR OPERATION to-analog converter with guaranteed 16-bit monotonic l SINGLE-SUPPLY OUTPUT RANGE: +10V performance over the specified temperature range. It accepts 16-bit parallel input data, has double-buffered l DUAL SUPPLY OUTPUT RANGE: – 10V DAC input logic (allowing simultaneous update of all l SETTLING TIME: 10m s to 0.003% DACs), and provides a readback mode of the internal l 16-BIT MONOTONICITY: –40(cid:176) C to +85(cid:176) C input registers. Programmable asynchronous reset l PROGRAMMABLE RESET TO MID-SCALE clears all registers to a mid-scale code of 8000H or to a zero-scale of 0000 . The DAC7744 operates from OR ZERO-SCALE H either a single +15V supply or from a +15V, –15V, l DATA READBACK and +5V supply. l DOUBLE-BUFFERED DATA INPUTS Low power and small size per DAC make the DAC7744 ideal for automatic test equipment, DAC-per-pin pro- APPLICATIONS grammers, data acquisition systems, and closed-loop servo-control. The DAC7744 is available in a 48- l PROCESS CONTROL lead SSOP package, and offers guaranteed specifica- l ATE PIN ELECTRONICS tions over the –40(cid:176) C to +85(cid:176) C temperature range. l CLOSED-LOOP SERVO-CONTROL l MOTOR CONTROL l DATA ACQUISITION SYSTEMS l DAC-PER-PIN PROGRAMMERS VREFL VREFH VDD VSS VCC AB Sense VREFL AB VREFH AB AB Sense DAC7744 16 I/O Input DAC DATA I/O Buffer Register A Register A DAC A VOUTA VOUTA Sense Input DAC Register B Register B DAC B VOUTB VOUTB Sense A1 Input DAC CAS0 CLoongtircol Register C Register C DAC C VOUTC R/W VOUTC Sense Input DAC Register D Register D DAC D VOUTD VOUTD Sense AGND DGND RST RSTSEL LOADDACs VREFL VREFL CD VREFH CD VREFH CD Sense CD Sense International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1999 Burr-Brown Corporation PDS-11534A PDrintAed Cin U7.S7.A4. 4November, 1999 SBAS120

SPECIFICATIONS (Dual Supply) At T = T to T , V = +15V, V = +5V, V = –15V, V H = +10V, and V L = –10V, unless otherwise noted. A MIN MAX CC DD SS REF REF DAC7744E DAC7744EB DAC7744EC PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS ACCURACY Linearity Error T = 25(cid:176)C – 3 [ – 2 LSB T to T – 4 [ – 3 LSB MIN MAX Linearity Match – 4 [ – 2 LSB Differential Linearity Error T = 25(cid:176)C – 3 – 2 – 1 LSB T to T – 3 – 2 – 1 LSB MIN MAX Monotonicity, T to T 14 15 16 Bits MIN MAX Bipolar Zero Error T = 25(cid:176)C – 0.01 – 0.025 [ [ % of FSR Bipolar Zero Error, T to T – 0.05 [ [ % of FSR MIN MAX Full-Scale Error T = 25(cid:176)C – 0.025 [ [ % of FSR Full-Scale Error, T to T – 0.05 [ [ % of FSR MIN MAX Bipolar Zero Matching Channel-to-Channel – 0.024 [ [ % of FSR Matching Full-Scale Matching Channel-to-Channel – 0.024 [ [ % of FSR Matching Power Supply Rejection Ratio (PSRR) At Full Scale 25 [ [ ppm/V ANALOG OUTPUT Voltage Output V L V H [ [ [ [ V REF REF Output Current – 5 [ [ mA Maximum Load Capacitance 500 [ [ pF Short-Circuit Current – 20 [ [ mA Short-Circuit Duration To V , V or GND Indefinite [ [ SS DD REFERENCE INPUT Ref High Input Voltage Range V L + 1.25 +10 [ [ [ [ V REF Ref Low Input Voltage Range –10 V H – 1.25 [ [ [ [ V REF Ref High Input Current –0.3 2.6 [ [ mA Ref Low Input Current –3.2 –0.3 [ [ mA DYNAMIC PERFORMANCE Settling Time To – 0.003%, 20V 9 11 [ [ [ [ m s Output Step Channel-to-Channel Crosstalk See Figure 5 0.5 [ [ LSB Digital Feedthrough 2 [ [ nV-s Output Noise Voltage f = 10kHz 60 [ [ nV/(cid:214) Hz DIGITAL INPUT V 0.7 • V V [ [ V IH DD DD V 0 0.3 • V [ V IL DD I – 10 [ m A IH I – 10 [ m A IL DIGITAL OUTPUT V I = –0.8mA 3.6 4.5 [ [ [ [ V OH OH V I = 1.6mA 0.3 0.4 [ [ [ [ V OL OL POWER SUPPLY V +4.75 +5.0 +5.25 [ [ [ [ [ [ V DD V +14.25 +15.0 +15.75 [ [ [ [ [ [ V CC V –14.25 –15.0 –15.75 [ [ [ [ [ [ V SS I 50 [ [ m A DD I 6 [ [ mA CC I –5 [ [ mA SS Power 170 200 [ [ mW TEMPERATURE RANGE Specified Performance –40 +85 [ [ [ [ (cid:176)C [ Specifications same as grade to the left. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® DAC7744 2

SPECIFICATIONS (Single Supply) At T = T to T , V = +15V, V = +5V, V = GND, V H = +10V, and V L = +50mV, unless otherwise noted. A MIN MAX CC DD SS REF REF DAC7744E DAC7744EB DAC7744EC PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS ACCURACY Linearity Error(1) T = 25(cid:176)C – 3 [ – 2 LSB T to T – 4 [ – 3 LSB MIN MAX Linearity Match – 4 [ – 2 LSB Differential Linearity Error T = 25(cid:176)C – 3 – 2 – 1 LSB T to T – 3 – 2 – 1 LSB MIN MAX Monotonicity, T to T 14 15 16 Bits MIN MAX Unipolar Zero T = 25(cid:176)C – 0.01 – 0.025 [ [ % of FSR Unipolar Zero Error, T to T – 0.05 [ [ % of FSR MIN MAX Full-Scale Error T = 25(cid:176)C – 0.025 [ [ % of FSR Full-Scale Error, T to T – 0.05 [ [ % of FSR MIN MAX Unipolar Zero Matching Channel-to-Channel – 0.024 [ [ % of FSR Matching Full-Scale Matching Channel-to-Channel – 0.024 [ [ % of FSR Matching Power Supply Rejection Ratio (PSRR) At Full Scale 25 [ [ ppm/V ANALOG OUTPUT Voltage Output V L = 0V, V = 0V 0 V H [ [ [ [ V REF SS REF R = 10kW Output Current – 5 [ [ mA Maximum Load Capacitance 500 [ [ pF Short-Circuit Current – 20 [ [ mA Short-Circuit Duration To V , V or GND Indefinite [ [ SS CC REFERENCE INPUT Ref High Input Voltage Range V L + 1.25 +10 [ [ [ [ V REF Ref Low Input Voltage Range 0 V H – 1.25 [ [ [ [ V REF Ref High Input Current –0.3 1.0 [ [ mA Ref Low Input Current –1.5 –0.3 [ [ mA DYNAMIC PERFORMANCE Settling Time To – 0.003%, 10V 8 10 [ [ [ [ m s Output Step Channel-to-Channel Crosstalk See Figure 6 0.5 [ [ LSB Digital Feedthrough 2 [ [ nV-s Output Noise Voltage f = 10kHz 60 [ [ nV/(cid:214) Hz DIGITAL INPUT V 0.7 • V V [ [ V IH DD DD V 0 0.3 • V [ V IL DD I – 10 [ m A IH I – 10 [ m A IL DIGITAL OUTPUT V I = –0.8mA 3.6 4.5 [ [ [ [ V OH OH V I = 1.6mA 0.3 0.4 [ [ [ [ V OL OL POWER SUPPLY V +4.75 +5.0 +5.25 [ [ [ [ [ [ V DD V +14.25 +15.0 +15.75 [ [ [ [ [ [ V CC V 0 [ [ V SS I 50 [ [ m A DD I 3.5 [ [ mA CC Power 50 70 [ [ mW TEMPERATURE RANGE Specified Performance –40 +85 [ [ [ [ (cid:176)C [ Specifications same as grade to the left. NOTE: (1) If V = 0V, the specification applies at code 0021 and above, due to possible negative zero scale error. SS H ® 3 DAC7744

ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC V to V ...........................................................................–0.3V to +32V DISCHARGE SENSITIVITY CC SS V to AGND......................................................................–0.3V to +16V CC V to AGND......................................................................+0.3V to –16V SS This integrated circuit can be damaged by ESD. Burr-Brown AGNDto DGND.................................................................–0.3V to +0.3V V Hto AGND.....................................................................–9V to +11V recommends that all integrated circuits be handled with REF VREFL to AGND......................................................................–11V to +9V appropriate precautions. Failure to observe proper handling V to GND...........................................................................–0.3V to +6V DD and installation procedures can cause damage. V Hto V L........................................................................–1V to 22V REF REF Digital Input Voltage to GND...................................–0.3V to VDD + 0.3V ESD damage can range from subtle performance degradation Digital Output Voltage to GND.................................–0.3V to V + 0.3V Maximum Junction Temperature.................................................D..D+150(cid:176)C to complete device failure. Precision integrated circuits may Operating Temperature Range........................................–40(cid:176)C to +85(cid:176)C be more susceptible to damage because very small parametric Storage Temperature Range.........................................–65(cid:176)C to +150(cid:176)C changes could cause the device not to meet its published Lead Temperature (soldering, 10s)...............................................+300(cid:176)C specifications. NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. PACKAGE/ORDERING INFORMATION LINEARITY DIFFERENTIAL PACKAGE SPECIFICATION ERROR NONLINEARITY DRAWING TEMPERATURE ORDERING TRANSPORT PRODUCT (LSB) (LSB) PACKAGE NUMBER RANGE NUMBER(1) MEDIA DAC7744E – 4 – 3 48-Lead SSOP 333 –40(cid:176)C to +85(cid:176)C DAC7744E Rails " " " " " " DAC7744E/1K Tape and Reel DAC7744EB – 4 – 2 48-Lead SSOP 333 –40(cid:176)C to +85(cid:176)C DAC7744EB Rails " " " " " " DAC7744EB/1K Tape and Reel DAC7744EC – 3 – 1 48-Lead SSOP 333 –40(cid:176)C to +85(cid:176)C DAC7744EC Rails " " " " " " DAC7744EC/1K Tape and Reel NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7744E/1K” will get a single 1000-piece Tape and Reel. ESD PROTECTION CIRCUITS V CC V CC RefH VOUT Sense RefH Sense V AGND OUT RefL Sense RefL V SS V 4 SS 1 of 2 1 of 4 V DD V DD Typ of Each Logic Input Pin DGND DGND Typ of Each I/O Pin ® DAC7744 4

PIN CONFIGURATION PIN DESCRIPTIONS Top View SSOP PIN NAME DESCRIPTION 1 DB15 Data Bit 15, MSB 2 DB14 Data Bit 14 3 DB13 Data Bit 13 DB15 (MSB) 1 48 NC 4 DB12 Data Bit 12 DB14 2 47 NC 5 DB11 Data Bit 11 6 DB10 Data Bit 10 DB13 3 46 NC 7 DB9 Data Bit 9 DB12 4 45 NC 8 DB8 Data Bit 8 9 DB7 Data Bit 7 DB11 5 44 V A Sense OUT 10 DB6 Data Bit 6 DB10 6 43 V A OUT 11 DB5 Data Bit 5 DB9 7 42 V L AB Sense 12 DB4 Data Bit 4 REF 13 DB3 Data Bit 3 DB8 8 41 V L AB REF 14 DB2 Data Bit 2 DB7 9 40 VREFH AB 15 DB1 Data Bit 1 DB6 10 39 V H AB Sense 16 DB0 Data Bit 0, LSB REF 17 RSTSEL Reset Select. Determines the action of RST. If DB5 11 38 VOUTB Sense HIGH, a RST command will set the DAC regis- ters to mid-scale. If LOW, a RST command will DB4 12 37 V B DAC7744 OUT set the DAC registers to zero. DB3 13 36 VOUTC Sense 18 RST Reset, Edge-Triggered. Depending on the state of RSTSEL, the DAC Input and Output registers DB2 14 35 V C OUT are set to either mid-scale or zero. DB1 15 34 V H CD Sense 19 LOADDACs DAC Output Registers Load Control. Rising edge REF triggered. DB0 (LSB) 16 33 V H CD REF 20 R/W Enabled by the CS, controls data read and write RSTSEL 17 32 V L CD from the input register. REF 21 A1 Enabled by the CS, in combination with A0 RST 18 31 V L CD Sense REF selects the Individual DAC Input Registers. LOADDACs 19 30 V D Sense 22 A0 Enabled by the CS, in combination with A1 OUT selects the individual DAC input registers. R/W 20 29 V D OUT 23 CS Chip Select, Active LOW. A1 21 28 V 24 DGND Digital Ground SS 25 V Positive Power Supply A0 22 27 AGND DD 26 V Positive Power Supply CC CS 23 26 V CC 27 AGND Analog Ground DGND 24 25 VDD 28 VSS Negative Power Supply 29 V D DAC D Voltage Output OUT 30 V D Sense DAC D’s Output Amplifier Inverting Input. Used OUT to close the feedback loop at the load. 31 V L CD Sense DAC C and D Reference Low Sense Input REF 32 V L CD DAC C and D Reference Low Input REF 33 V H CD DAC C and D Reference High Input REF 34 V H CD Sense DAC C and D Reference High Sense Input REF 35 V C DAC C Voltage Output OUT 36 V C Sense DAC C’s Output Amplifier Inverting Input. Used OUT to close the feedback loop at the load. 37 V B DAC B Voltage Output OUT 38 V B Sense DAC B’s Output Amplifier Inverting Input. Used OUT to close the feedback loop at the load. 39 V H AB Sense DAC A and B Reference High Sense Input REF 40 V H AB DAC A and B Reference High Input REF 41 V L AB DAC A and B Reference Low Input REF 42 V L AB Sense DAC A and B Reference Low Sense Input REF 43 V A DAC A Voltage Input OUT 44 V A Sense DAC A’s Output Amplifier Inverting Input. Used OUT to close the feedback loop at the load. 45 NC No Connection 46 NC No Connection 47 NC No Connection 48 NC No Connection ® 5 DAC7744

TYPICAL PERFORMANCE CURVES: V = 0V SS At T = +25(cid:176)C, V = +5V, V = +15V, V = 0, V H= +10V, and V L= 0V, representative unit, unless otherwise specified. A DD CC SS REF REF (cid:176) +25 C LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +25°C) (DAC B, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 B) 0.5 B) 0.5 S S L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, +25°C) (DAC D, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 E (L –0.05 E (L –0.05 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 DLE (L ––01..050 DLE (L ––01..050 –1.5 –1.5 –2.0 –2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code Digital Input Code (cid:176) +85 C LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +85°C) (DAC B, +85°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code ® DAC7744 6

TYPICAL PERFORMANCE CURVES: V = 0V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = 0, V H= +10V, and V L= 0V, representative unit, unless otherwise specified. A DD CC SS REF REF (cid:176) +85 C (cont.) LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, +85°C) (DAC D, +85°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 E (L –0.05 E (L –0.05 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 DLE (L ––01..050 DLE (L ––01..050 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code (cid:176) –40 C LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, –40°C) (DAC B, –40°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 E (L –0.05 E (L –0.05 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 DLE (L ––01..050 DLE (L ––01..050 –1.5 –1.5 –2.0 –2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code Digital Input Code LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, –40°C) (DAC D, –40°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code ® 7 DAC7744

TYPICAL PERFORMANCE CURVES: V = 0V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = 0, V H= +10V, and V L= 0V, representative unit, unless otherwise specified. A DD CC SS REF REF ZERO-SCALE ERROR vs TEMPERATURE FULL-SCALE ERROR vs TEMPERATURE 2 2 CCooddee ((00004201 )) Code (FFFF ) HH H 1.5 DAC B DAC D V) 1.5 DAC B DAC D or (mV) 0.15 Error (m 0.15 e Err 0 cale 0 al S Zero-Sc –0–.51 DAC A DAC C sitive Full- –0–.51 DAC A DAC C o –1.5 P –1.5 –2 –2 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 Temperature (°C) Temperature (°C) CURRENT vs CODE CURRENT vs CODE All DACs Sent to Indicated Code All DACS Sent to Indicated Code (DAC A and B) (DAC C and D) V V REFH REFH 1.0 1.0 A) 0.8 A) 0.8 V Current (mREF ––00000.....642024 V Current (mREF ––00000.....642024 V V REFL REFL 0 0 mA) –0.2 mA) –0.2 V Current (REF ––––––000111......468024 V Current (REF ––––––000111......468024 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code Digital Input Code POSITIVE SUPPLY CURRENT POWER SUPPLY CURRENT vs TEMPERATURE vs DIGITAL INPUT CODE 4.0 4.0 Data = FFFF (all DACs) No Load 3.5 H 3.5 No Load I CC A) 3.0 3.0 m ent Current ( 221...505 I (mA)CC 221...505 sc 1.0 Quie 0.5 1.0 I DD 0.5 0 –0.5 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 0 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Temperature (°C) Digital Input Code ® DAC7744 8

TYPICAL PERFORMANCE CURVES: V = 0V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = 0, V H= +10V, and V L= 0V, representative unit, unless otherwise specified. A DD CC SS REF REF OUTPUT VOLTAGE vs SETTLING TIME OUTPUT VOLTAGE vs SETTLING TIME (0V to +10V) (+10V to 0V) Large-Signal Settling Time: 5V/div Voltage Small-Signal Settling Time: 3LSB/div Voltage Small-Signal Settling Time: 3LSB/div Output Output Large-Signal Settling Time: 5V/div +5V +5V LDAC LDAC 0 0 Time (2µs/div) Time (2µs/div) OUTPUT VOLTAGE OUTPUT VOLTAGE MIDSCALE GLITCH PERFORMANCE MIDSCALE GLITCH PERFORMANCE v) v) di di V/ V/ m m 0 0 e (5 7FFFH to 8000H e (5 8000H to 7FFFH g g a a olt olt V V ut ut p p ut ut O O +5V +5V LDAC LDAC 0 0 Time (1µs/div) Time (1µs/div) OUTPUT NOISE VOLTAGE vs FREQUENCY BROADBAND NOISE 120 100 v) V/di Hz) 80 m20 (cid:214)V/ Voltage ( Noise (n 6400 e s Noi 20 BW = 10kHz Code = 8000 H 0 100 1k 10k 100k 1M Time (100m s/div) Frequency (Hz) ® 9 DAC7744

TYPICAL PERFORMANCE CURVES: V = 0V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = 0, V H= +10V, and V L= 0V, representative unit, unless otherwise specified. A DD CC SS REF REF LOGIC SUPPLY CURRENT vs LOGIC INPUT LEVEL FOR DATA BITS OUTPUT VOLTAGE vs R LOAD 12 16 14 10 A) m 12 nt ( 8 Source e 10 urr V) ply C 6 (OUT 8 p V u 6 S 4 c gi 4 o L 2 2 Sink 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.01 0.1 1 10 100 Logic Input Level for Data Bits (V) R (kW ) LOAD SINGLE-SUPPLY CURRENT LIMIT vs INPUT CODE POWER SUPPLY REJECTION RATIO vs FREQUENCY 20 0 Short to Ground 15 –10 –20 10 –30 A) 5 dB) –40 +15V I (mOUT –05 PSRR ( –50 –60 +5V –10 –70 –15 Short to V –80 CC –20 –90 0000 2000 4000 6000 8000 A000 0000 E000 FFFF 100 1k 10k 100k 1M H H H H H H H H H Input Code Frequency (Hz) DIGITAL-TO-ANALOG OUTPUT GLITCH v) di V/ m 0 e (5 2LSB/div g a olt V ut utp +5V O CS 0 Time (500ns/div) ® DAC7744 10

TYPICAL PERFORMANCE CURVES: V = –15V SS At T = +25(cid:176)C, V = +5V, V = +15V, V = –15V, V H= +10V, and V L= –10V, representative unit, unless otherwise specified. A DD CC SS REF REF (cid:176) +25 C LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +25°C) (DAC B, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 B) 0.5 B) 0.5 S S L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, +25°C) (DAC D, +25°C) 2.0 2.0 1.5 1.5 1.0 B) 10..05 SB) 0.5 S L 0 LE (L ––01..050 LE ( ––01..50 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 SB) 10..05 DLE (LS ––001...5050 DLE (L ––01..050 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code (cid:176) +85 C LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +85°C) (DAC B, +85°C) 2.0 2.0 1.5 1.5 LE (LSB) ––1001....05050 LE (LSB) ––1001....05050 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 DLE (LSB) ––1001....05050 DLE (LSB) ––1001....05050 –1.5 –1.5 –2.0 –2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code Digital Input Code ® 11 DAC7744

TYPICAL PERFORMANCE CURVES: V = –15V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = –15V, V H= +10V, and V L= –10V, representative unit, unless otherwise specified. A DD CC SS REF REF (cid:176) +85 C (cont.) LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, +85°C) (DAC D, +85°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code (cid:176) –40 C LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, –40°C) (DAC B, –40°C) 2.0 2.0 1.5 1.5 1.0 1.0 B) 0.5 B) 0.5 S S L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, –40°C) (DAC D, –40°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 2.0 2.0 1.5 1.5 B) 1.0 B) 1.0 S 0.5 S 0.5 LE (L –0.05 LE (L –0.05 D –1.0 D –1.0 –1.5 –1.5 –2.0 –2.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code ® DAC7744 12

TYPICAL PERFORMANCE CURVES: V = –15V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = –15V, V H= +10V, and V L= –10V, representative unit, unless otherwise specified. A DD CC SS REF REF CURRENT vs CODE CURRENT vs CODE All DACs Sent to Indicated Code All DACs Sent to Indicated Code (DAC A and B) (DAC C and D) V V REFH REFH 2.0 2.0 A) 1.5 A) 1.5 m m ent ( 10..05 ent ( 10..05 urr 0 urr 0 CREF –-01..50 CREF ––01..50 V –1.5 V –1.5 V V REFL REFL 0.5 0.5 mA) 0 mA) 0 ent ( ––01..50 ent ( ––01..50 urr –1.5 urr –1.5 CREF ––22..05 CREF ––22..05 V –3.0 V –3.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code BIPOLAR ZERO SCALE ERROR vs TEMPERATURE POSITIVE FULL-SCALE ERROR vs TEMPERATURE (Code 8000H) (Code FFFFH) 2 2 1.5 1.5 V) V) m m DAC B Error ( 0.15 DAC B DAC D Error ( 10..05 DAC D ero Scale –0.05 DAC A Full-Scale –0.05 DAC A polar Z –1 DAC C ositive –1.0 DAC C Bi –1.5 P –1.5 –2 –2.0 –40 –20 0 20 40 60 80 100 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 Temperature (°C) Temperature (°C) NEGATIVE FULL-SCALE ERROR vs TEMPERATURE (Code 0000 ) POWER SUPPLY CURRENT vs TEMPERTURE H 2 7 6 V) 1.5 5 or (m 1.0 DAC B DAC D mA) 43 ICC Err 0.5 nt ( 2 Scale 0 Curre 10 gative Full- ––01..50 DAC A DAC C Quiescent ––––1234 IDD ISS Ne –1.5 –5 Data = FFFFH (all DACs) –6 No Load –2.0 –7 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 Temperature (°C) Temperature (°C) ® 13 DAC7744

TYPICAL PERFORMANCE CURVES: V = –15V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = –15V, V H= +10V, and V L= –10V, representative unit, unless otherwise specified. A DD CC SS REF REF OUTPUT VOLTAGE vs R SUPPLY CURRENT vs CODE LOAD 15 7 I 6 CC 5 10 Source 4 3 5 2 (V)T 0 mA) 10 IDD OU ( 1 V 2 –5 3 I Sink 4 SS –10 5 6 –15 7 0.01 0.1 1 10 100 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH R (kW ) Digital Input Code LOAD OUTPUT VOLTAGE vs SETTLING TIME OUTPUT VOLTAGE vs SETTLING TIME (–10V to +10V) (+10V to –10V) Large-Signal Settling Time: 5V/div Small-Signal Settling Time: 3LSB/div e e g g a a olt Small-Signal Settling Time: 3LSB/div olt V V ut ut p p ut ut O O Large-Signal Settling Time: 5V/div +5V +5V LDAC LDAC 0 0 Time (2µs/div) Time (2µs/div) DUAL SUPPLY CURRENT LIMIT vs INPUT CODE Short to Ground POWER SUPPLY REJECTION RATIO vs FREQUENCY 20 0 15 –10 –20 10 –30 A) 5 B) –40 (mUT 0 RR (d –50 –15V IO –5 PS –60 +15V –70 –10 –80 –15 –90 +5V –20 –100 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH 100 1k 10k 100k 1M Digital Input Code Frequency (Hz) ® DAC7744 14

TYPICAL PERFORMANCE CURVES: V = –15V (Cont.) SS At T = +25(cid:176)C, V = +5V, V = +15V, V = –15V, V H= +10V, and V L= –10V, representative unit, unless otherwise specified. A DD CC SS REF REF OUTPUT VOLTAGE OUTPUT VOLTAGE MID-SCALE GLITCH PERFORMANCE MID-SCALE GLITCH PERFORMANCE v) v) di di V/ V/ m m 0 0 e (5 7FFFH to 8000H e (5 8000H to 7FFFH g g a a olt olt V V ut ut p p ut ut O O +5V +5V LDAC LDAC 0 0 Time (1µs/div) Time (1µs/div) ® 15 DAC7744

THEORY OF OPERATION by the external voltage references (V L and V H, re- REF REF spectively). The digital input is a 16-bit parallel word and The DAC7744 is a quad voltage output, 16-bit digital-to- the DAC input registers offer a readback capability. The analog converter (DAC). The architecture is an R-2R ladder converters can be powered from either a single +15V supply configuration with the three MSB’s segmented followed by or a dual – 15V supply. The device offers a reset function an operational amplifier that serves as a buffer. Each DAC which immediately sets all DAC output voltages and DAC has its own R-2R ladder network, segmented MSBs and registers to mid-scale code 8000 or to zero scale, code H output op amp (see Figure 1). The minimum voltage output 0000 . See Figures 2 and 3 for the basic operation of the H (zero scale) and maximum voltage output (full scale) are set DAC7744. R F V Sense OUT R VOUT 2R 2R 2R 2R 2R 2R 2R 2R 2R V H REF V H Sense REF V L REF V L Sense REF FIGURE 1. DAC7744 Architecture. 1 DB15 (MSB) NC 48 2 DB14 NC 47 3 DB13 NC 46 4 DB12 NC 45 5 DB11 VOUTA Sense 44 6 DB10 VOUTA 43 0V to +10V 7 DB9 VREFL AB Sense 42 Data 8 DB8 VREFL AB 41 Bus 9 DB7 VREFH AB 40 +10.000V 10 DB6 VREFH AB Sense 39 11 DB5 VOUTB Sense 38 12 DB4 DAC7744 VOUTB 37 0V to +10V 13 DB3 VOUTC Sense 36 14 DB2 VOUTC 35 0V to +10V 15 DB1 VREFH CD Sense 34 16 DB0 (LSB) VREFH CD 33 +10.000V 17 RSTSEL VREFL CD 32 Reset DACs 18 RST VREFL CD Sense 31 Load DAC Registers 19 LOADDACS VOUTD Sense 30 READ/WRITE 20 R/W VOUTD 29 0V to +10V Address 21 A1 VSS 28 22 A0 AGND 27 Chip Select 23 CS VCC 26 + +15V 0.1µF 1µF 24 DGND VDD 25 NC = No Connection +5V + 0.1µF 1µF FIGURE 2. Basic Single-Supply Operation of the DAC7744. ® DAC7744 16

1 DB15 (MSB) NC 48 2 DB14 NC 47 3 DB13 NC 46 4 DB12 NC 45 5 DB11 VOUTA Sense 44 6 DB10 VOUTA 43 –10V to +10V 7 DB9 VREFL AB Sense 42 Data 8 DB8 VREFL AB 41 –10V Bus 9 DB7 VREFH AB 40 +10V 10 DB6 VREFH AB Sense 39 11 DB5 VOUTB Sense 38 12 DB4 DAC7744 VOUTB 37 –10V to +10V 13 DB3 VOUTC Sense 36 14 DB2 VOUTC 35 –10V to +10V 15 DB1 VREFH CD Sense 34 16 DB0 (LSB) VREFH CD 33 +10V +5V 17 RSTSEL VREFL CD 32 –10V Reset DACs 18 RST VREFL CD Sense 31 Load DAC Registers 19 LOADDACS VOUTD Sense 30 READ/WRITE 20 R/W VOUTD 29 –10V to +10V –15V Address 21 A1 VSS 28 0.1µF 1µF + 22 A0 AGND 27 Chip Select 23 CS VCC 26 + +15V 0.1µF 1µF 24 DGND VDD 25 NC = No Connection + +5V 0.1µF 1µF FIGURE 3. Basic Dual-Supply Operation of the DAC7744. ANALOG OUTPUTS allows the loop around the output amplifier to be closed at When V = –15V (dual supply operation), the output ampli- the load, thus ensuring an accurate output voltage, as shown SS fier can swing to within 4V of the supply rails, guaranteed in Figure 4. over the –40(cid:176) C to +85(cid:176) C temperature range. With V = 0V SS (single-supply operation), and with R also connected to LOAD ground, the output can swing to ground. Care must also be DAC7744 NC 48 taken when measuring the zero-scale error when V = 0V. SS NC 47 Since the output voltage cannot swing below ground, the output voltage may not change for the first few digital input NC 46 R codes (0000 , 0001 , 0002 , etc.), if the output amplifier has NC 45 W1 H H H a negative offset. At the negative limit of –5mV, the first V A Sense 44 OUT R specified output starts at code 0021 . W2 H VOUTA 43 VOUT Due to the high accuracy of these D/A converters, system VREFL AB Sense 42 RLOAD design problems such as grounding and contact resistance V L AB 41 REF become very important. A 16-bit converter with a 10V full- +V V H AB 40 scale range has a 1LSB value of 152m V. With a load current REF V H AB Sense 39 +10V of 1mA, series wiring and connector resistance of only REF 150mW (R ) will cause a voltage drop of 150m V, as shown VOUTB Sense 38 RW1 W2 in Figure 4. To understand what this means in terms of a V B 37 OUT R W2 system layout, the resistivity of a typical 1 ounce copper-clad V OUT printed circuit board is 1/2 mW per square. For a 1mA load, R LOAD a 20 milli-inch wide printed circuit conductor 6 inches long will result in a voltage drop of 150m V. The DAC7744 offers a force and sense output configuration FIGURE 4. Analog Output Closed-Loop Configuration for the high open-loop gain output amplifiers. This feature (1/2 DAC7744). R represents wiring resis- W tances. ® 17 DAC7744

REFERENCE INPUTS microamps to approximately 2.0mA. The reference input The reference inputs, V L and V H, can be any voltage appears as a varying load to the reference. If the reference REF REF between V + 4V and V – 4V, provided that V H is at can sink or source the required current, a reference buffer is SS CC REF least 1.25V greater than V L. The minimum output of not required. The DAC7744 features a reference drive and REF each DAC is equal to V L plus a small offset voltage sense connection such that the internal errors caused by the REF (essentially, the offset of the output op amp). The maximum changing reference current and the circuit impedances can be output is equal to V H plus a similar offset voltage. Note minimized. Figures 5 through 12 show different reference REF that V (the negative power supply) must either be configurations and the effect on the linearity and differential SS connected to ground or must be in the range of –14.25V to linearity. –15.75V. The voltage on V sets several bias points within The analog supplies (or the analog supplies and the reference SS the converter. If V is not in one of these two configura- power supplies) have to come up first. If the power supplies SS tions, the bias values may be in error and proper operation for the reference come up first, then the V and V CC SS of the device is not guaranteed. supplies will be “powered from the reference via the ESD The current into the V H input and out of V L depends protection diode”, see page 4. REF REF on the DAC output voltages and can vary from a few NC 48 NC 47 NC 46 NC 45 +V V A Sense 44 OUT OPA2234 DAC7744 VOUTA 43 VOUT V L AB Sense 42 REF 100W 2200pF V L AB 41 –10V REF 1000pF VREFH AB 40 100W –V V H AB Sense 39 REF 1000pF 2200pF +V V B Sense 38 OUT V B 37 OUT V +10V OUT FIGURE 5. Dual Supply Configuration-Buffered References, used for Dual Supply Performance Curves (1/2 DAC7744). NC 48 NC 47 NC 46 NC 45 +V V A Sense 44 OUT DAC7744 VOUTA 43 VOUT VREFL AB Sense 42 100W 2200pF 2kW V L AB 41 OPA350 REF 1000pF +0.050V VREFH AB 40 100W V H AB Sense 39 99kW REF 1000pF +V 2200pF V B Sense 38 OUT OPA227 VOUTB 37 +10V V OUT NOTE: V L has been chosen to be 50mV to allow for current sinking voltage REF drops across the 100W resistor and the output stage of the buffer op amp. FIGURE 6. Single-Supply Buffered Reference with a Reference Low of 50mV Used for Single-Supply Performance Curves (1/2 DAC7744). ® DAC7744 18

LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +25°C) (DAC B, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 1.0 1.0 B) 0.5 B) 0.5 S S E (L 0 E (L 0 L L D –0.5 D –0.5 –1.0 –1.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, +25°C) (DAC D, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 1.0 1.0 B) 0.5 B) 0.5 S S E (L 0 E (L 0 L L D –0.5 D –0.5 –1.0 –1.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code FIGURE 7. Integral Linearity and Differential Linearity Error Curves for Figure 8. NC 48 NC 47 NC 46 NC 45 +V V A Sense 44 OUT OPA2234 DAC7744 V A 43 V OUT OUT V L AB Sense 42 REF 100W 2200pF –5V V L AB 41 REF 1000pF –V VREFH AB 40 100W V H AB Sense 39 REF 1000pF 2200pF V B Sense 38 OUT +V V B 37 OUT +5V V OUT –V FIGURE 8. Dual-Supply Buffered Referenced with V L = –5V and V H = +5V (1/2 DAC7744). REF REF ® 19 DAC7744

NC 48 NC 47 NC 46 NC 45 +V V A Sense 44 OUT DAC7744 V A 43 V OUT OUT VREFL AB Sense 42 100W 2200pF 1kW V L AB 41 OPA350 REF 1000pF 0.05V VREFH AB 40 100W V H AB Sense 39 99kW REF 1000pF +V 2200pF V B Sense 38 OUT OPA227 VOUTB 37 +5V V OUT FIGURE 9. Single-Supply Buffered Reference with a Reference Low of 50mV and Reference High of +5V. LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +25°C) (DAC B, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 L 0 L 0 E ( –0.5 E ( –0.5 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 1.0 1.0 B) 0.5 B) 0.5 S S E (L 0 E (L 0 L L D –0.5 D –0.5 –1.0 –1.0 0000 2000 4000 6000 8000 A000 C000 E000 FFFF 0000 2000 4000 6000 8000 A000 C000 E000 FFFF H H H H H H H H H H H H H H H H H H Digital Input Code Digital Input Code LINEARITY ERROR AND LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C, +25°C) (DAC D, +25°C) 2.0 2.0 1.5 1.5 1.0 1.0 SB) 0.5 SB) 0.5 E (L –0.05 E (L –0.05 L –1.0 L –1.0 –1.5 –1.5 –2.0 –2.0 1.0 1.0 B) 0.5 B) 0.5 S S E (L 0 E (L 0 DL –0.5 DL –0.5 –1.0 –1.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code Digital Input Code FIGURE 10. Integral Linearity and Differential Linearity Error Curves for Figure 9. ® DAC7744 20

INPUT DAC A1 A0 R/W CS RST RSTSEL LOADDACS REGISTER REGISTER MODE DAC L L L L X X X Write Hold Write Input A L H L L X X X Write Hold Write Input B H L L L X X X Write Hold Write Input C H H L L X X X Write Hold Write Input D L L H L X X X Read Hold Read Input A L H H L X X X Read Hold Read Input B H L H L X X X Read Hold Read Input C H H H L X X X Read Hold Read Input D X X X H X X › Hold Write Update All X X X H X X H Hold Hold Hold All X X X X › L X Reset to Zero Reset to Zero All X X X X › H X Reset to Midscale Reset to Midscale All TABLE I. DAC7744 Logic Truth Table. DIGITAL INTERFACE DIGITALLY-PROGRAMMABLE CURRENT SOURCE Table I shows the basic control logic for the DAC7744. Note that each DAC register is edge triggered and not level The DAC7744 offers a unique set of features that allows a triggered. When the LOADDACS signal is transitioned to wide range of flexibility in designing applications circuits HIGH, the digital word currently in the DAC register is such as programmable current sources. The DAC7744 offers latched. The first set of registers (the input registers) are both a differential reference input as well as an open-loop triggered via the A0, A1, R/W, and CS inputs. Only one of configuration around the output amplifier. The open-loop these registers is transparent at any given time. configuration around the output amplifier allows transistor to be placed within the loop to implement a digitally- The double-buffered architecture is designed mainly so that programmable, uni-directional current source. The availabil- each DAC input register can be written to at any time and ity of a differential reference also allows programmability then all DAC voltages updated simultaneously by the rising for both the full-scale and zero-scale currents. The output edge of LOADDACS. It also allows a DAC input register to current is calculated as: be written to at any point then the DAC output voltages can be synchronously changed via a trigger signal connected to LOADDACS. I =(cid:230)(cid:231) (cid:230)(cid:231) VREFH–VREFL(cid:246)(cid:247) •(cid:230)(cid:231) N (cid:246)(cid:247) (cid:246)(cid:247) (2) OUT Ł Ł R ł Ł 65,536ł ł SENSE DIGITAL TIMING ( ) + V L/R REF SENSE Figure 11 and Table II provide detailed timing for the digital interface of the DAC7744. Figure 12 shows a DAC7744 in a 4-to-20mA current output configuration. The output current can be determined by DIGITAL INPUT CODING Equation 3: The DAC7744 input data is in Straight Binary format. The (3) output voltage is given by Equation 1. (cid:230) (cid:230) 5V–1V(cid:246) (cid:230) N (cid:246) (cid:246) (cid:230) 1V (cid:246) V =V L+(VREFH–VREFL)•N (1) IOUT =Ł(cid:231) Ł 250W ł •Ł(cid:231) 65,536ł(cid:247) ł(cid:247) +Ł 25W0 ł OUT REF 65,536 where N is the digital input code. This equation does not At full scale, the output current is 16mA plus the 4mA for include the effects of offset (zero scale) or gain (full scale) the zero current. At zero scale, the output current is the offset errors. current of 4mA (1V/250W ). ® 21 DAC7744

t WCS CS t t WS WH R/W t RCS CS tAS tAH tRDS tRDH A0/A1 t R/W t t LH LS LX tAS tAH LOADDACS tLWD A0/A1 tDS tDH – 0.E0r0r3o%r B oafn FdSR t Data In DZ Data Out Data Valid tS t CSD V OUT Data Read Timing Data Write Timing – 0.003% of FSR t t Error Band SS SH RESET SEL t RSH t RSS RST +FS V ,RESET SEL LOW OUT –FS +FS V ,RESET SEL HIGH MS OUT –FS DAC7744 Reset Timing FIGURE 11. Digital Input and Output Timing. SYMBOL DESCRIPTION MIN TYP MAX UNITS t CS LOW for Read 100 ns RCS t R/W HIGH to CS LOW 10 ns RDS t R/W HIGH after CS HIGH 10 ns RDH t CS HIGH to Data Bus in High Impedance 10 70 ns DZ t CS LOW to Data Bus Valid 85 130 ns CSD t CS LOW for Write 40 ns WCS t R/W LOW to CS LOW 0 ns WS t R/W LOW after CS HIGH 10 ns WH t Address Valid to CS LOW 0 ns AS t Address Valid after CS HIGH 15 ns AH t CS LOW to LOADDACS HIGH 40 ns LS t CS LOW after LOADDACS HIGH 80 ns LH t LOADDACS HIGH 40 ns LX t Data Valid to CS LOW 0 ns DS t Data Valid after CS HIGH 15 ns DH t LOADDACS LOW 40 ns LWD t RSTSEL Valid Before RESET HIGH 0 ns SS t RSTSEL Valid After RESET HIGH 120 ns SH t RESET LOW Before RESET HIGH 10 ns RSS t RESET LOW After RESET HIGH 10 ns RSH t Settling Time 11 m s S TABLE II. Timing Specifications (T = –40(cid:176) C to +85(cid:176) C). A ® DAC7744 22

I OUT V PROGRAMMED DAC7744 NC 48 R SENSE 250W NC 47 NC 46 NC 45 +V V A Sense 44 OUT OPA2350 V A 43 OUT VREFL AB Sense 42 100W 2200pF 20kW V L AB 41 REF 1000pF +1.0V VREFH AB 40 100W V H AB Sense 39 80kW REF 1000pF +V 2200pF V B Sense 38 OUT V B 37 OUT I OUT V PROGRAMMED R SENSE 250W GND FIGURE 12. 4-to-20mA Digitally-Controlled Current Source (1/2 DAC7744). ® 23 DAC7744

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) DAC7744E ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) DAC7744E/1K ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) DAC7744E/1KG4 ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) DAC7744EB ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) B DAC7744EB/1K ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) B DAC7744EC ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) C DAC7744EC/1K ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) C DAC7744ECG4 ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 DAC7744E & no Sb/Br) C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 28-Sep-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) DAC7744E/1K SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 DAC7744EB/1K SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 DAC7744EC/1K SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 28-Sep-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) DAC7744E/1K SSOP DL 48 1000 367.0 367.0 55.0 DAC7744EB/1K SSOP DL 48 1000 367.0 367.0 55.0 DAC7744EC/1K SSOP DL 48 1000 367.0 367.0 55.0 PackMaterials-Page2

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