D2TO35 www.vishay.com Vishay Sfernice Surface Mount Power Resistor Thick Film Technology FEATURES • AEC-Q200 qualified • 35 W at 25 °C case temperature • Surface mounted resistor - TO-263 (D2PAK) style package • Wide resistance range from 0.01  to 550 k • Non inductive • Resistor isolated from metal tab DESIGN SUPPORT TOOLS AVAILABLE • Solder reflow secure at 270 °C/10 s 3DD 33D • Material categorization: for definitions of complianc e 3D Models please see www.vishay.com/doc?99912 DIMENSIONS in millimeters 4.5 1.25 Footprint recommendation for 10.5 8.7 solderable contact area: 7.8 min. 5 1.2 11.00 1.6 1.50 4.02 0.2 1 5 8. 10.1 8.8 1 6.50 5. 4 8.00 5. 7.6 1 4.00 2.49 2.8 2.2 5 2.40 1.6 0.3 5.08 0.26 2 Tolerance: ± 0.3 mm 4.5 Notes • For the assembly on board, we recommend the lead (Pb)-free thermal profile as per J-STD-020C • Power dissipation is 3.5 W at an ambient temperature of 25 °C when mounted on a double sided copper board using FR4 HTG, 70 μm of copper, 39 mm x 30 mm x 1.6 mm, with thermal vias STANDARD ELECTRICAL SPECIFICATIONS RESISTANCE RATED POWER LIMITING ELEMENT TEMPERATURE CRITICAL TOLERANCE MODEL SIZE RANGE P VOLTAGE U COEFFICIENT RESISTANCE 25 °C L ± %  W V ± ppm/°C  D2TO35 TO-263 0.01 to 550K 35 500 1, 2, 5, 10 150, 250, 700, 1100 7.14K MECHANICAL SPECIFICATIONS TECHNICAL SPECIFICATIONS Mechanical Protection Molded Power Rating and  35 W at 25 °C (case Thermal Resistance  temperature) Resistive Element Thick film of the Component R : 4.28 °C/W TH (j - c) Substrate Alumina Temperature Coefficient See Special Feature table Connections Tinned copper Standar d ± 150 ppm/°C Weight 2.2 g max. Dielectric Strength 2000 VRMS - 1 min - 10 mA max. IEC 60115-1 (between terminals and board) ENVIRONMENTAL SPECIFICATIONS Insulation Resistance 106 M Temperature Range -55 °C to +175 °C Inductance  0.1 μH IEC 60695-11-5 DIMENSIONS Flammability 2 applications 30 s separated by 60 s Standard Package TO-263 style (D2PAK) Revision: 20-Mar-2019 1 Document Number: 51058 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

D2TO35 www.vishay.com Vishay Sfernice SPECIAL FEATURES Resistance Values  0.010  0.045  0.1  0.5 Tolerances ± 1 % at ± 10 % Requirement Temperature Coefficient (TCR) (-55 °C +150 °C) ± 1100 ppm/°C ± 700 ppm/°C ± 250 ppm/°C ± 150 ppm/°C IEC 60115-1 PERFORMANCE TESTS CONDITIONS REQUIREMENTS IEC 60115-1 §4.13 1.7 Pr 5 s for R < 2  Momentary Overload ± (0.25 % + 0.005 ) 1.4 Pr 5 s for R  2  US < 1.5 UL IEC 60115-1 Load Life ± (1 % + 0.005 ) 1000 h, 90/30 Pr at +25 °C AEC-Q200 REV D conditions: High Temperature Exposure MIL-STD-202 method 108 ± (0.25 % + 0.005 ) 1000 h, +175 °C, unpowered Pre-conditioning 3 reflows according JESTD020D Temperature Cycling IEC 60068-2-14 test Na ± (0.5 % + 0.005 ) 1000 cycles, -55 °C, +175 °C Dwell time - 15 min AEC-Q200 REV D conditions: Moisture Resistance MIL-STD-202 method 106 ± (0.5 % + 0.005 ) 10 cycles, 24 h, unpowered AEC-Q200 REV D conditions: Biased Humidity MIL-STD-202 method 103 ± (1 % + 0.005 ) 1000 h, 85 °C, 85% RH AEC-Q200 REV D conditions: Pre-conditioning 3 reflows according Operational Life JESTD020D ± (1 % + 0.005 ) MIL-STD-202 method 108 2000 h, 90/30, powered, +125 °C AEC-Q200 REV D conditions: ESD Human Body Model AEC-Q200-002 ± (0.5 % + 0.005 ) 25 kV AD AEC-Q200 REV D conditions: MIL-STD-202 method 204 Vibration ± (0.5 % + 0.005 ) 5 g’s for 20 min, 12 cycles test from 10 Hz to 2000 Hz AEC-Q200 REV D conditions: MIL-STD-202 method 213 Mechanical Shock ± (0.5 % + 0.005 ) 100 g’s, 6 ms, 3.75 m/s 3 shocks/direction AEC-Q200 REV D conditions: Board Flex AEC-Q200-005 ± (0.25 % + 0.01 ) bending 2 mm, 60 s AEC-Q200 REV D conditions: Terminal Strength AEC-Q200-006 ± (0.25 % + 0.01 ) 1.8 kgf, 60 s ASSEMBLY SPECIFICATIONS For the assembly on board, we recommend the lead (Pb)-free thermal profile as per J-STD-020C TESTS CONDITIONS REQUIREMENTS IEC 60115-1 Resistance to Soldering Heat IEC 60068-2-58 ± (0.5 % + 0.005 ) Solder bath method: 270 °C/10 s Level: 1 IPC/JEDEC® J-STD-020C Moisture Sensitivity Level (MSL) + pass requirements of TCR 85 °C / 85 % RH / 168 h overload and dielectric strength after MSL Revision: 20-Mar-2019 2 Document Number: 51058 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

D2TO35 www.vishay.com Vishay Sfernice CHOICE OF THE BOARD The user must choose the board according to the working conditions of the component (power, room temperature). Maximum working temperature must not exceed 175 °C. The dissipated power is simply calculated by the following ratio: T 1 P = ------------------------------------------------------------------------------------------- R +R +R TH (j - c) TH (c - h) TH (h - a) P: Expressed in W T: Difference between maximum working temperature and room temperature or fluid cooling temperature R : Thermal resistance value measured between resistive layer and outer side of the resistor. It is the thermal resistance TH (j - c) of the component: 4.28 °C/W. R : Thermal resistance value measured between outer side of the resistor and upper side of the board. This is the thermal TH (c - h) resistance of the solder layer. R : Thermal resistance of the board. TH (h - a) Example: R + R for D2TO35 power rating 3.5 W at ambient temperature +25 °C. TH (c - h) TH (h - a) Thermal resistance R : 4.28 °C/W TH (j - c) Considering equation (1) we have: T = 175 °C - 25 °C = 150 °C R + R + R = T/P = 150/3.5 = 42.8 °C/W TH (j - c) TH (c - h) TH (h - a) R + R = 42.8 °C/W - 4.28 °C/W = 38.52 °C/W TH (c - h) TH (h - a) Single Pulse: These informations are for a single pulse on a cold resistor at 25 °C (not already used for a dissipation) and for pulses of 100 ms maximum duration. The formula used to calculate E is: 2 U E = P x t = -------- x t R with: E (J): Pulse energy P (W): Pulse power t (s): Pulse duration U (V): Pulse voltage R (W): Resistor The energy calculated must be less: than that allowed by the graph. Revision: 20-Mar-2019 3 Document Number: 51058 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

D2TO35 www.vishay.com Vishay Sfernice POWER RATING The temperature of the case should be maintained within the limits specified. Axis Title 120 10000 100 %) 80 1000 2nd lined Power ( 60 1st line2nd line e at 40 100 R 20 0 10 0 20 40 60 80 100 120 140 160 175180 Case Temperature (°C) OVERLOADS In any case the applied voltage must be lower than the maximum overload voltage of 750 V. The values indicated on the grap h below are applicable to resistors in air or mounted onto a board. ENERGY CURVE Axis Title 100 10000 10 1000 2nd lineEnergy (J) 0.11 1st line2nd line 100 0.01 0.001 10 0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 Overloard Duration (s) POWER CURVE Axis Title 100 000 10000 10 000 1000 1st lineower (W) 1st line2nd line P 1000 100 100 10 0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 Overload Duration (s) Revision: 20-Mar-2019 4 Document Number: 51058 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

D2TO35 www.vishay.com Vishay Sfernice IMPEDANCE CURVE 10  to 1 k from 100 kHz to 300 MHz Axis Title 10000 1.90 1.70 1.50 10 Ω 1000 2nd lineR|Z|/ 111...130000 225550 0 ΩΩ Ω, 75 Ω, 100 Ω 1st line2nd line 0.90 100 0.70 470 Ω 0.50 1000 Ω 0.30 10 100 kHz 1 MHz 10 MHz 100 MHz 1000 MHz 300 MHz Frequency (Hz) MARKING PACKAGING Model, style, resistance value (in ), tolerance (in %) , • Reel manufacturing date, Vishay Sfernice trademark • Tube • Tape dimensions (mm) for reel: 16 5.3 16.4 24 11 ORDERING INFORMATION D2TO 35 C 100 k ± 1 % XXX e3 MODEL STYLE CONNECTIONS RESISTANCE TOLERANCE CUSTOM DESIGN LEAD (Pb)-FREE VALUE F = ± 1 % Optional on request: G = ± 2 % shape, etc. J = ± 5 % K = ± 10 % SAP PART NUMBERING GUIDELINES D 2 T O 0 3 5 C R 2 0 0 0 K R E 3 GLOBAL SIZE LEADS OHMIC VALUE TOLERANCE PACKAGING LEAD (Pb)-FREE MODEL D2TO 035 C = surface mount The first four digits ar e F = 1 % R = reel 500 pieces E3 = pure tin significant figures and th e G = 2 % T = tube 50 pieces last digit specifies th e J = 5 % number of zeros to follow. K = 10 % R designates decimal point. 48R70 = 48.7  48701 = 48 700  10002 = 100 000  R0100 = 0.01  R6800 = 0.68  27000 = 2700  = 2.7 k Revision: 20-Mar-2019 5 Document Number: 51058 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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