CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 (cid:0) Function, Pinout, and Drive Compatible CY54FCT574T...D PACKAGE With FCT and F Logic CY74FCT574T...Q OR SO PACKAGE (cid:0) (TOP VIEW) Reduced V (Typically = 3.3 V) Versions OH of Equivalent FCT Functions OE 1 20 VCC (cid:0) Edge-Rate Control Circuitry for D0 2 19 O0 Significantly Improved Noise D1 3 18 O1 Characteristics D2 4 17 O2 (cid:0) Ioff Supports Partial-Power-Down Mode D3 5 16 O3 Operation D4 6 15 O4 (cid:0) Matched Rise and Fall Times D5 7 14 O5 (cid:0) D6 8 13 O6 Fully Compatible With TTL Input and Output Logic Levels D7 9 12 O7 GND 10 11 CP (cid:0) ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) CY54FCT574T...L PACKAGE – 200-V Machine Model (A115-A) (TOP VIEW) – 1000-V Charged-Device Model (C101) (cid:0) Edge-Triggered D-Type Inputs D1D0 OEVCCO0 (cid:0) 250-MHz Typical Switching Rate (cid:0) CY54FCT574T D2 43 2 1 20 1918 O1 – 32-mA Output Sink Current D3 5 17 O2 – 12-mA Output Source Current D4 6 16 O3 (cid:0) CY74FCT574T D5 7 15 O4 – 64-mA Output Sink Current D6 8 14 O5 9 10 11 12 13 – 32-mA Output Source Current (cid:0) 3-State Outputs D7ND CP O7O6 G description The ’FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The ’FCT574T are identical to ’FCT374T, except for a flow-through pinout to simplify board design. The eight flip-flops in the ’FCT574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the eight flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops. These devices are fully specified for partial-power-down applications using I . The I circuitry disables the off off outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright  2001, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production testing of all parameters. processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 ORDERING INFORMATION SPEED ORDERABLE TOP-SIDE TA PACKAGE† (ns) PART NUMBER MARKING QSOP – Q Tape and reel 5.2 CY74FCT574CTQCT FCT574C Tube 5.2 CY74FCT574CTSOC SSOOIICC – SSOO FFCCTT557744CC Tape and reel 5.2 CY74FCT574CTSOCT QSOP – Q Tape and reel 6.5 CY74FCT574ATQCT FCT574A –40°C to 85°C Tube 6.5 CY74FCT574ATSOC SSOOIICC – SSOO FFCCTT557744AA Tape and reel 6.5 CY74FCT574ATSOCT QSOP – Q Tape and reel 10 CY74FCT574TQCT FCT574 Tube 10 CY74FCT574TSOC SSOOIICC – SSOO FFCCTT557744 Tape and reel 10 CY74FCT574TSOCT CDIP – D Tube 6.2 CY54FCT574CTDMB –55°C to 125°C CDIP – D Tube 7.2 CY54FCT574ATDMB LCC – L Tube 7.2 CY54FCT574ATLMB †Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS OUTPUT D CP OE O H ↑ L H L ↑ L L X X H Z H = High logic level, L = Low logic level, X = Don’t care, Z = High-impedance state, ↑ = Low-to-high clock transition logic diagram (positive logic) 1 OE 11 CP C1 19 2 Q O0 D0 1D To Seven Other Channels 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, θ (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W JA SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C A Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) CY54FCT574T CY74FCT574T UUNNIITT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IOH High-level output current –12 –32 mA IOL Low-level output current 32 64 mA TA Operating free-air temperature –55 125 –40 85 °C NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) CY54FCT574T CY74FCT574T PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP† MAX MIN TYP† MAX VCC = 4.5 V, IIN = –18 mA –0.7 –1.2 VVIIKK VV VCC = 4.75 V, IIN = –18 mA –0.7 –1.2 VCC = 4.5 V, IOH = –12 mA 2.4 3.3 VOH IOH = –32 mA 2 V VVCCCC = 44.7755 VV IOH = –15 mA 2.4 3.3 VCC = 4.5 V, IOL = 32 mA 0.3 0.55 VVOOLL VV VCC = 4.75 V, IOL = 64 mA 0.3 0.55 Vhys All inputs 0.2 0.2 V VCC = 5.5 V, VIN = VCC 5 IIII µµAA VCC = 5.25 V, VIN = VCC 5 VCC = 5.5 V, VIN = 2.7 V ±1 IIIIHH µµAA VCC = 5.25 V, VIN = 2.7 V ±1 VCC = 5.5 V, VIN = 0.5 V ±1 IIIILL µµAA VCC = 5.25 V, VIN = 0.5 V ±1 Ioff VCC = 0 V, VOUT = 4.5 V ±1 ±1 µA IIOOSS‡‡ VCC = 5.5 V, VOUT = 0 V –60 –120 –225 mmAA VCC = 5.25 V, VOUT = 0 V –60 –120 –225 VCC = 5.5 V, VIN = 2.7 V 10 IIOOZZHH µµAA VCC = 5.25 V, VIN = 2.7 V 10 VCC = 5.5 V, VIN = 0.5 V –10 IIOOZZLL µµAA VCC = 5.25 V, VIN = 0.5 V –10 VCC = 5.5 V, VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V 0.1 0.2 IICCCC mmAA VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V 0.1 0.2 VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2 ∆∆IICCCC VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2 mmAA †Typical values are at VCC = 5 V, TA = 25°C. ‡Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. §Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) CY54FCT574T CY74FCT574T PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP† MAX MIN TYP† MAX VCC = 5.5 V, Outputs open, One bit switching at 50% duty cycle, OE = GND, 0.06 0.12 VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V mA/ IICCCCDD¶¶ VCC = 5.25 V, Outputs open, MHz One bit switching at 50% duty cycle, OE = GND, 0.06 0.12 VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V One bit VIN ≤0.2 V or switching VIN ≥VCC – 0.2 V 0.7 1.4 at f11 = 5 MHz Vf00C =C 1 =0 5M.5H zV,,, acyt c5l0e% duty VIN = 3.4 V or GND 1.2 3.4 OOuEt p=u GtsN oDpen, Eswigithcth binitgs VVIINN ≤≥0V.C2 CV –o r0.2 V 1.6 3.2|| at f11 = 2.5 MHz at 50% duty cycle VIN = 3.4 V or GND 3.9 12.2|| IICC mmAA One bit VIN ≤0.2 V or switching VIN ≥VCC – 0.2 V 0.7 1.4 at f11 = 5 MHz Vf00C =C 1 =0 5M.2H5z ,,V, acyt c5l0e% duty VIN = 3.4 V or GND 1.2 3.4 OOuEt p=u GtsN oDpen, Eswigithcth binitgs VVIINN ≤≥0V.C2 CV –o r0.2 V 1.6 3.2|| at f11 = 2.5 MHz at 50% duty cycle VIN = 3.4 V or GND 3.9 12.2|| Ci 5 10 5 10 pF Co 9 12 9 12 pF †Typical values are at VCC = 5 V, TA = 25°C. ¶This parameter is derived for use in total power-supply calculations. #IC = ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1) Where: IC = Total supply current ICC = Power-supply current with CMOS input levels ∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V) DH = Duty cycle for TTL inputs high NT = Number of TTL inputs at DH ICCD = Dynamic current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamperes and all frequencies are in megahertz. ||Values for these conditions are examples of the ICC formula. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY54FCT574T CY54FCT574AT CY54FCT574CT UUNNIITT MIN MAX MIN MAX MIN MAX tw Pulse duration, CP high or low 7 6 6 ns tsu Setup time, data before CP↑ 2 2 2 ns th Hold time, data after CP↑ 1.5 1.5 1.5 ns timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY74FCT574T CY74FCT574AT CY74FCT574CT UUNNIITT MIN MAX MIN MAX MIN MAX tw Pulse duration, CP high or low 7 5 5 ns tsu Setup time, data before CP↑ 2 2 2 ns th Hold time, data after CP↑ 1.5 1.5 1.5 ns switching characteristics over operating free-air temperature range (see Figure 1) FROM TO CY54FCT574T CY54FCT574AT CY54FCT574CT PPAARRAAMMEETTEERR UUNNIITT (INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX tPLH 2 11 2 7.2 2 6.2 CCPP OO nnss tPHL 2 11 2 7.2 2 6.2 tPZH 1.5 14 1.5 7.5 1.5 6.2 OOEE OO nnss tPZL 1.5 14 1.5 7.5 1.5 6.2 tPHZ 1.5 8 1.5 6.5 1.5 5.7 OOEE OO nnss tPLZ 1.5 8 1.5 6.5 1.5 5.7 switching characteristics over operating free-air temperature range (see Figure 1) FROM TO CY74FCT574T CY74FCT574AT CY74FCT574CT PPAARRAAMMEETTEERR UUNNIITT (INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX tPLH 2 10 2 6.5 2 5.2 CCPP OO nnss tPHL 2 10 2 6.5 2 5.2 tPZH 1.5 12.5 1.5 6.5 1.5 5.5 OOEE OO nnss tPZL 1.5 12.5 1.5 6.5 1.5 5.5 tPHZ 1.5 8 1.5 5.5 1.5 5 OOEE OO nnss tPLZ 1.5 8 1.5 5.5 1.5 5 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

CY54FCT574T, CY74FCT574T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS073 – OCTOBER 2001 PARAMETER MEASUREMENT INFORMATION 7 V 500 Ω S1 Open From Output Test From Output Under Test Point Under Test GND TEST S1 (sCeeL N= o5t0e pAF) 500 Ω (sCeeL N= o5t0e pAF) 500 Ω ttPPLLHZ//ttPPZHLL O7p Ven tPHZ/tPZH Open LOAD CIRCUIT FOR LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3-STATE OUTPUTS 3 V Timing Input 1.5 V tw 0 V th 3 V tsu 3 V Input 1.5 V 1.5 V Data Input 1.5 V 1.5 V 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES 3 V 3 V Output Input 1.5 V 1.5 V Control 1.5 V 1.5 V 0 V 0 V tPLH tPHL tPZL tPLZ In-Phase VOH Output ≈3.5 V Output 1.5 V 1.5 V Waveform 1 1.5 V VOL + 0.3 V VOL (see Note B) VOL tPHL tPLH tPZH tPHZ VOH Output VOH Out-of-Phase 1.5 V 1.5 V Waveform 2 1.5 V VOH – 0.3 V Output VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) 5962-9222203M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9222203M2A CY54FCT 574ATLMB 5962-9222203MRA ACTIVE CDIP J 20 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-9222203MR A 5962-9222205MRA ACTIVE CDIP J 20 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-9222205MR A CY54FCT574ATLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9222203M2A CY54FCT 574ATLMB CY74FCT574ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A & no Sb/Br) CY74FCT574ATSOC ACTIVE SOIC DW 20 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A & no Sb/Br) CY74FCT574CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C & no Sb/Br) CY74FCT574CTSOC ACTIVE SOIC DW 20 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C & no Sb/Br) CY74FCT574TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574 & no Sb/Br) CY74FCT574TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574 & no Sb/Br) CY74FCT574TSOC ACTIVE SOIC DW 20 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) CY74FCT574ATQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT574CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT574TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) CY74FCT574ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT574CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT574TQCT SSOP DBQ 20 2500 367.0 367.0 38.0 PackMaterials-Page2

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