CY29942 1:18 Clock Distribution Buffer 1:18 Clock Distribution Buffer Features Functional Description Operational range: Up to 200 MHz The CY29942 is a low voltage clock distribution buffer with an LVCMOS or LVTTL compatible clock input. The output enable LVCMOS/LVTTL clock input control input is LVCMOS/LVTTL compatible. The eighteen LVCMOS-/LVTTL-compatible logic input outputs are 2.5 V or 3.3 V LVCMOS or LVTTL compatible, operate up to 200 MHz, and can drive 50 series or parallel 18 clock outputs: Drive up to 36 clock lines terminated transmission lines. For series terminated transmission lines, each output can drive one or two traces, Output-to-output Skew: 110 ps (typical) giving the devices an effective fanout of 1:36. Low Output enable control output-to-output skews make the CY29942 an ideal clock distribution buffer for nested clock trees in the most demanding Supply voltage: 2.5 V or 3.3 V of synchronous systems. Temperature range: Commercial and Industrial For a complete list of related documentation, click here. 32-pin TQFP package Pin compatible with MPC942C Logic Block Diagram VDD TCLK 18 Q0-Q17 OE CypressSemiconductorCorporation • 198 Champion Court • SanJose, CA 95134-1709 • 408-943-2600 Document Number: 38-07284 Rev. *L Revised November 21, 2017

CY29942 Pin Configuration Figure 1. 32-pin TQFP pinout D S 0 1 2 D 3 4 5 S Q Q Q V Q Q Q V 2 1 0 9 8 7 6 5 3 3 3 2 2 2 2 2 VSS 1 24 Q6 VSS 2 23 Q7 TCLK 3 22 Q8 NC 4 CY29942 21 VDD OE 5 20 Q9 NC 6 19 Q10 VDD 7 18 Q11 VDD 8 17 VSS 9 0 1 2 3 4 5 6 1 1 1 1 1 1 1 7 6 5 S 4 3 2 D Q1 Q1 Q1 VS Q1 Q1 Q1 VD Pin Descriptions Pin Name I/O Description 3 TCLK Input External reference/Test clock input. Weak internal pull-down resistor. 5 OE Input Output enable. When HIGH, all outputs are enabled. When set LOW, the outputs are at high impedance. Weak internal pull-up resistor. 9, 10, 11, 13, Q(17:0) Output Clock outputs 14, 15, 18, 19, 20, 22, 23, 24, 26, 27, 28, 30, 31, 32 7, 8, 16, 21, VDD 2.5 V or 3.3 V power supply 29 1, 2, 12, 17, VSS Ground 25 4, 6 NC No connection Document Number: 38-07284 Rev. *L Page 2 of 10

CY29942 Absolute Maximum Ratings Maximum power supply: ...............................................5.5 V Maximum input current: ............................................±20 mA Exceeding the maximum ratings may impair the useful life of the device. User guidelines are not tested. [1] This device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, Maximum input voltage relative to VSS: ............. VSS – 0.3 V precautions should be taken to avoid application of any voltage Maximum input voltage relative to V : .............V + 0.3 V higher than the maximum rated voltages to this circuit. For proper DD DD operation, I/O voltages should be constrained to the range: Storage temperature: .................................–65 °C to 150 °C V < V < V Operating temperature: ...............................–40 °C to 85 °C SS I/O DD Unused inputs must always be tied to an appropriate logic Maximum ESD protection ..............................................2 kV voltage level (either V or V ). SS DD DC Electrical Specifications V = 3.3 V ± 5% or 2.5 V ± 5% over the specified temperature range. DD Parameter Description Conditions Min Typ Max Unit V Input low voltage V – 0.8 V IL SS V Input high voltage 2.0 – V V IH DD I Input low current[2] – – –200 µA IL I Input high current[2] – – 200 µA IH V Output low voltage[3] I = 20 mA – – 0.5 V OL OL V Output high voltage[3] I = –20 mA, V = 3.3 V 2.4 – – V OH OH DD I = –16 mA, V = 2.5 V 2.0 – – V OH DD I Quiescent supply current OE = V – 5 7 mA DDQ SS I Dynamic supply current V = 3.3 V, Outputs at 150MHz, – 285 – mA DD DD CL = 15 pF V = 3.3 V, Outputs at 200MHz, – 335 – mA DD CL = 15 pF V = 2.5 V, Outputs at 150MHz, – 200 – mA DD CL = 15 pF V = 2.5 V, Outputs at 200MHz, – 240 – mA DD CL = 15 pF Z Output impedance V = 3.3 V 8 12 16  out DD V = 2.5 V 10 15 20  DD C Input capacitance – 4 – pF in Thermal Resistance Parameter [4] Description Test Conditions 32-pin TQFP Unit θ Thermal resistance Test conditions follow standard test methods and 67 °C/W JA (junction to ambient) procedures for measuring thermal impedance, in accordance with EIA/JESD51. θ Thermal resistance 28 °C/W JC (junction to case) Notes 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. Inputs have pull-up/pull-down resistors that effect input current. 3. Driving series or parallel terminated 50 (or 50  to VDD/2) transmission lines. 4. These parameters are guaranteed by design and are not tested. Document Number: 38-07284 Rev. *L Page 3 of 10

CY29942 AC Electrical Specifications V = 3.3 V ±5% or 2.5 V ±5% over the specified temperature range [5] DD Parameter Description Conditions Min Typ Max Unit Fmax Input frequency – – 200 MHz tpd TTL_CLK to Q delay[6, 7] V = 3.3 V 1.8 3.3 3.8 ns DD V = 2.5 V 2.3 3.8 4.4 ns DD DC Output duty cycle[6, 7, 8] Measured at V /2 45 – 55 % DD tsk(0) Output-to-output skew[6, 7] – 110 200 ps tskew(pp) Part-to-part skew[9] V = 3.3 V – – 1.0 ns DD V = 2.5 V – – 1.3 ns DD tskew(pp) Part-to-part skew[10] – – 600 ps tr/tf Output clocks rise/fall time[6, 7] 0.8 V to 2.0 V, V = 3.3 V; 0.2 – 1.1 ns DD 0.5 V to 1.8 V, V = 2.5 V DD Notes 5. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs. 6. Outputs driving 50  transmission lines. 7. See Figure2. 8. 50% input duty cycle. 9. Across temperature and voltage ranges, includes output skew. 10.For a specific temperature and voltage, includes output skew. Document Number: 38-07284 Rev. *L Page 4 of 10

CY29942 Figure 2. LVCMOS_CLK CY29942 Test Reference for V = 3.3 V and V = 2.5 V CC CC CY29942 DUT Zo = 50 ohm Zo = 50 ohm Pulse Generator Z = 50 ohm RT = 50 ohm RT = 50 ohm VTT VTT Figure 3. LVCMOS Propagation Delay (tpd) Test Reference VCC LVCMOS_CLK VCC /2 GND VCC Q VCC /2 tPD GND Figure 4. Output Duty Cycle (DC) VCC VCC /2 tP GND T0 DC = tP / T0 x 100% Figure 5. Output-to-Output Skew tsk(0) VCC VCC /2 GND VCC VCC /2 tSK(0) GND Document Number: 38-07284 Rev. *L Page 5 of 10

CY29942 Ordering Information Part Number Package Type Production Flow Pb-free CY29942AXI 32-pin TQFP Industrial, –40 °C to 85 °C CY29942AXIT 32-pin TQFP – Tape and Reel Industrial, –40 °C to 85 °C CY29942AXC 32-pin TQFP Commercial, 0 °C to 70 °C CY29942AXCT 32-pin TQFP – Tape and Reel Commercial, 0 °C to 70 °C Ordering Code Definitions CY 29942 A X X T X = blank or T blank = Tube; T = Tape and Reel Temperature Range: X = C or I C = Commercial; I = Industrial X = Pb-free indicator Package Type: A = 32-pin TQFP Package 29942 = Base part number Company Code: CY = Cypress Document Number: 38-07284 Rev. *L Page 6 of 10

CY29942 Package Drawing and Dimensions Figure 6. 32-pin TQFP (7 × 7 × 1.4 mm) A3214 Package Outline, 51-85088 51-85088 *E Document Number: 38-07284 Rev. *L Page 7 of 10

CY29942 Acronyms Document Conventions Acronym Description Units of Measure LVCMOS Low Voltage Complementary Metal Oxide Symbol Unit of Measure Semiconductor °C degree Celsius LVTTL Low Voltage Transistor-Transistor Logic kV kilovolt OE Output Enable MHz megahertz PLL Phase-Locked Loop µA microampere TQFP Thin Quad Flat Pack mA milliampere ms millisecond mW milliwatt ns nanosecond  ohm % percent pF picofarad ps picosecond V volt Document Number: 38-07284 Rev. *L Page 8 of 10

CY29942 Document History Page Document Title: CY29942, 1:18 Clock Distribution Buffer Document Number: 38-07284 Orig. of Submission Revision ECN Description of Change Change Date ** 111095 BRK 02/07/02 New data sheet. *A 116777 HWT 08/14/02 Added a Commercial Temp. Range in the Ordering Information *B 122876 RBI 12/21/02 Add power up requirements to maximum rating information. *C 334117 RGL See ECN Added Lead-free devices Added typical value for output-output skew *D 2761988 KVM 09/10/09 Ordering Information table: fixed typo and removed obsolete CY29942ACT. Changed Lead-free to Pb-free. *E 2899304 BASH / 03/25/2010 Removed CY29942AC part from Ordering Information. CXQ Updated package diagram. *F 3034172 CXQ 09/21/2010 Changed spec title. Updated format of “Features”, changed wording in “Functional Description”. Removed note 1, added info into Table 1 directly. Removed reference to multiple supplies, power supply sequencing from Absolute Maximum Ratings. Removed reference to V from AC/DC Electrical Specs tables. DDC Added condition OE = V for I in DC Electrical Specs table. SS DDQ Fixed formatting in AC/DC Electrical specs tables. Changed t to t to match Figure 6. SKEW SK(o) Added Ordering Code Definitions. Added Acronyms and Units of Measure sections. Minor edits. *G 3548252 PURU 03/12/2012 Changed LQFP to TQFP throughout document. *H 4149208 CINM 10/07/2013 Updated Package Drawing and Dimensions: spec 51-85088 – Changed revision from *D to *E. Updated to new template. Completing Sunset Review. *I 4586288 CINM 12/03/2014 Updated Functional Description: Added “For a complete list of related documentation, click here.” at the end. Updated Ordering Information: Removed the prune part numbers CY29942AI and CY29942AIT. *J 5258930 PSR 05/04/2016 Added Thermal Resistance. Updated to new template. *K 5500790 PAWK 10/28/2016 Sunset Review - No content change. *L 5972824 AESATMP8 11/21/2017 Updated logo and Copyright. Document Number: 38-07284 Rev. *L Page 9 of 10

CY29942 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products PSoC® Solutions ARM® Cortex® Microcontrollers cypress.com/arm PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 Automotive cypress.com/automotive Cypress Developer Community Clocks & Buffers cypress.com/clocks Forums | WICED IOT Forums | Projects | Video | Blogs | Interface cypress.com/interface Training | Components Internet of Things cypress.com/iot Technical Support Memory cypress.com/memory cypress.com/support Microcontrollers cypress.com/mcu PSoC cypress.com/psoc Power Management ICs cypress.com/pmic Touch Sensing cypress.com/touch USB Controllers cypress.com/usb Wireless Connectivity cypress.com/wireless © Cypress Semiconductor Corporation, 2002-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document, including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited. TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Document Number: 38-07284 Rev. *L Revised November 21, 2017 Page 10 of 10