CSD87312Q3E www.ti.com SLPS333–NOVEMBER2012 Dual 30-V N-Channel NexFET™ Power MOSFETs FEATURES . 1 PRODUCTSUMMARY • CommonSourceConn(cid:3)ection (cid:3) TA=25°C TYPICALVALUE UNIT • Ultr(cid:90)a(cid:90)(cid:90)L(cid:17)(cid:87)(cid:76)(cid:17)o(cid:70)(cid:82)w(cid:80) DraintoDrainOn-Resistance VDS DraintoSour(cid:54)c(cid:47)e(cid:51)V(cid:54)o(cid:22)(cid:22)lt(cid:22)a(cid:3)g(cid:3238)e(cid:3)(cid:54)(cid:40)(cid:51)(cid:55)(cid:40)(cid:48)(cid:37)(cid:40)(cid:53)(cid:3)(cid:21)(cid:19)(cid:20)(cid:20)(cid:3)(cid:3)30 V • SpaceSavingSON3.3x3.3mmPlastic Qg GateChargeTotal(4.5V) 6.3 nC Package Qgd GateChargeGatetoDrain 0.7 nC • Op(cid:3)timizedfor5VGateDrive DraintoDrainOnResistance VGS=4.5V 31 mΩ • LowThermalResistance RDD(on) (Q1+Q2) VGS=8V 27 mΩ (cid:120) • Ava(cid:120)lancheRated VGS(th) ThresholdVoltage 1.0 V • Pb(cid:120)FreeTerminalPlating (cid:120) ORDERINGINFORMATION • Ro(cid:120)HSCompliant Device Package Med(cid:58)ia Qty Ship • Hal(cid:120)ogenFree (cid:120) CSD87312Q3E SON3.3x3.3mm 13-In(cid:58)ch 2500 Tapeand PlasticPackage Reel Reel (cid:120) APPLICATIONS (cid:120) (cid:43)(cid:68)(cid:79)(cid:82)(cid:74)(cid:72)(cid:81)(cid:3)(cid:41)(cid:85)(cid:72)(cid:72) ABSOLUTEMAXIMUMRATINGS • Adaptor/USBInputProtectionforNotebook PCsandTablets TA=25°C VALUE UNIT (cid:120) VDS DraintoSourceVoltage 30 V DESCRIPTION VGS GatetoSourceVoltage +10/-8 V The CSD87312Q3E is a 30V common-source, dual ID ContinuousDrainCurrent,TC=25°C(1) 27 A N-channel device designed for adaptor/USB input IDM PulsedDrainCurrent(2) 45 A protection. This SON 3.3 x 3.3mm device has low PD PowerDissipation 2.5 W draintodrainon-resistancethatminimizeslossesand TJ, OperatingJunctionandStorage –55to150 °C offers low component count for space constrained TSTG TemperatureRange multi-c(cid:3)ellbatterychargingapplications. EAS AIDv=ala2n4cAh,eLE=n0e.r1gmy,Hs,inRgGle=p2u5lsΩe 29 mJ (cid:3) (cid:3) TEXTADDEDFORSPACING (1) TypicalR=63°C/Won1in²(2oz.)on0.060"thickFR4PCB (cid:3) TopView (2) Pulseduration≤300μs,dutycycle≤2% (cid:3) Top View (cid:3) (cid:3) D1 D2 TEXTADDEDFORSPACING V vs.R (cid:3) D1 D2 GS DDon (cid:3) S 60 (cid:3)(cid:3) DD11 DG2 Wce (m) (cid:84)5505 TTCC == 2152°5CºC IIdd == 77AA (cid:3) an (cid:148) (cid:80) (cid:148) (cid:3) TEXTADDEDy FORSPACING esist 45 (cid:3) CircuitImage e R 40 (cid:3)(cid:3) On-Stat 35 (cid:3)(cid:3) - ()DSon 2350 R (cid:3) 20 (cid:3) 0 2 4 6 8 10 (cid:3) VGS - Gate-to- Source Voltage (V) G001 (cid:38)(cid:82)(cid:83)(cid:92)(cid:85)(cid:76)(cid:74)(cid:75)(cid:87)(cid:3)(cid:107)(cid:3)(cid:21)(cid:19)(cid:20)(cid:20)(cid:15)(cid:3)(cid:55)(cid:72)(cid:91)(cid:68)(cid:86)(cid:3)(cid:44)(cid:81)(cid:86)(cid:87)(cid:85)(cid:88)(cid:80)(cid:72)(cid:81)(cid:87)(cid:86)(cid:3)(cid:44)(cid:81)(cid:70)(cid:82)(cid:85)(cid:83)(cid:82)(cid:85)(cid:68)(cid:87)(cid:72)(cid:71) 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2012,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

CSD87312Q3E SLPS333–NOVEMBER2012 www.ti.com Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. ELECTRICAL CHARACTERISTICS (T =25°Cunlessotherwisestated) A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT StaticCharacteristics BV DraintoSourceVoltage V =0V,I =250μA 30 V DSS GS D I DraintoSourceLeakageCurrent V =0V,V =24V 1 μA DSS GS DS I GatetoSourceLeakageCurrent V =0V,V =+10/-8V 100 nA GSS DS GS V GatetoSourceThresholdVoltage V =V ,I =250μA 0.8 1.0 1.3 V GS(th) DS GS D DraintoDrainOnResistance(Q1+ VGS=4.5V,ID=7A 31 38 mΩ R DD(on) Q2) V =8V,I =7A 27 33 mΩ GS D g Transconductance V =15V,I =7A 39 S fs DS D DynamicCharacteristics(1) C InputCapacitance 960 1250 pF iss C OutputCapacitance V =0V,V =15V,f=1MHz 190 247 pF oss GS DS C ReverseTransferCapacitance 12 16 pF rss R SeriesGateResistance 5 10 Ω G Q GateChargeTotal(4.5V) 6.3 8.2 nC g Q GateChargeGatetoDrain 0.7 nC gd V =15V,I =7A DS D Q GateChargeGatetoSource 1.9 nC gs Q GateChargeatVth 1.0 nC g(th) Q OutputCharge V =15V,V =0V 4.0 nC oss DS GS t TurnOnDelayTime 7.8 ns d(on) t RiseTime 16 ns r V =15V,V =4.5V,I =7A,R =2Ω DS GS DS G t TurnOffDelayTime 17 ns d(off) t FallTime 2.9 ns f DiodeCharacteristics(1) V DiodeForwardVoltage I =7A,V =0V 0.8 1 V SD SD GS Q ReverseRecoveryCharge 5.3 nC rr V =15V,I =7A,di/dt=300A/μs DS F t ReverseRecoveryTime 12.2 ns rr (1) AllDynamicandDiodeCharacteristicsweremeasuredwithrespecttooneofthetwodrains,withtheotherleftfloating. THERMAL CHARACTERISTICS (T =25°Cunlessotherwisestated) A PARAMETER MIN TYP MAX UNIT R ThermalResistanceJunctiontoCase(1) 4.2 °C/W θJC R ThermalResistanceJunctiontoAmbient(1)(2) 63 °C/W θJA (1) R isdeterminedwiththedevicemountedona1-inch2(6.45-cm2),2-oz.(0.071-mmthick)Cupadona1.5-inch×1.5-inch(3.81-cm× θJC 3.81-cm),0.06-inch(1.52-mm)thickFR4PCB.R isspecifiedbydesign,whereasR isdeterminedbytheuser’sboarddesign. θJC θJA (2) DevicemountedonFR4materialwith1-inch2(6.45-cm2),2-oz.(0.071-mmthick)Cu. 2 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated

CSD87312Q3E www.ti.com SLPS333–NOVEMBER2012 GATE DRAIN GATE DRAIN MaxR =63°C/W MaxR =165°C/W θJA θJA whenmountedon whenmountedona 1inch2(6.45cm2)of2- minimumpadareaof oz.(0.071-mmthick) 2-oz.(0.071-mmthick) Cu. Cu. SOURCE SOURCE M0137-01 M0137-02 TYPICAL MOSFET CHARACTERISTICS (T =25°Cunlessotherwisestated) A Figure1. TransientThermalImpedance TEXTADDEDFORSPACING TEXTADDEDFORSPACING 100 60 VDS = 5V A) A) nt ( 80 nt ( e e Curr Curr 40 e 60 e c c ur ur o o S S o- 40 o- n-t n-t 20 ai ai Dr Dr - DS 20 VVGGSS ==86VV - DS TTCC == 12255°C°C I VGS =4.5V I TC = −55°C 0 0 0 1 2 3 4 5 0 1 2 3 4 5 VDS - Drain-to-Source Voltage (V) G001 VGS - Gate-to-Source Voltage (V) G001 Figure2.SaturationCharacteristics Figure3.TransferCharacteristics Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3

CSD87312Q3E SLPS333–NOVEMBER2012 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (T =25°Cunlessotherwisestated) A TEXTADDEDFORSPACING TEXTADDEDFORSPACING 10 10000 ID = 7A e (V) 8 VDS =15V e Voltag 6 ce (pF) 1000 c n Sour acita 100 Gate-to- 4 C − Cap 10 V - GS 2 CCiossss == CCgdds ++ CCggsd Crss = Cgd 0 1 0 2 4 6 8 10 12 14 0 3 6 9 12 15 18 21 24 27 30 Qg - Gate Charge (nC) G001 VDS - Drain-to-Source Voltage (V) G001 Figure4.GateCharge Figure5.Capacitance TEXTADDEDFORSPACING TEXTADDEDFORSPACING 1.5 60 ID = 250uA ) TC = 25°C Id = 7A V) 1.25 Wm 55 TC = 125ºC Id = 7A d Voltage ( 1 esistance ( 4550 hol 0.75 e R 40 es at V - Thr()GSth 0.02.55 - On-St()DSon 233505 R 0 20 −75 −25 25 75 125 175 0 2 4 6 8 10 TC - Case Temperature (ºC) G001 VGS - Gate-to- Source Voltage (V) G001 Figure6.ThresholdVoltagevs.Temperature Figure7.On-StateResistancevs.Gate-to-SourceVoltage TEXTADDEDFORSPACING TEXTADDEDFORSPACING 2 100 VGS = 4.5V ID =7A TC = 25°C stance 1.75 VGS = 8V ent (A) 10 TC = 125°C Resi 1.5 Curr 1 State 1.25 Drain 0.1 alized On- 0.751 Source-to- 0.01 orm 0.5 − D 0.001 N S I 0.25 0.0001 −75 −25 25 75 125 175 0 0.2 0.4 0.6 0.8 1 TC - Case Temperature (ºC) G001 VSD − Source-to-Drain Voltage (V) G001 Figure8.NormalizedOn-StateResistancevs.Temperature Figure9.TypicalDiodeForwardVoltage 4 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated

CSD87312Q3E www.ti.com SLPS333–NOVEMBER2012 TYPICAL MOSFET CHARACTERISTICS (continued) (T =25°Cunlessotherwisestated) A TEXTADDEDFORSPACING TEXTADDEDFORSPACING 1000 100 1ms 100ms DC TC = 25ºC nt (A) 100 10ms 1s nt (A) TC = 125ºC e e urr urr C C e 10 e c h our anc 10 ain-to-S 1 ak Aval Dr Pe - DS 0.1 Single Pulse - AV I Typical RthetaJA =130ºC/W(min Cu) I 0.01 1 0.01 0.1 1 10 50 0.01 0.1 1 VDS - Drain-to-Source Voltage (V) G001 TAV - Time in Avalanche (mS) G001 Figure10.MaximumSafeOperatingArea Figure11.SinglePulseUnclampedInductiveSwitching TEXTADDEDFORSPACING 40.0 A) 35.0 nt ( urre 30.0 C e 25.0 c ur o 20.0 S n- to- 15.0 Drai 10.0 - DS 5.0 I 0.0 −50 −25 0 25 50 75 100 125 150 175 TC - Case Temperature (ºC) G001 Figure12. MaximumDrainCurrentvs.Temperature Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5

CSD87312Q3E SLPS333–NOVEMBER2012 www.ti.com MECHANICAL DATA Q3E Package Dimensions MILLIMETERS DIM MIN MAX A 0.850 1.050 b 0.280 0.400 c 0.150 0.250 c1 0.150 0.250 d 0.940 1.040 d1 0.160 0.260 d2 0.150 0.250 d3 0.250 0.350 D1 3.200 3.400 D2 2.650 2.750 E 3.200 3.400 E1 3.200 3.400 E2 1.750 1.850 e 0.650TYP L 0.400 0.500 θ 0° - K 0.300Typ Notes: 1. Pin1-4:Drain1 2. Pin5:Gate 3. Pin6-8:Drain2 4. Pin9:Source 6 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated

CSD87312Q3E www.ti.com SLPS333–NOVEMBER2012 Recommended PCB Pattern Recommended Stencil Opening For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCBLayoutTechniques. Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7

CSD87312Q3E SLPS333–NOVEMBER2012 www.ti.com Q3E Tape and Reel Information 0 1 0. ± 5 4.00 ±0.10 (See Note 1) 2.00 ±0.05 7 1. 8.00 ±0.10 Ø 1.50 +0.10 –0.00 00 31 0.0. +– 0 0 2. 1 5 0 50 ±0. 3.60 5. 0 3 3.60 1. M0144-01 Notes: 1. 10sprocketholepitchcumulativetolerance±0.2 2. Cambernottoexceed1mmIN100mm,noncumulativeover250mm 3. Material:blackstaticdissipativepolystyrene 4. Alldimensionsareinmm(unlessotherwisespecified) 5. Thickness:0.30±0.05mm 6. MSL1260°C(IRandConvection)PbFReflowCompatible 8 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) CSD87312Q3E ACTIVE VSON-CLIP DPB 8 2500 Pb-Free (RoHS NIPDAU Level-1-260C-UNLIM -55 to 150 87312E Exempt) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 13-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) CSD87312Q3E VSON- DPB 8 2500 330.0 12.4 3.6 3.6 1.2 8.0 12.0 Q2 CLIP PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 13-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) CSD87312Q3E VSON-CLIP DPB 8 2500 367.0 367.0 35.0 PackMaterials-Page2

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